base.cc (10623:b9646f4546ad) | base.cc (10626:7982e539d003) |
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1/* 2 * Copyright (c) 2013-2014 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 69 unchanged lines hidden (view full) --- 78 ; 79} 80 81bool 82BasePrefetcher::observeAccess(const PacketPtr &pkt) const 83{ 84 Addr addr = pkt->getAddr(); 85 bool fetch = pkt->req->isInstFetch(); | 1/* 2 * Copyright (c) 2013-2014 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 69 unchanged lines hidden (view full) --- 78 ; 79} 80 81bool 82BasePrefetcher::observeAccess(const PacketPtr &pkt) const 83{ 84 Addr addr = pkt->getAddr(); 85 bool fetch = pkt->req->isInstFetch(); |
86 bool read= pkt->isRead(); | 86 bool read = pkt->isRead(); 87 bool inv = pkt->isInvalidate(); |
87 bool is_secure = pkt->isSecure(); 88 89 if (pkt->req->isUncacheable()) return false; 90 if (fetch && !onInst) return false; 91 if (!fetch && !onData) return false; 92 if (!fetch && read && !onRead) return false; 93 if (!fetch && !read && !onWrite) return false; | 88 bool is_secure = pkt->isSecure(); 89 90 if (pkt->req->isUncacheable()) return false; 91 if (fetch && !onInst) return false; 92 if (!fetch && !onData) return false; 93 if (!fetch && read && !onRead) return false; 94 if (!fetch && !read && !onWrite) return false; |
95 if (!fetch && !read && inv) return false; |
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94 95 if (onMiss) { 96 return !inCache(addr, is_secure) && 97 !inMissQueue(addr, is_secure); 98 } 99 100 return true; 101} --- 26 unchanged lines hidden --- | 96 97 if (onMiss) { 98 return !inCache(addr, is_secure) && 99 !inMissQueue(addr, is_secure); 100 } 101 102 return true; 103} --- 26 unchanged lines hidden --- |