1/* 2 * Copyright (c) 2013-2014 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 49 unchanged lines hidden (view full) --- 58 59void 60BasePrefetcher::PrefetchListener::notify(const PacketPtr &pkt) 61{ 62 parent.probeNotify(pkt); 63} 64 65BasePrefetcher::BasePrefetcher(const BasePrefetcherParams *p) |
66 : ClockedObject(p), listeners(), cache(nullptr), blkSize(p->block_size), 67 lBlkSize(floorLog2(blkSize)), onMiss(p->on_miss), onRead(p->on_read), |
68 onWrite(p->on_write), onData(p->on_data), onInst(p->on_inst), |
69 masterId(p->sys->getMasterId(this)), pageBytes(p->sys->getPageBytes()), |
70 prefetchOnAccess(p->prefetch_on_access) 71{ 72} 73 74void 75BasePrefetcher::setCache(BaseCache *_cache) 76{ 77 assert(!cache); 78 cache = _cache; |
79 80 // If the cache has a different block size from the system's, save it |
81 blkSize = cache->getBlockSize(); 82 lBlkSize = floorLog2(blkSize); 83} 84 85void 86BasePrefetcher::regStats() 87{ 88 ClockedObject::regStats(); --- 28 unchanged lines hidden (view full) --- 117 } 118 119 return true; 120} 121 122bool 123BasePrefetcher::inCache(Addr addr, bool is_secure) const 124{ |
125 return cache->inCache(addr, is_secure); |
126} 127 128bool 129BasePrefetcher::inMissQueue(Addr addr, bool is_secure) const 130{ |
131 return cache->inMissQueue(addr, is_secure); |
132} 133 134bool 135BasePrefetcher::samePage(Addr a, Addr b) const 136{ 137 return roundDown(a, pageBytes) == roundDown(b, pageBytes); 138} 139 --- 64 unchanged lines hidden --- |