base.cc (8831:6c08a877af8f) | base.cc (8832:247fee427324) |
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1/* 2 * Copyright (c) 2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 28 unchanged lines hidden (view full) --- 37 38#include "arch/isa_traits.hh" 39#include "base/trace.hh" 40#include "config/the_isa.hh" 41#include "debug/HWPrefetch.hh" 42#include "mem/cache/prefetch/base.hh" 43#include "mem/cache/base.hh" 44#include "mem/request.hh" | 1/* 2 * Copyright (c) 2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 28 unchanged lines hidden (view full) --- 37 38#include "arch/isa_traits.hh" 39#include "base/trace.hh" 40#include "config/the_isa.hh" 41#include "debug/HWPrefetch.hh" 42#include "mem/cache/prefetch/base.hh" 43#include "mem/cache/base.hh" 44#include "mem/request.hh" |
45#include "sim/system.hh" |
|
45 46BasePrefetcher::BasePrefetcher(const Params *p) 47 : SimObject(p), size(p->size), latency(p->latency), degree(p->degree), | 46 47BasePrefetcher::BasePrefetcher(const Params *p) 48 : SimObject(p), size(p->size), latency(p->latency), degree(p->degree), |
48 useContextId(p->use_cpu_id), pageStop(!p->cross_pages), 49 serialSquash(p->serial_squash), onlyData(p->data_accesses_only) | 49 useMasterId(p->use_master_id), pageStop(!p->cross_pages), 50 serialSquash(p->serial_squash), onlyData(p->data_accesses_only), 51 system(p->sys), masterId(system->getMasterId(name())) |
50{ 51} 52 53void 54BasePrefetcher::setCache(BaseCache *_cache) 55{ 56 cache = _cache; 57 blkSize = cache->getBlockSize(); --- 167 unchanged lines hidden (view full) --- 225 // Check if it is already in the pf buffer 226 if (inPrefetch(addr) != pf.end()) { 227 pfBufferHit++; 228 DPRINTF(HWPrefetch, "Prefetch addr already in pf buffer\n"); 229 continue; 230 } 231 232 // create a prefetch memreq | 52{ 53} 54 55void 56BasePrefetcher::setCache(BaseCache *_cache) 57{ 58 cache = _cache; 59 blkSize = cache->getBlockSize(); --- 167 unchanged lines hidden (view full) --- 227 // Check if it is already in the pf buffer 228 if (inPrefetch(addr) != pf.end()) { 229 pfBufferHit++; 230 DPRINTF(HWPrefetch, "Prefetch addr already in pf buffer\n"); 231 continue; 232 } 233 234 // create a prefetch memreq |
233 Request *prefetchReq = new Request(*addrIter, blkSize, 0); | 235 Request *prefetchReq = new Request(*addrIter, blkSize, 0, masterId); |
234 PacketPtr prefetch = 235 new Packet(prefetchReq, MemCmd::HardPFReq, Packet::Broadcast); 236 prefetch->allocate(); 237 prefetch->req->setThreadContext(pkt->req->contextId(), 238 pkt->req->threadId()); 239 240 prefetch->time = time + (*delayIter); // @todo ADD LATENCY HERE 241 --- 38 unchanged lines hidden --- | 236 PacketPtr prefetch = 237 new Packet(prefetchReq, MemCmd::HardPFReq, Packet::Broadcast); 238 prefetch->allocate(); 239 prefetch->req->setThreadContext(pkt->req->contextId(), 240 pkt->req->threadId()); 241 242 prefetch->time = time + (*delayIter); // @todo ADD LATENCY HERE 243 --- 38 unchanged lines hidden --- |