Prefetcher.py (9288:3d6da8559605) | Prefetcher.py (9338:97b4a2be1e5b) |
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1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 31 unchanged lines hidden (view full) --- 40 41from ClockedObject import ClockedObject 42from m5.params import * 43from m5.proxy import * 44 45class BasePrefetcher(ClockedObject): 46 type = 'BasePrefetcher' 47 abstract = True | 1# Copyright (c) 2012 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 31 unchanged lines hidden (view full) --- 40 41from ClockedObject import ClockedObject 42from m5.params import * 43from m5.proxy import * 44 45class BasePrefetcher(ClockedObject): 46 type = 'BasePrefetcher' 47 abstract = True |
48 cxx_header = "mem/cache/prefetch/base.hh" |
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48 size = Param.Int(100, 49 "Number of entries in the hardware prefetch queue") 50 cross_pages = Param.Bool(False, 51 "Allow prefetches to cross virtual page boundaries") 52 serial_squash = Param.Bool(False, 53 "Squash prefetches with a later time on a subsequent miss") 54 degree = Param.Int(1, 55 "Degree of the prefetch depth") 56 latency = Param.Cycles('1', "Latency of the prefetcher") 57 use_master_id = Param.Bool(True, 58 "Use the master id to separate calculations of prefetches") 59 data_accesses_only = Param.Bool(False, 60 "Only prefetch on data not on instruction accesses") 61 sys = Param.System(Parent.any, "System this device belongs to") 62 63class GHBPrefetcher(BasePrefetcher): 64 type = 'GHBPrefetcher' 65 cxx_class = 'GHBPrefetcher' | 49 size = Param.Int(100, 50 "Number of entries in the hardware prefetch queue") 51 cross_pages = Param.Bool(False, 52 "Allow prefetches to cross virtual page boundaries") 53 serial_squash = Param.Bool(False, 54 "Squash prefetches with a later time on a subsequent miss") 55 degree = Param.Int(1, 56 "Degree of the prefetch depth") 57 latency = Param.Cycles('1', "Latency of the prefetcher") 58 use_master_id = Param.Bool(True, 59 "Use the master id to separate calculations of prefetches") 60 data_accesses_only = Param.Bool(False, 61 "Only prefetch on data not on instruction accesses") 62 sys = Param.System(Parent.any, "System this device belongs to") 63 64class GHBPrefetcher(BasePrefetcher): 65 type = 'GHBPrefetcher' 66 cxx_class = 'GHBPrefetcher' |
67 cxx_header = "mem/cache/prefetch/ghb.hh" |
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66 67class StridePrefetcher(BasePrefetcher): 68 type = 'StridePrefetcher' 69 cxx_class = 'StridePrefetcher' | 68 69class StridePrefetcher(BasePrefetcher): 70 type = 'StridePrefetcher' 71 cxx_class = 'StridePrefetcher' |
72 cxx_header = "mem/cache/prefetch/stride.hh" |
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70 71class TaggedPrefetcher(BasePrefetcher): 72 type = 'TaggedPrefetcher' 73 cxx_class = 'TaggedPrefetcher' | 73 74class TaggedPrefetcher(BasePrefetcher): 75 type = 'TaggedPrefetcher' 76 cxx_class = 'TaggedPrefetcher' |
77 cxx_header = "mem/cache/prefetch/tagged.hh" |
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74 75 76 77 | 78 79 80 81 |