1# Copyright (c) 2012, 2014 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2005 The Regents of The University of Michigan
14# All rights reserved.
15#
16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright
21# notice, this list of conditions and the following disclaimer in the
22# documentation and/or other materials provided with the distribution;
23# neither the name of the copyright holders nor the names of its
24# contributors may be used to endorse or promote products derived from
25# this software without specific prior written permission.
26#
27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Ron Dreslinski
40# Mitch Hayenga
41
42from ClockedObject import ClockedObject
43from IndexingPolicies import *
44from m5.SimObject import *
45from m5.params import *
46from m5.proxy import *
47from ReplacementPolicies import *
48
49class HWPProbeEvent(object):
50 def __init__(self, prefetcher, obj, *listOfNames):
51 self.obj = obj
52 self.prefetcher = prefetcher
53 self.names = listOfNames
54
55 def register(self):
56 if self.obj:
57 for name in self.names:
58 self.prefetcher.getCCObject().addEventProbe(
59 self.obj.getCCObject(), name)
60
61class BasePrefetcher(ClockedObject):
62 type = 'BasePrefetcher'
63 abstract = True
64 cxx_header = "mem/cache/prefetch/base.hh"
65 cxx_exports = [
66 PyBindMethod("addEventProbe"),
67 ]
68 sys = Param.System(Parent.any, "System this prefetcher belongs to")
69
70 # Get the block size from the parent (system)
71 block_size = Param.Int(Parent.cache_line_size, "Block size in bytes")
72
73 on_miss = Param.Bool(False, "Only notify prefetcher on misses")
74 on_read = Param.Bool(True, "Notify prefetcher on reads")
75 on_write = Param.Bool(True, "Notify prefetcher on writes")
76 on_data = Param.Bool(True, "Notify prefetcher on data accesses")
77 on_inst = Param.Bool(True, "Notify prefetcher on instruction accesses")
78 prefetch_on_access = Param.Bool(Parent.prefetch_on_access,
79 "Notify the hardware prefetcher on every access (not just misses)")
80 use_virtual_addresses = Param.Bool(False,
81 "Use virtual addresses for prefetching")
82
83 _events = []
84 def addEvent(self, newObject):
85 self._events.append(newObject)
86
87 # Override the normal SimObject::regProbeListeners method and
88 # register deferred event handlers.
89 def regProbeListeners(self):
90 for event in self._events:
91 event.register()
92 self.getCCObject().regProbeListeners()
93
94 def listenFromProbe(self, simObj, *probeNames):
95 if not isinstance(simObj, SimObject):
96 raise TypeError("argument must be of SimObject type")
97 if len(probeNames) <= 0:
98 raise TypeError("probeNames must have at least one element")
99 self.addEvent(HWPProbeEvent(self, simObj, *probeNames))
100
101class QueuedPrefetcher(BasePrefetcher):
102 type = "QueuedPrefetcher"
103 abstract = True
104 cxx_class = "QueuedPrefetcher"
105 cxx_header = "mem/cache/prefetch/queued.hh"
106 latency = Param.Int(1, "Latency for generated prefetches")
107 queue_size = Param.Int(32, "Maximum number of queued prefetches")
108 queue_squash = Param.Bool(True, "Squash queued prefetch on demand access")
109 queue_filter = Param.Bool(True, "Don't queue redundant prefetches")
110 cache_snoop = Param.Bool(False, "Snoop cache to eliminate redundant request")
111
112 tag_prefetch = Param.Bool(True, "Tag prefetch with PC of generating access")
113
114class StridePrefetcher(QueuedPrefetcher):
115 type = 'StridePrefetcher'
116 cxx_class = 'StridePrefetcher'
117 cxx_header = "mem/cache/prefetch/stride.hh"
118
119 # Do not consult stride prefetcher on instruction accesses
120 on_inst = False
121
122 max_conf = Param.Int(7, "Maximum confidence level")
123 thresh_conf = Param.Int(4, "Threshold confidence level")
124 min_conf = Param.Int(0, "Minimum confidence level")
125 start_conf = Param.Int(4, "Starting confidence for new entries")
126
127 table_sets = Param.Int(16, "Number of sets in PC lookup table")
128 table_assoc = Param.Int(4, "Associativity of PC lookup table")
129 use_master_id = Param.Bool(True, "Use master id based history")
130
131 degree = Param.Int(4, "Number of prefetches to generate")
132
133 # Get replacement policy
134 replacement_policy = Param.BaseReplacementPolicy(RandomRP(),
135 "Replacement policy")
136
137class TaggedPrefetcher(QueuedPrefetcher):
138 type = 'TaggedPrefetcher'
139 cxx_class = 'TaggedPrefetcher'
140 cxx_header = "mem/cache/prefetch/tagged.hh"
141
142 degree = Param.Int(2, "Number of prefetches to generate")
143
144class SignaturePathPrefetcher(QueuedPrefetcher):
145 type = 'SignaturePathPrefetcher'
146 cxx_class = 'SignaturePathPrefetcher'
147 cxx_header = "mem/cache/prefetch/signature_path.hh"
148
149 signature_shift = Param.UInt8(3,
150 "Number of bits to shift when calculating a new signature");
151 signature_bits = Param.UInt16(12,
152 "Size of the signature, in bits");
153 signature_table_entries = Param.MemorySize("1024",
154 "Number of entries of the signature table")
155 signature_table_assoc = Param.Unsigned(2,
156 "Associativity of the signature table")
157 signature_table_indexing_policy = Param.BaseIndexingPolicy(
158 SetAssociative(entry_size = 1, assoc = Parent.signature_table_assoc,
159 size = Parent.signature_table_entries),
160 "Indexing policy of the signature table")
161 signature_table_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
162 "Replacement policy of the signature table")
163
164 max_counter_value = Param.UInt8(7, "Maximum pattern counter value")
165 pattern_table_entries = Param.MemorySize("4096",
166 "Number of entries of the pattern table")
167 pattern_table_assoc = Param.Unsigned(1,
168 "Associativity of the pattern table")
169 strides_per_pattern_entry = Param.Unsigned(4,
170 "Number of strides stored in each pattern entry")
171 pattern_table_indexing_policy = Param.BaseIndexingPolicy(
172 SetAssociative(entry_size = 1, assoc = Parent.pattern_table_assoc,
173 size = Parent.pattern_table_entries),
174 "Indexing policy of the pattern table")
175 pattern_table_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
176 "Replacement policy of the pattern table")
177
178 prefetch_confidence_threshold = Param.Float(0.5,
179 "Minimum confidence to issue prefetches")
180 lookahead_confidence_threshold = Param.Float(0.75,
181 "Minimum confidence to continue exploring lookahead entries")
182
| 1# Copyright (c) 2012, 2014 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2005 The Regents of The University of Michigan
14# All rights reserved.
15#
16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright
21# notice, this list of conditions and the following disclaimer in the
22# documentation and/or other materials provided with the distribution;
23# neither the name of the copyright holders nor the names of its
24# contributors may be used to endorse or promote products derived from
25# this software without specific prior written permission.
26#
27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Ron Dreslinski
40# Mitch Hayenga
41
42from ClockedObject import ClockedObject
43from IndexingPolicies import *
44from m5.SimObject import *
45from m5.params import *
46from m5.proxy import *
47from ReplacementPolicies import *
48
49class HWPProbeEvent(object):
50 def __init__(self, prefetcher, obj, *listOfNames):
51 self.obj = obj
52 self.prefetcher = prefetcher
53 self.names = listOfNames
54
55 def register(self):
56 if self.obj:
57 for name in self.names:
58 self.prefetcher.getCCObject().addEventProbe(
59 self.obj.getCCObject(), name)
60
61class BasePrefetcher(ClockedObject):
62 type = 'BasePrefetcher'
63 abstract = True
64 cxx_header = "mem/cache/prefetch/base.hh"
65 cxx_exports = [
66 PyBindMethod("addEventProbe"),
67 ]
68 sys = Param.System(Parent.any, "System this prefetcher belongs to")
69
70 # Get the block size from the parent (system)
71 block_size = Param.Int(Parent.cache_line_size, "Block size in bytes")
72
73 on_miss = Param.Bool(False, "Only notify prefetcher on misses")
74 on_read = Param.Bool(True, "Notify prefetcher on reads")
75 on_write = Param.Bool(True, "Notify prefetcher on writes")
76 on_data = Param.Bool(True, "Notify prefetcher on data accesses")
77 on_inst = Param.Bool(True, "Notify prefetcher on instruction accesses")
78 prefetch_on_access = Param.Bool(Parent.prefetch_on_access,
79 "Notify the hardware prefetcher on every access (not just misses)")
80 use_virtual_addresses = Param.Bool(False,
81 "Use virtual addresses for prefetching")
82
83 _events = []
84 def addEvent(self, newObject):
85 self._events.append(newObject)
86
87 # Override the normal SimObject::regProbeListeners method and
88 # register deferred event handlers.
89 def regProbeListeners(self):
90 for event in self._events:
91 event.register()
92 self.getCCObject().regProbeListeners()
93
94 def listenFromProbe(self, simObj, *probeNames):
95 if not isinstance(simObj, SimObject):
96 raise TypeError("argument must be of SimObject type")
97 if len(probeNames) <= 0:
98 raise TypeError("probeNames must have at least one element")
99 self.addEvent(HWPProbeEvent(self, simObj, *probeNames))
100
101class QueuedPrefetcher(BasePrefetcher):
102 type = "QueuedPrefetcher"
103 abstract = True
104 cxx_class = "QueuedPrefetcher"
105 cxx_header = "mem/cache/prefetch/queued.hh"
106 latency = Param.Int(1, "Latency for generated prefetches")
107 queue_size = Param.Int(32, "Maximum number of queued prefetches")
108 queue_squash = Param.Bool(True, "Squash queued prefetch on demand access")
109 queue_filter = Param.Bool(True, "Don't queue redundant prefetches")
110 cache_snoop = Param.Bool(False, "Snoop cache to eliminate redundant request")
111
112 tag_prefetch = Param.Bool(True, "Tag prefetch with PC of generating access")
113
114class StridePrefetcher(QueuedPrefetcher):
115 type = 'StridePrefetcher'
116 cxx_class = 'StridePrefetcher'
117 cxx_header = "mem/cache/prefetch/stride.hh"
118
119 # Do not consult stride prefetcher on instruction accesses
120 on_inst = False
121
122 max_conf = Param.Int(7, "Maximum confidence level")
123 thresh_conf = Param.Int(4, "Threshold confidence level")
124 min_conf = Param.Int(0, "Minimum confidence level")
125 start_conf = Param.Int(4, "Starting confidence for new entries")
126
127 table_sets = Param.Int(16, "Number of sets in PC lookup table")
128 table_assoc = Param.Int(4, "Associativity of PC lookup table")
129 use_master_id = Param.Bool(True, "Use master id based history")
130
131 degree = Param.Int(4, "Number of prefetches to generate")
132
133 # Get replacement policy
134 replacement_policy = Param.BaseReplacementPolicy(RandomRP(),
135 "Replacement policy")
136
137class TaggedPrefetcher(QueuedPrefetcher):
138 type = 'TaggedPrefetcher'
139 cxx_class = 'TaggedPrefetcher'
140 cxx_header = "mem/cache/prefetch/tagged.hh"
141
142 degree = Param.Int(2, "Number of prefetches to generate")
143
144class SignaturePathPrefetcher(QueuedPrefetcher):
145 type = 'SignaturePathPrefetcher'
146 cxx_class = 'SignaturePathPrefetcher'
147 cxx_header = "mem/cache/prefetch/signature_path.hh"
148
149 signature_shift = Param.UInt8(3,
150 "Number of bits to shift when calculating a new signature");
151 signature_bits = Param.UInt16(12,
152 "Size of the signature, in bits");
153 signature_table_entries = Param.MemorySize("1024",
154 "Number of entries of the signature table")
155 signature_table_assoc = Param.Unsigned(2,
156 "Associativity of the signature table")
157 signature_table_indexing_policy = Param.BaseIndexingPolicy(
158 SetAssociative(entry_size = 1, assoc = Parent.signature_table_assoc,
159 size = Parent.signature_table_entries),
160 "Indexing policy of the signature table")
161 signature_table_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
162 "Replacement policy of the signature table")
163
164 max_counter_value = Param.UInt8(7, "Maximum pattern counter value")
165 pattern_table_entries = Param.MemorySize("4096",
166 "Number of entries of the pattern table")
167 pattern_table_assoc = Param.Unsigned(1,
168 "Associativity of the pattern table")
169 strides_per_pattern_entry = Param.Unsigned(4,
170 "Number of strides stored in each pattern entry")
171 pattern_table_indexing_policy = Param.BaseIndexingPolicy(
172 SetAssociative(entry_size = 1, assoc = Parent.pattern_table_assoc,
173 size = Parent.pattern_table_entries),
174 "Indexing policy of the pattern table")
175 pattern_table_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
176 "Replacement policy of the pattern table")
177
178 prefetch_confidence_threshold = Param.Float(0.5,
179 "Minimum confidence to issue prefetches")
180 lookahead_confidence_threshold = Param.Float(0.75,
181 "Minimum confidence to continue exploring lookahead entries")
182
|
183class AccessMapPatternMatchingPrefetcher(QueuedPrefetcher):
184 type = 'AccessMapPatternMatchingPrefetcher'
185 cxx_class = 'AccessMapPatternMatchingPrefetcher'
186 cxx_header = "mem/cache/prefetch/access_map_pattern_matching.hh"
187
188 start_degree = Param.Unsigned(4,
189 "Initial degree (Maximum number of prefetches generated")
190 hot_zone_size = Param.MemorySize("2kB", "Memory covered by a hot zone")
191 access_map_table_entries = Param.MemorySize("256",
192 "Number of entries in the access map table")
193 access_map_table_assoc = Param.Unsigned(8,
194 "Associativity of the access map table")
195 access_map_table_indexing_policy = Param.BaseIndexingPolicy(
196 SetAssociative(entry_size = 1, assoc = Parent.access_map_table_assoc,
197 size = Parent.access_map_table_entries),
198 "Indexing policy of the access map table")
199 access_map_table_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
200 "Replacement policy of the access map table")
201 high_coverage_threshold = Param.Float(0.25,
202 "A prefetch coverage factor bigger than this is considered high")
203 low_coverage_threshold = Param.Float(0.125,
204 "A prefetch coverage factor smaller than this is considered low")
205 high_accuracy_threshold = Param.Float(0.5,
206 "A prefetch accuracy factor bigger than this is considered high")
207 low_accuracy_threshold = Param.Float(0.25,
208 "A prefetch accuracy factor smaller than this is considered low")
209 high_cache_hit_threshold = Param.Float(0.875,
210 "A cache hit ratio bigger than this is considered high")
211 low_cache_hit_threshold = Param.Float(0.75,
212 "A cache hit ratio smaller than this is considered low")
213 epoch_cycles = Param.Cycles(256000, "Cycles in an epoch period")
214 offchip_memory_latency = Param.Latency("30ns",
215 "Memory latency used to compute the required memory bandwidth")
| 206class AccessMapPatternMatchingPrefetcher(QueuedPrefetcher):
207 type = 'AccessMapPatternMatchingPrefetcher'
208 cxx_class = 'AccessMapPatternMatchingPrefetcher'
209 cxx_header = "mem/cache/prefetch/access_map_pattern_matching.hh"
210
211 start_degree = Param.Unsigned(4,
212 "Initial degree (Maximum number of prefetches generated")
213 hot_zone_size = Param.MemorySize("2kB", "Memory covered by a hot zone")
214 access_map_table_entries = Param.MemorySize("256",
215 "Number of entries in the access map table")
216 access_map_table_assoc = Param.Unsigned(8,
217 "Associativity of the access map table")
218 access_map_table_indexing_policy = Param.BaseIndexingPolicy(
219 SetAssociative(entry_size = 1, assoc = Parent.access_map_table_assoc,
220 size = Parent.access_map_table_entries),
221 "Indexing policy of the access map table")
222 access_map_table_replacement_policy = Param.BaseReplacementPolicy(LRURP(),
223 "Replacement policy of the access map table")
224 high_coverage_threshold = Param.Float(0.25,
225 "A prefetch coverage factor bigger than this is considered high")
226 low_coverage_threshold = Param.Float(0.125,
227 "A prefetch coverage factor smaller than this is considered low")
228 high_accuracy_threshold = Param.Float(0.5,
229 "A prefetch accuracy factor bigger than this is considered high")
230 low_accuracy_threshold = Param.Float(0.25,
231 "A prefetch accuracy factor smaller than this is considered low")
232 high_cache_hit_threshold = Param.Float(0.875,
233 "A cache hit ratio bigger than this is considered high")
234 low_cache_hit_threshold = Param.Float(0.75,
235 "A cache hit ratio smaller than this is considered low")
236 epoch_cycles = Param.Cycles(256000, "Cycles in an epoch period")
237 offchip_memory_latency = Param.Latency("30ns",
238 "Memory latency used to compute the required memory bandwidth")
|