noncoherent_cache.cc (13478:59414c401cd9) noncoherent_cache.cc (13564:9bbd53a77887)
1/*
2 * Copyright (c) 2010-2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 274 unchanged lines hidden (view full) ---

283 completion_time - target.recvTime;
284
285 tgt_pkt->makeTimingResponse();
286 if (pkt->isError())
287 tgt_pkt->copyError(pkt);
288
289 // Reset the bus additional time as it is now accounted for
290 tgt_pkt->headerDelay = tgt_pkt->payloadDelay = 0;
1/*
2 * Copyright (c) 2010-2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 274 unchanged lines hidden (view full) ---

283 completion_time - target.recvTime;
284
285 tgt_pkt->makeTimingResponse();
286 if (pkt->isError())
287 tgt_pkt->copyError(pkt);
288
289 // Reset the bus additional time as it is now accounted for
290 tgt_pkt->headerDelay = tgt_pkt->payloadDelay = 0;
291 cpuSidePort.schedTimingResp(tgt_pkt, completion_time, true);
291 cpuSidePort.schedTimingResp(tgt_pkt, completion_time);
292 break;
293
294 case MSHR::Target::FromPrefetcher:
295 // handle deferred requests comming from a prefetcher
296 // attached to this cache
297 assert(tgt_pkt->cmd == MemCmd::HardPFReq);
298
299 if (blk)

--- 68 unchanged lines hidden --- 		292 break;
293
294 case MSHR::Target::FromPrefetcher:
295 // handle deferred requests comming from a prefetcher
296 // attached to this cache
297 assert(tgt_pkt->cmd == MemCmd::HardPFReq);
298
299 if (blk)

--- 68 unchanged lines hidden ---