2c2
< * Copyright (c) 2012 ARM Limited
---
> * Copyright (c) 2012-2013 ARM Limited
54,56c54,56
< : label(_label),
< numEntries(num_entries + reserve - 1), numReserve(reserve),
< drainManager(NULL), index(_index)
---
> : label(_label), numEntries(num_entries + reserve - 1),
> numReserve(reserve), registers(numEntries),
> drainManager(NULL), allocated(0), inServiceEntries(0), index(_index)
58,60d57
< allocated = 0;
< inServiceEntries = 0;
< registers = new MSHR[numEntries];
67,71d63
< MSHRQueue::~MSHRQueue()
< {
< delete [] registers;
< }
<
256c248
< assert(mshr->ntargets==0);
---
> assert(mshr->getNumTargets()==0);