mshr.hh (12715:0c8b4f376378) mshr.hh (12724:4f6fac3191d2)
1/*
2 * Copyright (c) 2012-2013, 2015-2016, 2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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48#ifndef __MEM_CACHE_MSHR_HH__
49#define __MEM_CACHE_MSHR_HH__
50
51#include <list>
52
53#include "base/printable.hh"
54#include "mem/cache/queue_entry.hh"
55
1/*
2 * Copyright (c) 2012-2013, 2015-2016, 2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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48#ifndef __MEM_CACHE_MSHR_HH__
49#define __MEM_CACHE_MSHR_HH__
50
51#include <list>
52
53#include "base/printable.hh"
54#include "mem/cache/queue_entry.hh"
55
56class Cache;
56class BaseCache;
57
58/**
59 * Miss Status and handling Register. This class keeps all the information
60 * needed to handle a cache miss including a list of target requests.
61 * @sa \ref gem5MemorySystem "gem5 Memory System"
62 */
63class MSHR : public QueueEntry, public Printable
64{

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258 bool hasPostInvalidate() const {
259 assert(inService); return postInvalidate;
260 }
261
262 bool hasPostDowngrade() const {
263 assert(inService); return postDowngrade;
264 }
265
57
58/**
59 * Miss Status and handling Register. This class keeps all the information
60 * needed to handle a cache miss including a list of target requests.
61 * @sa \ref gem5MemorySystem "gem5 Memory System"
62 */
63class MSHR : public QueueEntry, public Printable
64{

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258 bool hasPostInvalidate() const {
259 assert(inService); return postInvalidate;
260 }
261
262 bool hasPostDowngrade() const {
263 assert(inService); return postDowngrade;
264 }
265
266 bool sendPacket(Cache &cache);
266 bool sendPacket(BaseCache &cache);
267
268 bool allocOnFill() const {
269 return targets.allocOnFill;
270 }
271
272 /**
273 * Determine if there are non-deferred requests from other caches
274 *

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268 bool allocOnFill() const {
269 return targets.allocOnFill;
270 }
271
272 /**
273 * Determine if there are non-deferred requests from other caches
274 *

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