mshr.hh (11357:6668387fa488) | mshr.hh (11375:f98df9231cdd) |
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1/* | 1/* |
2 * Copyright (c) 2012-2013, 2015 ARM Limited | 2 * Copyright (c) 2012-2013, 2015-2016 ARM Limited |
3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 35 unchanged lines hidden (view full) --- 46 */ 47 48#ifndef __MEM_CACHE_MSHR_HH__ 49#define __MEM_CACHE_MSHR_HH__ 50 51#include <list> 52 53#include "base/printable.hh" | 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 35 unchanged lines hidden (view full) --- 46 */ 47 48#ifndef __MEM_CACHE_MSHR_HH__ 49#define __MEM_CACHE_MSHR_HH__ 50 51#include <list> 52 53#include "base/printable.hh" |
54#include "mem/packet.hh" | 54#include "mem/cache/queue_entry.hh" |
55 | 55 |
56class CacheBlk; 57class MSHRQueue; | 56class Cache; |
58 59/** 60 * Miss Status and handling Register. This class keeps all the information 61 * needed to handle a cache miss including a list of target requests. 62 * @sa \ref gem5MemorySystem "gem5 Memory System" 63 */ | 57 58/** 59 * Miss Status and handling Register. This class keeps all the information 60 * needed to handle a cache miss including a list of target requests. 61 * @sa \ref gem5MemorySystem "gem5 Memory System" 62 */ |
64class MSHR : public Packet::SenderState, public Printable | 63class MSHR : public QueueEntry, public Printable |
65{ 66 67 /** | 64{ 65 66 /** |
68 * Consider the MSHRQueue a friend to avoid making everything public | 67 * Consider the queues friends to avoid making everything public. |
69 */ | 68 */ |
69 template<typename Entry> 70 friend class Queue; |
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70 friend class MSHRQueue; 71 72 private: 73 | 71 friend class MSHRQueue; 72 73 private: 74 |
74 /** Cycle when ready to issue */ 75 Tick readyTime; 76 77 /** True if the request is uncacheable */ 78 bool _isUncacheable; 79 | |
80 /** Flag set by downstream caches */ 81 bool downstreamPending; 82 83 /** 84 * Here we use one flag to track both if: 85 * 86 * 1. We are going to become owner or not, i.e., we will get the 87 * block in an ownership state (Owned or Modified) with BlkDirty --- 21 unchanged lines hidden (view full) --- 109 /** Did we snoop an invalidate while waiting for data? */ 110 bool postInvalidate; 111 112 /** Did we snoop a read while waiting for data? */ 113 bool postDowngrade; 114 115 public: 116 | 75 /** Flag set by downstream caches */ 76 bool downstreamPending; 77 78 /** 79 * Here we use one flag to track both if: 80 * 81 * 1. We are going to become owner or not, i.e., we will get the 82 * block in an ownership state (Owned or Modified) with BlkDirty --- 21 unchanged lines hidden (view full) --- 104 /** Did we snoop an invalidate while waiting for data? */ 105 bool postInvalidate; 106 107 /** Did we snoop a read while waiting for data? */ 108 bool postDowngrade; 109 110 public: 111 |
112 /** True if the entry is just a simple forward from an upper level */ 113 bool isForward; 114 |
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117 class Target { 118 public: 119 120 enum Source { 121 FromCPU, 122 FromSnoop, 123 FromPrefetcher 124 }; --- 36 unchanged lines hidden (view full) --- 161 void print(std::ostream &os, int verbosity, 162 const std::string &prefix) const; 163 }; 164 165 /** A list of MSHRs. */ 166 typedef std::list<MSHR *> List; 167 /** MSHR list iterator. */ 168 typedef List::iterator Iterator; | 115 class Target { 116 public: 117 118 enum Source { 119 FromCPU, 120 FromSnoop, 121 FromPrefetcher 122 }; --- 36 unchanged lines hidden (view full) --- 159 void print(std::ostream &os, int verbosity, 160 const std::string &prefix) const; 161 }; 162 163 /** A list of MSHRs. */ 164 typedef std::list<MSHR *> List; 165 /** MSHR list iterator. */ 166 typedef List::iterator Iterator; |
169 /** MSHR list const_iterator. */ 170 typedef List::const_iterator ConstIterator; | |
171 | 167 |
172 /** Pointer to queue containing this MSHR. */ 173 MSHRQueue *queue; 174 175 /** Order number assigned by the miss queue. */ 176 Counter order; 177 178 /** Block aligned address of the MSHR. */ 179 Addr blkAddr; 180 181 /** Block size of the cache. */ 182 unsigned blkSize; 183 184 /** True if the request targets the secure memory space. */ 185 bool isSecure; 186 187 /** True if the request has been sent to the bus. */ 188 bool inService; 189 190 /** True if the request is just a simple forward from an upper level */ 191 bool isForward; 192 | |
193 /** Keep track of whether we should allocate on fill or not */ 194 bool allocOnFill; 195 196 /** The pending* and post* flags are only valid if inService is 197 * true. Using the accessor functions lets us detect if these 198 * flags are accessed improperly. 199 */ 200 --- 7 unchanged lines hidden (view full) --- 208 bool hasPostInvalidate() const { 209 assert(inService); return postInvalidate; 210 } 211 212 bool hasPostDowngrade() const { 213 assert(inService); return postDowngrade; 214 } 215 | 168 /** Keep track of whether we should allocate on fill or not */ 169 bool allocOnFill; 170 171 /** The pending* and post* flags are only valid if inService is 172 * true. Using the accessor functions lets us detect if these 173 * flags are accessed improperly. 174 */ 175 --- 7 unchanged lines hidden (view full) --- 183 bool hasPostInvalidate() const { 184 assert(inService); return postInvalidate; 185 } 186 187 bool hasPostDowngrade() const { 188 assert(inService); return postDowngrade; 189 } 190 |
191 bool sendPacket(Cache &cache); 192 |
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216 private: 217 | 193 private: 194 |
218 /** Data buffer (if needed). Currently used only for pending 219 * upgrade handling. */ 220 uint8_t *data; 221 | |
222 /** 223 * Pointer to this MSHR on the ready list. 224 * @sa MissQueue, MSHRQueue::readyList 225 */ 226 Iterator readyIter; 227 228 /** 229 * Pointer to this MSHR on the allocated list. 230 * @sa MissQueue, MSHRQueue::allocatedList 231 */ 232 Iterator allocIter; 233 234 /** List of all requests that match the address */ 235 TargetList targets; 236 237 TargetList deferredTargets; 238 239 public: 240 | 195 /** 196 * Pointer to this MSHR on the ready list. 197 * @sa MissQueue, MSHRQueue::readyList 198 */ 199 Iterator readyIter; 200 201 /** 202 * Pointer to this MSHR on the allocated list. 203 * @sa MissQueue, MSHRQueue::allocatedList 204 */ 205 Iterator allocIter; 206 207 /** List of all requests that match the address */ 208 TargetList targets; 209 210 TargetList deferredTargets; 211 212 public: 213 |
241 bool isUncacheable() const { return _isUncacheable; } 242 | |
243 /** 244 * Allocate a miss to this MSHR. 245 * @param blk_addr The address of the block. 246 * @param blk_size The number of bytes to request. 247 * @param pkt The original miss. 248 * @param when_ready When should the MSHR be ready to act upon. 249 * @param _order The logical order of this MSHR 250 * @param alloc_on_fill Should the cache allocate a block on fill 251 */ 252 void allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt, 253 Tick when_ready, Counter _order, bool alloc_on_fill); 254 | 214 /** 215 * Allocate a miss to this MSHR. 216 * @param blk_addr The address of the block. 217 * @param blk_size The number of bytes to request. 218 * @param pkt The original miss. 219 * @param when_ready When should the MSHR be ready to act upon. 220 * @param _order The logical order of this MSHR 221 * @param alloc_on_fill Should the cache allocate a block on fill 222 */ 223 void allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt, 224 Tick when_ready, Counter _order, bool alloc_on_fill); 225 |
255 bool markInService(bool pending_modified_resp); | 226 void markInService(bool pending_modified_resp); |
256 257 void clearDownstreamPending(); 258 259 /** 260 * Mark this MSHR as free. 261 */ 262 void deallocate(); 263 --- 34 unchanged lines hidden (view full) --- 298 /** 299 * Pop first target. 300 */ 301 void popTarget() 302 { 303 targets.pop_front(); 304 } 305 | 227 228 void clearDownstreamPending(); 229 230 /** 231 * Mark this MSHR as free. 232 */ 233 void deallocate(); 234 --- 34 unchanged lines hidden (view full) --- 269 /** 270 * Pop first target. 271 */ 272 void popTarget() 273 { 274 targets.pop_front(); 275 } 276 |
306 bool isForwardNoResponse() const 307 { 308 if (getNumTargets() != 1) 309 return false; 310 const Target *tgt = &targets.front(); 311 return tgt->source == Target::FromCPU && !tgt->pkt->needsResponse(); 312 } 313 | |
314 bool promoteDeferredTargets(); 315 316 void promoteWritable(); 317 318 bool checkFunctional(PacketPtr pkt); 319 320 /** 321 * Prints the contents of this MSHR for debugging. --- 14 unchanged lines hidden --- | 277 bool promoteDeferredTargets(); 278 279 void promoteWritable(); 280 281 bool checkFunctional(PacketPtr pkt); 282 283 /** 284 * Prints the contents of this MSHR for debugging. --- 14 unchanged lines hidden --- |