1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Erik Hallnor
29 */
30
31/**
32 * @file
33 * Miss Status and Handling Register (MSHR) declaration.
34 */
35
36#ifndef __MSHR_HH__
37#define __MSHR_HH__
38
39#include <list>
40
41#include "base/printable.hh"
42#include "mem/packet.hh"
43
44class CacheBlk;
45class MSHRQueue;
46
47/**
48 * Miss Status and handling Register. This class keeps all the information
49 * needed to handle a cache miss including a list of target requests.
50 */
51class MSHR : public Packet::SenderState, public Printable
52{
53
54 public:
55
56 class Target {
57 public:
| 1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Erik Hallnor
29 */
30
31/**
32 * @file
33 * Miss Status and Handling Register (MSHR) declaration.
34 */
35
36#ifndef __MSHR_HH__
37#define __MSHR_HH__
38
39#include <list>
40
41#include "base/printable.hh"
42#include "mem/packet.hh"
43
44class CacheBlk;
45class MSHRQueue;
46
47/**
48 * Miss Status and handling Register. This class keeps all the information
49 * needed to handle a cache miss including a list of target requests.
50 */
51class MSHR : public Packet::SenderState, public Printable
52{
53
54 public:
55
56 class Target {
57 public:
|
| 58
59 enum Source {
60 FromCPU,
61 FromSnoop,
62 FromPrefetcher
63 };
64
|
58 Tick recvTime; //!< Time when request was received (for stats)
59 Tick readyTime; //!< Time when request is ready to be serviced
60 Counter order; //!< Global order (for memory consistency mgmt)
61 PacketPtr pkt; //!< Pending request packet.
| 65 Tick recvTime; //!< Time when request was received (for stats)
66 Tick readyTime; //!< Time when request is ready to be serviced
67 Counter order; //!< Global order (for memory consistency mgmt)
68 PacketPtr pkt; //!< Pending request packet.
|
62 bool cpuSide; //!< Did request come from cpu side or mem side?
| 69 Source source; //!< Did request come from cpu, memory, or prefetcher?
|
63 bool markedPending; //!< Did we mark upstream MSHR
64 //!< as downstreamPending?
65
| 70 bool markedPending; //!< Did we mark upstream MSHR
71 //!< as downstreamPending?
72
|
66 bool isCpuSide() const { return cpuSide; }
67
| |
68 Target(PacketPtr _pkt, Tick _readyTime, Counter _order,
| 73 Target(PacketPtr _pkt, Tick _readyTime, Counter _order,
|
69 bool _cpuSide, bool _markedPending)
| 74 Source _source, bool _markedPending)
|
70 : recvTime(curTick), readyTime(_readyTime), order(_order),
| 75 : recvTime(curTick), readyTime(_readyTime), order(_order),
|
71 pkt(_pkt), cpuSide(_cpuSide), markedPending(_markedPending)
| 76 pkt(_pkt), source(_source), markedPending(_markedPending)
|
72 {}
73 };
74
75 class TargetList : public std::list<Target> {
76 /** Target list iterator. */
77 typedef std::list<Target>::iterator Iterator;
78 typedef std::list<Target>::const_iterator ConstIterator;
79
80 public:
81 bool needsExclusive;
82 bool hasUpgrade;
83
84 TargetList();
85 void resetFlags() { needsExclusive = hasUpgrade = false; }
86 bool isReset() { return !needsExclusive && !hasUpgrade; }
87 void add(PacketPtr pkt, Tick readyTime, Counter order,
| 77 {}
78 };
79
80 class TargetList : public std::list<Target> {
81 /** Target list iterator. */
82 typedef std::list<Target>::iterator Iterator;
83 typedef std::list<Target>::const_iterator ConstIterator;
84
85 public:
86 bool needsExclusive;
87 bool hasUpgrade;
88
89 TargetList();
90 void resetFlags() { needsExclusive = hasUpgrade = false; }
91 bool isReset() { return !needsExclusive && !hasUpgrade; }
92 void add(PacketPtr pkt, Tick readyTime, Counter order,
|
88 bool cpuSide, bool markPending);
| 93 Target::Source source, bool markPending);
|
89 void replaceUpgrades();
90 void clearDownstreamPending();
91 bool checkFunctional(PacketPtr pkt);
92 void print(std::ostream &os, int verbosity,
93 const std::string &prefix) const;
94 };
95
96 /** A list of MSHRs. */
97 typedef std::list<MSHR *> List;
98 /** MSHR list iterator. */
99 typedef List::iterator Iterator;
100 /** MSHR list const_iterator. */
101 typedef List::const_iterator ConstIterator;
102
103 /** Pointer to queue containing this MSHR. */
104 MSHRQueue *queue;
105
106 /** Cycle when ready to issue */
107 Tick readyTime;
108
109 /** Order number assigned by the miss queue. */
110 Counter order;
111
112 /** Address of the request. */
113 Addr addr;
114
115 /** Size of the request. */
116 int size;
117
118 /** True if the request has been sent to the bus. */
119 bool inService;
120
121 /** True if the request is just a simple forward from an upper level */
122 bool isForward;
123
124 /** True if we need to get an exclusive copy of the block. */
125 bool needsExclusive() const { return targets->needsExclusive; }
126
127 /** True if the request is uncacheable */
128 bool _isUncacheable;
129
130 bool downstreamPending;
131
132 bool pendingInvalidate;
133 bool pendingShared;
134
135 /** Thread number of the miss. */
136 short threadNum;
137 /** The number of currently allocated targets. */
138 short ntargets;
139
140
141 /** Data buffer (if needed). Currently used only for pending
142 * upgrade handling. */
143 uint8_t *data;
144
145 /**
146 * Pointer to this MSHR on the ready list.
147 * @sa MissQueue, MSHRQueue::readyList
148 */
149 Iterator readyIter;
150
151 /**
152 * Pointer to this MSHR on the allocated list.
153 * @sa MissQueue, MSHRQueue::allocatedList
154 */
155 Iterator allocIter;
156
157private:
158 /** List of all requests that match the address */
159 TargetList *targets;
160
161 TargetList *deferredTargets;
162
163public:
164
165 bool isUncacheable() { return _isUncacheable; }
166
167 /**
168 * Allocate a miss to this MSHR.
169 * @param cmd The requesting command.
170 * @param addr The address of the miss.
171 * @param asid The address space id of the miss.
172 * @param size The number of bytes to request.
173 * @param pkt The original miss.
174 */
175 void allocate(Addr addr, int size, PacketPtr pkt,
176 Tick when, Counter _order);
177
178 bool markInService();
179
180 void clearDownstreamPending();
181
182 /**
183 * Mark this MSHR as free.
184 */
185 void deallocate();
186
187 /**
188 * Add a request to the list of targets.
189 * @param target The target.
190 */
191 void allocateTarget(PacketPtr target, Tick when, Counter order);
192 bool handleSnoop(PacketPtr target, Counter order);
193
194 /** A simple constructor. */
195 MSHR();
196 /** A simple destructor. */
197 ~MSHR();
198
199 /**
200 * Returns the current number of allocated targets.
201 * @return The current number of allocated targets.
202 */
203 int getNumTargets() const { return ntargets; }
204
205 /**
206 * Returns a pointer to the target list.
207 * @return a pointer to the target list.
208 */
209 TargetList *getTargetList() { return targets; }
210
211 /**
212 * Returns true if there are targets left.
213 * @return true if there are targets
214 */
215 bool hasTargets() const { return !targets->empty(); }
216
217 /**
218 * Returns a reference to the first target.
219 * @return A pointer to the first target.
220 */
221 Target *getTarget() const
222 {
223 assert(hasTargets());
224 return &targets->front();
225 }
226
227 /**
228 * Pop first target.
229 */
230 void popTarget()
231 {
232 --ntargets;
233 targets->pop_front();
234 }
235
236 bool isForwardNoResponse() const
237 {
238 if (getNumTargets() != 1)
239 return false;
240 Target *tgt = getTarget();
| 94 void replaceUpgrades();
95 void clearDownstreamPending();
96 bool checkFunctional(PacketPtr pkt);
97 void print(std::ostream &os, int verbosity,
98 const std::string &prefix) const;
99 };
100
101 /** A list of MSHRs. */
102 typedef std::list<MSHR *> List;
103 /** MSHR list iterator. */
104 typedef List::iterator Iterator;
105 /** MSHR list const_iterator. */
106 typedef List::const_iterator ConstIterator;
107
108 /** Pointer to queue containing this MSHR. */
109 MSHRQueue *queue;
110
111 /** Cycle when ready to issue */
112 Tick readyTime;
113
114 /** Order number assigned by the miss queue. */
115 Counter order;
116
117 /** Address of the request. */
118 Addr addr;
119
120 /** Size of the request. */
121 int size;
122
123 /** True if the request has been sent to the bus. */
124 bool inService;
125
126 /** True if the request is just a simple forward from an upper level */
127 bool isForward;
128
129 /** True if we need to get an exclusive copy of the block. */
130 bool needsExclusive() const { return targets->needsExclusive; }
131
132 /** True if the request is uncacheable */
133 bool _isUncacheable;
134
135 bool downstreamPending;
136
137 bool pendingInvalidate;
138 bool pendingShared;
139
140 /** Thread number of the miss. */
141 short threadNum;
142 /** The number of currently allocated targets. */
143 short ntargets;
144
145
146 /** Data buffer (if needed). Currently used only for pending
147 * upgrade handling. */
148 uint8_t *data;
149
150 /**
151 * Pointer to this MSHR on the ready list.
152 * @sa MissQueue, MSHRQueue::readyList
153 */
154 Iterator readyIter;
155
156 /**
157 * Pointer to this MSHR on the allocated list.
158 * @sa MissQueue, MSHRQueue::allocatedList
159 */
160 Iterator allocIter;
161
162private:
163 /** List of all requests that match the address */
164 TargetList *targets;
165
166 TargetList *deferredTargets;
167
168public:
169
170 bool isUncacheable() { return _isUncacheable; }
171
172 /**
173 * Allocate a miss to this MSHR.
174 * @param cmd The requesting command.
175 * @param addr The address of the miss.
176 * @param asid The address space id of the miss.
177 * @param size The number of bytes to request.
178 * @param pkt The original miss.
179 */
180 void allocate(Addr addr, int size, PacketPtr pkt,
181 Tick when, Counter _order);
182
183 bool markInService();
184
185 void clearDownstreamPending();
186
187 /**
188 * Mark this MSHR as free.
189 */
190 void deallocate();
191
192 /**
193 * Add a request to the list of targets.
194 * @param target The target.
195 */
196 void allocateTarget(PacketPtr target, Tick when, Counter order);
197 bool handleSnoop(PacketPtr target, Counter order);
198
199 /** A simple constructor. */
200 MSHR();
201 /** A simple destructor. */
202 ~MSHR();
203
204 /**
205 * Returns the current number of allocated targets.
206 * @return The current number of allocated targets.
207 */
208 int getNumTargets() const { return ntargets; }
209
210 /**
211 * Returns a pointer to the target list.
212 * @return a pointer to the target list.
213 */
214 TargetList *getTargetList() { return targets; }
215
216 /**
217 * Returns true if there are targets left.
218 * @return true if there are targets
219 */
220 bool hasTargets() const { return !targets->empty(); }
221
222 /**
223 * Returns a reference to the first target.
224 * @return A pointer to the first target.
225 */
226 Target *getTarget() const
227 {
228 assert(hasTargets());
229 return &targets->front();
230 }
231
232 /**
233 * Pop first target.
234 */
235 void popTarget()
236 {
237 --ntargets;
238 targets->pop_front();
239 }
240
241 bool isForwardNoResponse() const
242 {
243 if (getNumTargets() != 1)
244 return false;
245 Target *tgt = getTarget();
|
241 return tgt->isCpuSide() && !tgt->pkt->needsResponse();
| 246 return tgt->source == Target::FromCPU && !tgt->pkt->needsResponse();
|
242 }
243
244 bool promoteDeferredTargets();
245
246 void handleFill(Packet *pkt, CacheBlk *blk);
247
248 bool checkFunctional(PacketPtr pkt);
249
250 /**
251 * Prints the contents of this MSHR for debugging.
252 */
253 void print(std::ostream &os,
254 int verbosity = 0,
255 const std::string &prefix = "") const;
256};
257
258#endif //__MSHR_HH__
| 247 }
248
249 bool promoteDeferredTargets();
250
251 void handleFill(Packet *pkt, CacheBlk *blk);
252
253 bool checkFunctional(PacketPtr pkt);
254
255 /**
256 * Prints the contents of this MSHR for debugging.
257 */
258 void print(std::ostream &os,
259 int verbosity = 0,
260 const std::string &prefix = "") const;
261};
262
263#endif //__MSHR_HH__
|