mshr.cc (11863:b47dda418ae6) | mshr.cc (11866:8732d8d0a9e5) |
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1/* | 1/* |
2 * Copyright (c) 2012-2013, 2015-2016 ARM Limited | 2 * Copyright (c) 2012-2013, 2015-2017 ARM Limited |
3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 449 unchanged lines hidden (view full) --- 460 TargetList ready_targets; 461 // If the downstream MSHR got an invalidation request then we only 462 // service the first of the FromCPU targets and any other 463 // non-FromCPU target. This way the remaining FromCPU targets 464 // issue a new request and get a fresh copy of the block and we 465 // avoid memory consistency violations. 466 if (pkt->cmd == MemCmd::ReadRespWithInvalidate) { 467 auto it = targets.begin(); | 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 449 unchanged lines hidden (view full) --- 460 TargetList ready_targets; 461 // If the downstream MSHR got an invalidation request then we only 462 // service the first of the FromCPU targets and any other 463 // non-FromCPU target. This way the remaining FromCPU targets 464 // issue a new request and get a fresh copy of the block and we 465 // avoid memory consistency violations. 466 if (pkt->cmd == MemCmd::ReadRespWithInvalidate) { 467 auto it = targets.begin(); |
468 assert(it->source == Target::FromCPU); | 468 assert((it->source == Target::FromCPU) || 469 (it->source == Target::FromPrefetcher)); |
469 ready_targets.push_back(*it); 470 it = targets.erase(it); 471 while (it != targets.end()) { 472 if (it->source == Target::FromCPU) { 473 it++; 474 } else { 475 assert(it->source == Target::FromSnoop); 476 ready_targets.push_back(*it); --- 117 unchanged lines hidden --- | 470 ready_targets.push_back(*it); 471 it = targets.erase(it); 472 while (it != targets.end()) { 473 if (it->source == Target::FromCPU) { 474 it++; 475 } else { 476 assert(it->source == Target::FromSnoop); 477 ready_targets.push_back(*it); --- 117 unchanged lines hidden --- |