mshr.cc (11271:f4ad5be63ba8) | mshr.cc (11278:18411ccc4f3c) |
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1/* 2 * Copyright (c) 2012-2013, 2015 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 53 unchanged lines hidden (view full) --- 62using namespace std; 63 64MSHR::MSHR() : readyTime(0), _isUncacheable(false), downstreamPending(false), 65 pendingDirty(false), 66 postInvalidate(false), postDowngrade(false), 67 queue(NULL), order(0), blkAddr(0), 68 blkSize(0), isSecure(false), inService(false), 69 isForward(false), allocOnFill(false), | 1/* 2 * Copyright (c) 2012-2013, 2015 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 53 unchanged lines hidden (view full) --- 62using namespace std; 63 64MSHR::MSHR() : readyTime(0), _isUncacheable(false), downstreamPending(false), 65 pendingDirty(false), 66 postInvalidate(false), postDowngrade(false), 67 queue(NULL), order(0), blkAddr(0), 68 blkSize(0), isSecure(false), inService(false), 69 isForward(false), allocOnFill(false), |
70 threadNum(InvalidThreadID), data(NULL) | 70 data(NULL) |
71{ 72} 73 74 75MSHR::TargetList::TargetList() 76 : needsExclusive(false), hasUpgrade(false) 77{} 78 --- 132 unchanged lines hidden (view full) --- 211 readyTime = when_ready; 212 order = _order; 213 assert(target); 214 isForward = false; 215 allocOnFill = alloc_on_fill; 216 _isUncacheable = target->req->isUncacheable(); 217 inService = false; 218 downstreamPending = false; | 71{ 72} 73 74 75MSHR::TargetList::TargetList() 76 : needsExclusive(false), hasUpgrade(false) 77{} 78 --- 132 unchanged lines hidden (view full) --- 211 readyTime = when_ready; 212 order = _order; 213 assert(target); 214 isForward = false; 215 allocOnFill = alloc_on_fill; 216 _isUncacheable = target->req->isUncacheable(); 217 inService = false; 218 downstreamPending = false; |
219 threadNum = 0; | |
220 assert(targets.isReset()); 221 // Don't know of a case where we would allocate a new MSHR for a 222 // snoop (mem-side request), so set source according to request here 223 Target::Source source = (target->cmd == MemCmd::HardPFReq) ? 224 Target::FromPrefetcher : Target::FromCPU; 225 targets.add(target, when_ready, _order, source, true); 226 assert(deferredTargets.isReset()); 227 data = NULL; --- 285 unchanged lines hidden --- | 219 assert(targets.isReset()); 220 // Don't know of a case where we would allocate a new MSHR for a 221 // snoop (mem-side request), so set source according to request here 222 Target::Source source = (target->cmd == MemCmd::HardPFReq) ? 223 Target::FromPrefetcher : Target::FromCPU; 224 targets.add(target, when_ready, _order, source, true); 225 assert(deferredTargets.isReset()); 226 data = NULL; --- 285 unchanged lines hidden --- |