1/* 2 * Copyright (c) 2012-2013, 2015-2018 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 46 unchanged lines hidden (view full) --- 55#include <vector> 56 57#include "base/logging.hh" 58#include "base/types.hh" 59#include "debug/Cache.hh" 60#include "mem/cache/cache.hh" 61#include "sim/core.hh" 62 |
63MSHR::MSHR() : downstreamPending(false), 64 pendingModified(false), 65 postInvalidate(false), postDowngrade(false), 66 isForward(false) 67{ 68} 69 70MSHR::TargetList::TargetList() --- 539 unchanged lines hidden (view full) --- 610 ccprintf(os, "%s Deferred Targets:\n", prefix); 611 deferredTargets.print(os, verbosity, prefix + " "); 612 } 613} 614 615std::string 616MSHR::print() const 617{ |
618 std::ostringstream str; |
619 print(str); 620 return str.str(); 621} |