Deleted Added
sdiff udiff text old ( 12726:850e9965525b ) new ( 12727:56c23b54bcb1 )
full compact
1/*
2 * Copyright (c) 2012-2013, 2015-2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 35 unchanged lines hidden (view full) ---

44
45/**
46 * @file
47 * Miss Status and Handling Register (MSHR) definitions.
48 */
49
50#include "mem/cache/mshr.hh"
51
52#include <cassert>
53#include <string>
54
55#include "base/logging.hh"
56#include "base/trace.hh"
57#include "base/types.hh"
58#include "debug/Cache.hh"
59#include "mem/cache/base.hh"
60#include "mem/request.hh"
61#include "sim/core.hh"
62
63MSHR::MSHR() : downstreamPending(false),
64 pendingModified(false),
65 postInvalidate(false), postDowngrade(false),
66 isForward(false)
67{
68}

--- 554 unchanged lines hidden ---