1/*
2 * Copyright (c) 2018 Inria
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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35 * line.
36 */
37
38#ifndef __MEM_CACHE_COMPRESSORS_BASE_HH__
39#define __MEM_CACHE_COMPRESSORS_BASE_HH__
40
41#include <cstdint>
42
43#include "base/statistics.hh"
44#include "base/types.hh"
45#include "sim/sim_object.hh"
46
47class CacheBlk;
48struct BaseCacheCompressorParams;
49
50/**
51 * Base cache compressor interface. Every cache compressor must implement a

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60 class CompressionData;
61
62 /**
63 * Uncompressed cache line size (in bytes).
64 */
65 const std::size_t blkSize;
66
67 /**
68 * @defgroup CompressionStats Compression specific statistics.
69 * @{
70 */
71
72 /** Number of blocks that were compressed to this power of two size. */
73 Stats::Vector compressionSize;
74
75 /**
76 * @}
77 */
78
79 /**
80 * Apply the compression process to the cache line.
81 * Returns the number of cycles used by the compressor, however it is
82 * usually covered by a good pipelined execution, and is currently ignored.
83 * The decompression latency is also returned, in order to avoid
84 * increasing simulation time and memory consumption.
85 *
86 * @param cache_line The cache line to be compressed.
87 * @param comp_lat Compression latency in number of cycles.

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144
145 /**
146 * Set the size of the compressed block, in bits.
147 *
148 * @param blk The compressed block.
149 * @param size_bits The block size.
150 */
151 static void setSizeBits(CacheBlk* blk, const std::size_t size_bits);
152
153 /**
154 * Register local statistics.
155 */
156 void regStats() override;
157};
158
159class BaseCacheCompressor::CompressionData {
160 private:
161 /**
162 * Compressed cache line size (in bits).
163 */
164 std::size_t _size;

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