cache.hh (8711:c7e14f52c682) | cache.hh (8831:6c08a877af8f) |
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1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 197 unchanged lines hidden (view full) --- 206 * Create a writeback request for the given block. 207 * @param blk The block to writeback. 208 * @return The writeback request for the block. 209 */ 210 PacketPtr writebackBlk(BlkType *blk); 211 212 public: 213 /** Instantiates a basic cache object. */ | 1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 197 unchanged lines hidden (view full) --- 206 * Create a writeback request for the given block. 207 * @param blk The block to writeback. 208 * @return The writeback request for the block. 209 */ 210 PacketPtr writebackBlk(BlkType *blk); 211 212 public: 213 /** Instantiates a basic cache object. */ |
214 Cache(const Params *p, TagStore *tags, BasePrefetcher *prefetcher); | 214 Cache(const Params *p, TagStore *tags); |
215 216 virtual Port *getPort(const std::string &if_name, int idx = -1); 217 218 void regStats(); 219 220 /** 221 * Performs the access specified by the request. 222 * @param pkt The request to perform. --- 115 unchanged lines hidden --- | 215 216 virtual Port *getPort(const std::string &if_name, int idx = -1); 217 218 void regStats(); 219 220 /** 221 * Performs the access specified by the request. 222 * @param pkt The request to perform. --- 115 unchanged lines hidden --- |