cache.hh (8229:78bf55f23338) cache.hh (8702:2764cd55d2ad)
1/*
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright

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220 * @param pkt The request to perform.
221 * @return The result of the access.
222 */
223 Tick atomicAccess(PacketPtr pkt);
224
225 /**
226 * Performs the access specified by the request.
227 * @param pkt The request to perform.
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright

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232 * @param pkt The request to perform.
233 * @return The result of the access.
234 */
235 Tick atomicAccess(PacketPtr pkt);
236
237 /**
238 * Performs the access specified by the request.
239 * @param pkt The request to perform.
228 * @return The result of the access.
240 * @param fromCpuSide from the CPU side port or the memory side port
229 */
241 */
230 void functionalAccess(PacketPtr pkt, CachePort *incomingPort,
231 CachePort *otherSidePort);
242 void functionalAccess(PacketPtr pkt, bool fromCpuSide);
232
233 /**
234 * Handles a response (cache line fill/write ack) from the bus.
235 * @param pkt The request being responded to.
236 */
237 void handleResponse(PacketPtr pkt);
238
239 /**

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244 /**
245 * Handles a response (cache line fill/write ack) from the bus.
246 * @param pkt The request being responded to.
247 */
248 void handleResponse(PacketPtr pkt);
249
250 /**

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