cache.hh (5388:3b4772ca8368) | cache.hh (5489:94a7bb476fca) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 203 unchanged lines hidden (view full) --- 212 */ 213 PacketPtr writebackBlk(BlkType *blk); 214 215 public: 216 /** Instantiates a basic cache object. */ 217 Cache(const Params *p, TagStore *tags, BasePrefetcher *prefetcher); 218 219 virtual Port *getPort(const std::string &if_name, int idx = -1); | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 203 unchanged lines hidden (view full) --- 212 */ 213 PacketPtr writebackBlk(BlkType *blk); 214 215 public: 216 /** Instantiates a basic cache object. */ 217 Cache(const Params *p, TagStore *tags, BasePrefetcher *prefetcher); 218 219 virtual Port *getPort(const std::string &if_name, int idx = -1); |
220 virtual void deletePortRefs(Port *p); | 220 virtual bool deletePort(Port *p); |
221 222 void regStats(); 223 224 /** 225 * Performs the access specified by the request. 226 * @param pkt The request to perform. 227 * @return The result of the access. 228 */ --- 109 unchanged lines hidden --- | 221 222 void regStats(); 223 224 /** 225 * Performs the access specified by the request. 226 * @param pkt The request to perform. 227 * @return The result of the access. 228 */ --- 109 unchanged lines hidden --- |