cache.hh (4630:5a832c366b22) cache.hh (4665:9471921e5e08)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 168 unchanged lines hidden (view full) ---

177 * @param pkt The memory request with the fill data.
178 * @param blk The cache block if it already exists.
179 * @param writebacks List for any writebacks that need to be performed.
180 * @return Pointer to the new cache block.
181 */
182 BlkType *handleFill(PacketPtr pkt, BlkType *blk,
183 PacketList &writebacks);
184
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 168 unchanged lines hidden (view full) ---

177 * @param pkt The memory request with the fill data.
178 * @param blk The cache block if it already exists.
179 * @param writebacks List for any writebacks that need to be performed.
180 * @return Pointer to the new cache block.
181 */
182 BlkType *handleFill(PacketPtr pkt, BlkType *blk,
183 PacketList &writebacks);
184
185 bool satisfyCpuSideRequest(PacketPtr pkt, BlkType *blk);
186 bool satisfyTarget(MSHR::Target *target, BlkType *blk);
185 void satisfyCpuSideRequest(PacketPtr pkt, BlkType *blk);
187 bool satisfyMSHR(MSHR *mshr, PacketPtr pkt, BlkType *blk);
188
189 void doTimingSupplyResponse(PacketPtr req_pkt, uint8_t *blk_data);
190
191 /**
192 * Sets the blk to the new state.
193 * @param blk The cache block being snooped.
194 * @param new_state The new coherence state for the block.

--- 139 unchanged lines hidden --- 		186 bool satisfyMSHR(MSHR *mshr, PacketPtr pkt, BlkType *blk);
187
188 void doTimingSupplyResponse(PacketPtr req_pkt, uint8_t *blk_data);
189
190 /**
191 * Sets the blk to the new state.
192 * @param blk The cache block being snooped.
193 * @param new_state The new coherence state for the block.

--- 139 unchanged lines hidden ---