cache.hh (3861:3b35b0f0b6a9) cache.hh (3862:ec47e4243107)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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274
275 /**
276 * Create a writeback request for the given block.
277 * @param blk The block to writeback.
278 * @return The writeback request for the block.
279 */
280 PacketPtr writebackBlk(BlkType *blk);
281
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 265 unchanged lines hidden (view full) ---

274
275 /**
276 * Create a writeback request for the given block.
277 * @param blk The block to writeback.
278 * @return The writeback request for the block.
279 */
280 PacketPtr writebackBlk(BlkType *blk);
281
282 BlkType* findBlock(Addr addr)
283 {
284 return tags->findBlock(addr);
285 }
286
287 BlkType* findBlock(PacketPtr &pkt)
288 {
289 return tags->findBlock(pkt->getAddr());
290 }
291
292 void invalidateBlk(CacheBlk *blk)
293 {
294 tags->invalidateBlk(tags->regenerateBlkAddr(blk->tag, blk->set));
295 }
296
297 public:
298
299 class Params
300 {
301 public:
302 TagStore *tags;
303 MissBuffer *missQueue;
304 Coherence *coherence;

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394 * Snoops bus transactions to maintain coherence.
395 * @param pkt The current bus transaction.
396 */
397 void snoop(PacketPtr &pkt);
398
399 void snoopResponse(PacketPtr &pkt);
400
401 /**
282 public:
283
284 class Params
285 {
286 public:
287 TagStore *tags;
288 MissBuffer *missQueue;
289 Coherence *coherence;

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379 * Snoops bus transactions to maintain coherence.
380 * @param pkt The current bus transaction.
381 */
382 void snoop(PacketPtr &pkt);
383
384 void snoopResponse(PacketPtr &pkt);
385
386 /**
402 * Invalidates the block containing address if found.
403 * @param addr The address to look for.
404 * @param asid The address space ID of the address.
405 * @todo Is this function necessary?
406 */
407 void invalidateBlk(Addr addr);
408
409 /**
410 * Squash all requests associated with specified thread.
411 * intended for use by I-cache.
412 * @param threadNum The thread to squash.
413 */
414 void squash(int threadNum)
415 {
416 missQueue->squash(threadNum);
417 }

--- 45 unchanged lines hidden --- 		387 * Squash all requests associated with specified thread.
388 * intended for use by I-cache.
389 * @param threadNum The thread to squash.
390 */
391 void squash(int threadNum)
392 {
393 missQueue->squash(threadNum);
394 }

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