cache.hh (12630:2208bf99bffd) | cache.hh (12719:68a20fbd07a6) |
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1/* | 1/* |
2 * Copyright (c) 2012-2017 ARM Limited | 2 * Copyright (c) 2012-2018 ARM Limited |
3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 354 unchanged lines hidden (view full) --- 365 366 /** 367 * Handling the special case of uncacheable write responses to 368 * make recvTimingResp less cluttered. 369 */ 370 void handleUncacheableWriteResp(PacketPtr pkt); 371 372 /** | 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 354 unchanged lines hidden (view full) --- 365 366 /** 367 * Handling the special case of uncacheable write responses to 368 * make recvTimingResp less cluttered. 369 */ 370 void handleUncacheableWriteResp(PacketPtr pkt); 371 372 /** |
373 * Service non-deferred MSHR targets using the received response 374 * 375 * Iterates through the list of targets that can be serviced with 376 * the current response. Any writebacks that need to performed 377 * must be appended to the writebacks parameter. 378 * 379 * @param mshr The MSHR that corresponds to the reponse 380 * @param pkt The response packet 381 * @param blk The reference block 382 * @param writebacks List of writebacks that need to be performed 383 */ 384 void serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt, CacheBlk *blk, 385 PacketList& writebacks); 386 387 /** |
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373 * Handles a response (cache line fill/write ack) from the bus. 374 * @param pkt The response packet 375 */ 376 void recvTimingResp(PacketPtr pkt); 377 378 /** 379 * Snoops bus transactions to maintain coherence. 380 * @param pkt The current bus transaction. --- 257 unchanged lines hidden --- | 388 * Handles a response (cache line fill/write ack) from the bus. 389 * @param pkt The response packet 390 */ 391 void recvTimingResp(PacketPtr pkt); 392 393 /** 394 * Snoops bus transactions to maintain coherence. 395 * @param pkt The current bus transaction. --- 257 unchanged lines hidden --- |