cache.hh (12351:17eaa27bef22) cache.hh (12630:2208bf99bffd)
1/*
2 * Copyright (c) 2012-2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 336 unchanged lines hidden (view full) ---

345 cmd == MemCmd::WriteReq ||
346 cmd.isPrefetch() ||
347 cmd.isLLSC();
348 }
349
350 /**
351 * Performs the access specified by the request.
352 * @param pkt The request to perform.
1/*
2 * Copyright (c) 2012-2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 336 unchanged lines hidden (view full) ---

345 cmd == MemCmd::WriteReq ||
346 cmd.isPrefetch() ||
347 cmd.isLLSC();
348 }
349
350 /**
351 * Performs the access specified by the request.
352 * @param pkt The request to perform.
353 * @return The result of the access.
354 */
353 */
355 bool recvTimingReq(PacketPtr pkt);
354 void recvTimingReq(PacketPtr pkt);
356
357 /**
358 * Insert writebacks into the write buffer
359 */
360 void doWritebacks(PacketList& writebacks, Tick forward_time);
361
362 /**
363 * Send writebacks down the memory hierarchy in atomic mode

--- 275 unchanged lines hidden --- 		355
356 /**
357 * Insert writebacks into the write buffer
358 */
359 void doWritebacks(PacketList& writebacks, Tick forward_time);
360
361 /**
362 * Send writebacks down the memory hierarchy in atomic mode

--- 275 unchanged lines hidden ---