cache.hh (11375:f98df9231cdd) cache.hh (11452:4bc3a0c0861c)
1/*
2 * Copyright (c) 2012-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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455 *
456 * @warn Dirty cache lines will not be written back to memory.
457 *
458 * \return Always returns true.
459 */
460 bool invalidateVisitor(CacheBlk &blk);
461
462 /**
1/*
2 * Copyright (c) 2012-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 446 unchanged lines hidden (view full) ---

455 *
456 * @warn Dirty cache lines will not be written back to memory.
457 *
458 * \return Always returns true.
459 */
460 bool invalidateVisitor(CacheBlk &blk);
461
462 /**
463 * Generate an appropriate downstream bus request packet for the
463 * Create an appropriate downstream bus request packet for the
464 * given parameters.
464 * given parameters.
465 * @param cpu_pkt The upstream request that needs to be satisfied.
465 * @param cpu_pkt The miss that needs to be satisfied.
466 * @param blk The block currently in the cache corresponding to
467 * cpu_pkt (NULL if none).
466 * @param blk The block currently in the cache corresponding to
467 * cpu_pkt (NULL if none).
468 * @param needsExclusive Indicates that an exclusive copy is required
468 * @param needsWritable Indicates that the block must be writable
469 * even if the request in cpu_pkt doesn't indicate that.
470 * @return A new Packet containing the request, or NULL if the
471 * current request in cpu_pkt should just be forwarded on.
472 */
469 * even if the request in cpu_pkt doesn't indicate that.
470 * @return A new Packet containing the request, or NULL if the
471 * current request in cpu_pkt should just be forwarded on.
472 */
473 PacketPtr getBusPacket(PacketPtr cpu_pkt, CacheBlk *blk,
474 bool needsExclusive) const;
473 PacketPtr createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk,
474 bool needsWritable) const;
475
476 /**
477 * Return the next queue entry to service, either a pending miss
478 * from the MSHR queue, a buffered write from the write buffer, or
479 * something from the prefetcher. This function is responsible
480 * for prioritizing among those sources on the fly.
481 */
482 QueueEntry* getNextQueueEntry();

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476 /**
477 * Return the next queue entry to service, either a pending miss
478 * from the MSHR queue, a buffered write from the write buffer, or
479 * something from the prefetcher. This function is responsible
480 * for prioritizing among those sources on the fly.
481 */
482 QueueEntry* getNextQueueEntry();

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