cache.hh (10815:169af9a2779f) cache.hh (10883:9294c4a60251)
1/*
2 * Copyright (c) 2012-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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241 /**
242 * Performs the access specified by the request.
243 * @param pkt The request to perform.
244 * @return The result of the access.
245 */
246 bool recvTimingReq(PacketPtr pkt);
247
248 /**
1/*
2 * Copyright (c) 2012-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 232 unchanged lines hidden (view full) ---

241 /**
242 * Performs the access specified by the request.
243 * @param pkt The request to perform.
244 * @return The result of the access.
245 */
246 bool recvTimingReq(PacketPtr pkt);
247
248 /**
249 * Insert writebacks into the write buffer
250 */
251 void doWritebacks(PacketList& writebacks, Tick forward_time);
252
253 /**
249 * Handles a response (cache line fill/write ack) from the bus.
250 * @param pkt The response packet
251 */
252 void recvTimingResp(PacketPtr pkt);
253
254 /**
255 * Snoops bus transactions to maintain coherence.
256 * @param pkt The current bus transaction.

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303
304 /**
305 * Create a writeback request for the given block.
306 * @param blk The block to writeback.
307 * @return The writeback request for the block.
308 */
309 PacketPtr writebackBlk(CacheBlk *blk);
310
254 * Handles a response (cache line fill/write ack) from the bus.
255 * @param pkt The response packet
256 */
257 void recvTimingResp(PacketPtr pkt);
258
259 /**
260 * Snoops bus transactions to maintain coherence.
261 * @param pkt The current bus transaction.

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308
309 /**
310 * Create a writeback request for the given block.
311 * @param blk The block to writeback.
312 * @return The writeback request for the block.
313 */
314 PacketPtr writebackBlk(CacheBlk *blk);
315
316 /**
317 * Create a CleanEvict request for the given block.
318 * @param blk The block to evict.
319 * @return The CleanEvict request for the block.
320 */
321 PacketPtr cleanEvictBlk(CacheBlk *blk);
311
322
323
312 void memWriteback();
313 void memInvalidate();
314 bool isDirty() const;
315
316 /**
317 * Cache block visitor that writes back dirty cache blocks using
318 * functional writes.
319 *

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354 * Return the next MSHR to service, either a pending miss from the
355 * mshrQueue, a buffered write from the write buffer, or something
356 * from the prefetcher. This function is responsible for
357 * prioritizing among those sources on the fly.
358 */
359 MSHR *getNextMSHR();
360
361 /**
324 void memWriteback();
325 void memInvalidate();
326 bool isDirty() const;
327
328 /**
329 * Cache block visitor that writes back dirty cache blocks using
330 * functional writes.
331 *

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366 * Return the next MSHR to service, either a pending miss from the
367 * mshrQueue, a buffered write from the write buffer, or something
368 * from the prefetcher. This function is responsible for
369 * prioritizing among those sources on the fly.
370 */
371 MSHR *getNextMSHR();
372
373 /**
374 * Send up a snoop request and find cached copies. If cached copies are
375 * found, set the BLOCK_CACHED flag in pkt.
376 */
377 bool isCachedAbove(const PacketPtr pkt) const;
378
379 /**
362 * Selects an outstanding request to service. Called when the
363 * cache gets granted the downstream bus in timing mode.
364 * @return The request to service, NULL if none found.
365 */
366 PacketPtr getTimingPacket();
367
368 /**
369 * Marks a request as in service (sent on the bus). This can have

--- 107 unchanged lines hidden --- 		380 * Selects an outstanding request to service. Called when the
381 * cache gets granted the downstream bus in timing mode.
382 * @return The request to service, NULL if none found.
383 */
384 PacketPtr getTimingPacket();
385
386 /**
387 * Marks a request as in service (sent on the bus). This can have

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