cache.hh (10345:b5bef3c8e070) cache.hh (10424:a910aeb89098)
1/*
2 * Copyright (c) 2012-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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375 PacketPtr getTimingPacket();
376
377 /**
378 * Marks a request as in service (sent on the bus). This can have side
379 * effect since storage for no response commands is deallocated once they
380 * are successfully sent.
381 * @param pkt The request that was sent on the bus.
382 */
1/*
2 * Copyright (c) 2012-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 366 unchanged lines hidden (view full) ---

375 PacketPtr getTimingPacket();
376
377 /**
378 * Marks a request as in service (sent on the bus). This can have side
379 * effect since storage for no response commands is deallocated once they
380 * are successfully sent.
381 * @param pkt The request that was sent on the bus.
382 */
383 void markInService(MSHR *mshr, PacketPtr pkt = 0);
383 void markInService(MSHR *mshr, PacketPtr pkt = NULL);
384
385 /**
386 * Return whether there are any outstanding misses.
387 */
388 bool outstandingMisses() const
389 {
390 return mshrQueue.allocated != 0;
391 }

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385 /**
386 * Return whether there are any outstanding misses.
387 */
388 bool outstandingMisses() const
389 {
390 return mshrQueue.allocated != 0;
391 }

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