cache.hh (10343:a1eea45928e6) cache.hh (10345:b5bef3c8e070)
1/*
2 * Copyright (c) 2012-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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176 BlkType *tempBlock;
177
178 /**
179 * This cache should allocate a block on a line-sized write miss.
180 */
181 const bool doFastWrites;
182
183 /**
1/*
2 * Copyright (c) 2012-2014 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 167 unchanged lines hidden (view full) ---

176 BlkType *tempBlock;
177
178 /**
179 * This cache should allocate a block on a line-sized write miss.
180 */
181 const bool doFastWrites;
182
183 /**
184 * Turn line-sized writes into WriteInvalidate transactions.
185 */
186 void promoteWholeLineWrites(PacketPtr pkt);
187
188 /**
184 * Notify the prefetcher on every access, not just misses.
185 */
186 const bool prefetchOnAccess;
187
188 /**
189 * @todo this is a temporary workaround until the 4-phase code is committed.
190 * upstream caches need this packet until true is returned, so hold it for
191 * deletion until a subsequent call

--- 230 unchanged lines hidden --- 		189 * Notify the prefetcher on every access, not just misses.
190 */
191 const bool prefetchOnAccess;
192
193 /**
194 * @todo this is a temporary workaround until the 4-phase code is committed.
195 * upstream caches need this packet until true is returned, so hold it for
196 * deletion until a subsequent call

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