1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 85 unchanged lines hidden (view full) ---

94 virtual bool recvTimingSnoopResp(PacketPtr pkt);
95
96 virtual bool recvTimingReq(PacketPtr pkt);
97
98 virtual Tick recvAtomic(PacketPtr pkt);
99
100 virtual void recvFunctional(PacketPtr pkt);
101
102 virtual unsigned deviceBlockSize() const
103 { return cache->getBlockSize(); }
104
102 virtual AddrRangeList getAddrRanges() const;
103
104 public:
105
106 CpuSidePort(const std::string &_name, Cache<TagStore> *_cache,
107 const std::string &_label);
108
109 };

--- 45 unchanged lines hidden (view full) ---

155 virtual void recvTimingSnoopReq(PacketPtr pkt);
156
157 virtual bool recvTimingResp(PacketPtr pkt);
158
159 virtual Tick recvAtomicSnoop(PacketPtr pkt);
160
161 virtual void recvFunctionalSnoop(PacketPtr pkt);
162
166 virtual unsigned deviceBlockSize() const
167 { return cache->getBlockSize(); }
168
163 public:
164
165 MemSidePort(const std::string &_name, Cache<TagStore> *_cache,
166 const std::string &_label);
167 };
168
169 /** Tag and data Storage */
170 TagStore *tags;

--- 250 unchanged lines hidden ---