1/* |
2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * |
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright --- 210 unchanged lines hidden (view full) --- 232 * @param pkt The request to perform. 233 * @return The result of the access. 234 */ 235 Tick atomicAccess(PacketPtr pkt); 236 237 /** 238 * Performs the access specified by the request. 239 * @param pkt The request to perform. |
240 * @param fromCpuSide from the CPU side port or the memory side port |
241 */ |
242 void functionalAccess(PacketPtr pkt, bool fromCpuSide); |
243 244 /** 245 * Handles a response (cache line fill/write ack) from the bus. 246 * @param pkt The request being responded to. 247 */ 248 void handleResponse(PacketPtr pkt); 249 250 /** --- 90 unchanged lines hidden --- |