1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 58 unchanged lines hidden (view full) --- 67 bool prefetchAccess; 68 69 protected: 70 71 class CpuSidePort : public CachePort 72 { 73 public: 74 CpuSidePort(const std::string &_name, |
75 Cache<TagStore> *_cache, 76 std::vector<Range<Addr> > filterRanges); |
77 78 // BaseCache::CachePort just has a BaseCache *; this function 79 // lets us get back the type info we lost when we stored the 80 // cache pointer there. 81 Cache<TagStore> *myCache() { 82 return static_cast<Cache<TagStore> *>(cache); 83 } 84 --- 6 unchanged lines hidden (view full) --- 91 92 virtual void recvFunctional(PacketPtr pkt); 93 }; 94 95 class MemSidePort : public CachePort 96 { 97 public: 98 MemSidePort(const std::string &_name, |
99 Cache<TagStore> *_cache, 100 std::vector<Range<Addr> > filterRanges); |
101 102 // BaseCache::CachePort just has a BaseCache *; this function 103 // lets us get back the type info we lost when we stored the 104 // cache pointer there. 105 Cache<TagStore> *myCache() { 106 return static_cast<Cache<TagStore> *>(cache); 107 } 108 --- 223 unchanged lines hidden --- |