1/* 2 * Copyright (c) 2012-2014 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 43 unchanged lines hidden (view full) --- 52#ifndef __MEM_CACHE_CACHE_HH__ 53#define __MEM_CACHE_CACHE_HH__ 54 55#include "base/misc.hh" // fatal, panic, and warn 56#include "mem/cache/base.hh" 57#include "mem/cache/blk.hh" 58#include "mem/cache/mshr.hh" 59#include "mem/cache/tags/base.hh" |
60#include "params/Cache.hh" |
61#include "sim/eventq.hh" 62 63//Forward decleration 64class BasePrefetcher; 65 66/** 67 * A template-policy based cache. The behavior of the cache can be altered by 68 * supplying different template policies. TagStore handles all tag and data --- 346 unchanged lines hidden (view full) --- 415 416 /** 417 * Find next request ready time from among possible sources. 418 */ 419 Tick nextMSHRReadyTime() const; 420 421 public: 422 /** Instantiates a basic cache object. */ |
423 Cache(const CacheParams *p); |
424 425 /** Non-default destructor is needed to deallocate memory. */ 426 virtual ~Cache(); 427 428 void regStats(); 429 430 /** serialize the state of the caches 431 * We currently don't support checkpointing cache state, so this panics. --- 64 unchanged lines hidden --- |