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< * Generate an appropriate downstream bus request packet for the
---
> * Create an appropriate downstream bus request packet for the
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< * @param cpu_pkt The upstream request that needs to be satisfied.
---
> * @param cpu_pkt The miss that needs to be satisfied.
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< * @param needsExclusive Indicates that an exclusive copy is required
---
> * @param needsWritable Indicates that the block must be writable
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< PacketPtr getBusPacket(PacketPtr cpu_pkt, CacheBlk *blk,
< bool needsExclusive) const;
---
> PacketPtr createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk,
> bool needsWritable) const;