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< * Copyright (c) 2012-2014 ARM Limited
---
> * Copyright (c) 2012-2015 ARM Limited
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> #include "enums/Clusivity.hh"
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> /**
> * Clusivity with respect to the upstream cache, determining if we
> * fill into both this cache and the cache above on a miss. Note
> * that we currently do not support strict clusivity policies.
> */
> const Enums::Clusivity clusivity;
>
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> * Writebacks from the tempBlock, resulting on the response path
> * in atomic mode, must happen after the call to recvAtomic has
> * finished (for the right ordering of the packets). We therefore
> * need to hold on to the packets, and have a method and an event
> * to send them.
> */
> PacketPtr tempBlockWriteback;
>
> /**
> * Send the outstanding tempBlock writeback. To be called after
> * recvAtomic finishes in cases where the block we filled is in
> * fact the tempBlock, and now needs to be written back.
> */
> void writebackTempBlockAtomic() {
> assert(tempBlockWriteback != nullptr);
> PacketList writebacks{tempBlockWriteback};
> doWritebacksAtomic(writebacks);
> tempBlockWriteback = nullptr;
> }
>
> /**
> * An event to writeback the tempBlock after recvAtomic
> * finishes. To avoid other calls to recvAtomic getting in
> * between, we create this event with a higher priority.
> */
> EventWrapper<Cache, &Cache::writebackTempBlockAtomic> \
> writebackTempBlockAtomicEvent;
>
> /**
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> * Invalidate a cache block.
> *
> * @param blk Block to invalidate
> */
> void invalidateBlock(CacheBlk *blk);
>
> /**
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> * @param allocate Whether to allocate a block or use the temp block
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< PacketList &writebacks);
---
> PacketList &writebacks, bool allocate);
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> /**
> * Determine whether we should allocate on a fill or not. If this
> * cache is mostly inclusive with regards to the upstream cache(s)
> * we always allocate (for any non-forwarded and cacheable
> * requests). In the case of a mostly exclusive cache, we allocate
> * on fill if the packet did not come from a cache, thus if we:
> * are dealing with a whole-line write (the latter behaves much
> * like a writeback), the original target packet came from a
> * non-caching source, or if we are performing a prefetch or LLSC.
> *
> * @param cmd Command of the incoming requesting packet
> * @return Whether we should allocate on the fill
> */
> inline bool allocOnFill(MemCmd cmd) const
> {
> return clusivity == Enums::mostly_incl ||
> cmd == MemCmd::WriteLineReq ||
> cmd == MemCmd::ReadReq ||
> cmd == MemCmd::WriteReq ||
> cmd.isPrefetch() ||
> cmd.isLLSC();
> }