1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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94 virtual bool recvTimingSnoopResp(PacketPtr pkt);
95
96 virtual bool recvTimingReq(PacketPtr pkt);
97
98 virtual Tick recvAtomic(PacketPtr pkt);
99
100 virtual void recvFunctional(PacketPtr pkt);
101
102 virtual unsigned deviceBlockSize() const
103 { return cache->getBlockSize(); }
104
105 virtual AddrRangeList getAddrRanges() const;
106
107 public:
108
109 CpuSidePort(const std::string &_name, Cache<TagStore> *_cache,
110 const std::string &_label);
111
112 };

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158 virtual void recvTimingSnoopReq(PacketPtr pkt);
159
160 virtual bool recvTimingResp(PacketPtr pkt);
161
162 virtual Tick recvAtomicSnoop(PacketPtr pkt);
163
164 virtual void recvFunctionalSnoop(PacketPtr pkt);
165
166 virtual unsigned deviceBlockSize() const
167 { return cache->getBlockSize(); }
168
169 public:
170
171 MemSidePort(const std::string &_name, Cache<TagStore> *_cache,
172 const std::string &_label);
173 };
174
175 /** Tag and data Storage */
176 TagStore *tags;

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