1/*
2 * Copyright (c) 2012-2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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365
366 /**
367 * Handling the special case of uncacheable write responses to
368 * make recvTimingResp less cluttered.
369 */
370 void handleUncacheableWriteResp(PacketPtr pkt);
371
372 /**
373 * Handles a response (cache line fill/write ack) from the bus.
374 * @param pkt The response packet
375 */
376 void recvTimingResp(PacketPtr pkt);
377
378 /**
379 * Snoops bus transactions to maintain coherence.
380 * @param pkt The current bus transaction.

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