1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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173 * @param pkt The memory request with the fill data.
174 * @param blk The cache block if it already exists.
175 * @param writebacks List for any writebacks that need to be performed.
176 * @return Pointer to the new cache block.
177 */
178 BlkType *handleFill(PacketPtr pkt, BlkType *blk,
179 PacketList &writebacks);
180
181 void satisfyCpuSideRequest(PacketPtr pkt, BlkType *blk,
182 bool deferred_response = false,
183 bool pending_downgrade = false);
184 bool satisfyMSHR(MSHR *mshr, PacketPtr pkt, BlkType *blk);
185
186 void doTimingSupplyResponse(PacketPtr req_pkt, uint8_t *blk_data,
187 bool already_copied, bool pending_inval);
188
189 /**
190 * Sets the blk to the new state.
191 * @param blk The cache block being snooped.

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289 PacketPtr getTimingPacket();
290
291 /**
292 * Marks a request as in service (sent on the bus). This can have side
293 * effect since storage for no response commands is deallocated once they
294 * are successfully sent.
295 * @param pkt The request that was sent on the bus.
296 */
297 void markInService(MSHR *mshr, PacketPtr pkt = 0);
298
299 /**
300 * Perform the given writeback request.
301 * @param pkt The writeback request.
302 */
303 void doWriteback(PacketPtr pkt);
304
305 /**

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