cache.cc (13358:5e1605b47a21) | cache.cc (13412:bc5b08f44e6d) |
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1/* 2 * Copyright (c) 2010-2018 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 644 unchanged lines hidden (view full) --- 653 return latency; 654} 655 656Tick 657Cache::recvAtomic(PacketPtr pkt) 658{ 659 promoteWholeLineWrites(pkt); 660 | 1/* 2 * Copyright (c) 2010-2018 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 644 unchanged lines hidden (view full) --- 653 return latency; 654} 655 656Tick 657Cache::recvAtomic(PacketPtr pkt) 658{ 659 promoteWholeLineWrites(pkt); 660 |
661 // follow the same flow as in recvTimingReq, and check if a cache 662 // above us is responding 663 if (pkt->cacheResponding()) { 664 assert(!pkt->req->isCacheInvalidate()); 665 DPRINTF(Cache, "Cache above responding to %s: not responding\n", 666 pkt->print()); 667 668 // if a cache is responding, and it had the line in Owned 669 // rather than Modified state, we need to invalidate any 670 // copies that are not on the same path to memory 671 assert(pkt->needsWritable() && !pkt->responderHadWritable()); 672 673 return memSidePort.sendAtomic(pkt); 674 } 675 |
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661 return BaseCache::recvAtomic(pkt); 662} 663 664 665///////////////////////////////////////////////////// 666// 667// Response handling: responses from the memory side 668// --- 720 unchanged lines hidden --- | 676 return BaseCache::recvAtomic(pkt); 677} 678 679 680///////////////////////////////////////////////////// 681// 682// Response handling: responses from the memory side 683// --- 720 unchanged lines hidden --- |