cache.cc (11749:3b2cb95f48ed) cache.cc (11750:c15cc4d973ea)
1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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1388 tgt_pkt->cmd == MemCmd::SCUpgradeFailReq);
1389 // responseLatency is the latency of the return path
1390 // from lower level caches/memory to an upper level cache or
1391 // the core.
1392 completion_time += clockEdge(responseLatency) +
1393 pkt->payloadDelay;
1394 tgt_pkt->req->setExtraData(0);
1395 } else {
1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1379 unchanged lines hidden (view full) ---

1388 tgt_pkt->cmd == MemCmd::SCUpgradeFailReq);
1389 // responseLatency is the latency of the return path
1390 // from lower level caches/memory to an upper level cache or
1391 // the core.
1392 completion_time += clockEdge(responseLatency) +
1393 pkt->payloadDelay;
1394 tgt_pkt->req->setExtraData(0);
1395 } else {
1396 // We are about to send a response to a cache above
1397 // that asked for an invalidation; we need to
1398 // invalidate our copy immediately as the most
1399 // up-to-date copy of the block will now be in the
1400 // cache above. It will also prevent this cache from
1401 // responding (if the block was previously dirty) to
1402 // snoops as they should snoop the caches above where
1403 // they will get the response from.
1404 if (is_invalidate && blk && blk->isValid()) {
1405 invalidateBlock(blk);
1406 }
1396 // not a cache fill, just forwarding response
1397 // responseLatency is the latency of the return path
1398 // from lower level cahces/memory to the core.
1399 completion_time += clockEdge(responseLatency) +
1400 pkt->payloadDelay;
1401 if (pkt->isRead() && !is_error) {
1402 // sanity check
1403 assert(pkt->getAddr() == tgt_pkt->getAddr());

--- 1262 unchanged lines hidden --- 		1407 // not a cache fill, just forwarding response
1408 // responseLatency is the latency of the return path
1409 // from lower level cahces/memory to the core.
1410 completion_time += clockEdge(responseLatency) +
1411 pkt->payloadDelay;
1412 if (pkt->isRead() && !is_error) {
1413 // sanity check
1414 assert(pkt->getAddr() == tgt_pkt->getAddr());

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