cache.cc (11744:5d33c6972dda) cache.cc (11745:3102db8903f5)
1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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904 bool needsWritable) const
905{
906 // should never see evictions here
907 assert(!cpu_pkt->isEviction());
908
909 bool blkValid = blk && blk->isValid();
910
911 if (cpu_pkt->req->isUncacheable() ||
1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 895 unchanged lines hidden (view full) ---

904 bool needsWritable) const
905{
906 // should never see evictions here
907 assert(!cpu_pkt->isEviction());
908
909 bool blkValid = blk && blk->isValid();
910
911 if (cpu_pkt->req->isUncacheable() ||
912 (!blkValid && cpu_pkt->isUpgrade())) {
912 (!blkValid && cpu_pkt->isUpgrade()) ||
913 cpu_pkt->cmd == MemCmd::InvalidateReq) {
913 // uncacheable requests and upgrades from upper-level caches
914 // that missed completely just go through as is
915 return nullptr;
916 }
917
918 assert(cpu_pkt->needsResponse());
919
920 MemCmd cmd;

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931 cmd = cpu_pkt->isLLSC() ? MemCmd::SCUpgradeReq : MemCmd::UpgradeReq;
932 } else if (cpu_pkt->cmd == MemCmd::SCUpgradeFailReq ||
933 cpu_pkt->cmd == MemCmd::StoreCondFailReq) {
934 // Even though this SC will fail, we still need to send out the
935 // request and get the data to supply it to other snoopers in the case
936 // where the determination the StoreCond fails is delayed due to
937 // all caches not being on the same local bus.
938 cmd = MemCmd::SCUpgradeFailReq;
914 // uncacheable requests and upgrades from upper-level caches
915 // that missed completely just go through as is
916 return nullptr;
917 }
918
919 assert(cpu_pkt->needsResponse());
920
921 MemCmd cmd;

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932 cmd = cpu_pkt->isLLSC() ? MemCmd::SCUpgradeReq : MemCmd::UpgradeReq;
933 } else if (cpu_pkt->cmd == MemCmd::SCUpgradeFailReq ||
934 cpu_pkt->cmd == MemCmd::StoreCondFailReq) {
935 // Even though this SC will fail, we still need to send out the
936 // request and get the data to supply it to other snoopers in the case
937 // where the determination the StoreCond fails is delayed due to
938 // all caches not being on the same local bus.
939 cmd = MemCmd::SCUpgradeFailReq;
939 } else if (cpu_pkt->cmd == MemCmd::WriteLineReq ||
940 cpu_pkt->cmd == MemCmd::InvalidateReq) {
940 } else if (cpu_pkt->cmd == MemCmd::WriteLineReq) {
941 // forward as invalidate to all other caches, this gives us
942 // the line in Exclusive state, and invalidates all other
943 // copies
944 cmd = MemCmd::InvalidateReq;
945 } else {
946 // block is invalid
947 cmd = needsWritable ? MemCmd::ReadExReq :
948 (isReadOnly ? MemCmd::ReadCleanReq : MemCmd::ReadSharedReq);

--- 1705 unchanged lines hidden --- 		941 // forward as invalidate to all other caches, this gives us
942 // the line in Exclusive state, and invalidates all other
943 // copies
944 cmd = MemCmd::InvalidateReq;
945 } else {
946 // block is invalid
947 cmd = needsWritable ? MemCmd::ReadExReq :
948 (isReadOnly ? MemCmd::ReadCleanReq : MemCmd::ReadSharedReq);

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