cache.cc (11602:7e0199f80816) cache.cc (11741:72916416d2e2)
1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1304 unchanged lines hidden (view full) ---

1313 (pkt->isRead() || pkt->cmd == MemCmd::UpgradeResp);
1314
1315 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
1316
1317 if (is_fill && !is_error) {
1318 DPRINTF(Cache, "Block for addr %#llx being updated in Cache\n",
1319 pkt->getAddr());
1320
1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1304 unchanged lines hidden (view full) ---

1313 (pkt->isRead() || pkt->cmd == MemCmd::UpgradeResp);
1314
1315 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
1316
1317 if (is_fill && !is_error) {
1318 DPRINTF(Cache, "Block for addr %#llx being updated in Cache\n",
1319 pkt->getAddr());
1320
1321 blk = handleFill(pkt, blk, writebacks, mshr->allocOnFill);
1321 blk = handleFill(pkt, blk, writebacks, mshr->allocOnFill());
1322 assert(blk != nullptr);
1323 }
1324
1325 // allow invalidation responses originating from write-line
1326 // requests to be discarded
1327 bool is_invalidate = pkt->isInvalidate();
1328
1329 // First offset for critical word first calculations

--- 34 unchanged lines hidden (view full) ---

1364 // state. We "catch up" with that logic here, which is duplicated
1365 // from above.
1366 if (tgt_pkt->cmd == MemCmd::WriteLineReq) {
1367 assert(!is_error);
1368 // we got the block in a writable state, so promote
1369 // any deferred targets if possible
1370 mshr->promoteWritable();
1371 // NB: we use the original packet here and not the response!
1322 assert(blk != nullptr);
1323 }
1324
1325 // allow invalidation responses originating from write-line
1326 // requests to be discarded
1327 bool is_invalidate = pkt->isInvalidate();
1328
1329 // First offset for critical word first calculations

--- 34 unchanged lines hidden (view full) ---

1364 // state. We "catch up" with that logic here, which is duplicated
1365 // from above.
1366 if (tgt_pkt->cmd == MemCmd::WriteLineReq) {
1367 assert(!is_error);
1368 // we got the block in a writable state, so promote
1369 // any deferred targets if possible
1370 mshr->promoteWritable();
1371 // NB: we use the original packet here and not the response!
1372 blk = handleFill(tgt_pkt, blk, writebacks, mshr->allocOnFill);
1372 blk = handleFill(tgt_pkt, blk, writebacks,
1373 mshr->allocOnFill());
1373 assert(blk != nullptr);
1374
1375 // treat as a fill, and discard the invalidation
1376 // response
1377 is_fill = true;
1378 is_invalidate = false;
1379 }
1380

--- 1311 unchanged lines hidden --- 		1374 assert(blk != nullptr);
1375
1376 // treat as a fill, and discard the invalidation
1377 // response
1378 is_fill = true;
1379 is_invalidate = false;
1380 }
1381

--- 1311 unchanged lines hidden ---