cache.cc (11055:54071fd5c397) cache.cc (11081:4d8b7783a692)
1/*
2 * Copyright (c) 2010-2015 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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1823 if (pkt->mustCheckAbove()) {
1824 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s from"
1825 " lower cache\n", pkt->getAddr(), pkt->cmdString());
1826 pkt->setBlockCached();
1827 return;
1828 }
1829
1830 if (!pkt->req->isUncacheable() && pkt->isRead() && !invalidate) {
1/*
2 * Copyright (c) 2010-2015 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 1814 unchanged lines hidden (view full) ---

1823 if (pkt->mustCheckAbove()) {
1824 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s from"
1825 " lower cache\n", pkt->getAddr(), pkt->cmdString());
1826 pkt->setBlockCached();
1827 return;
1828 }
1829
1830 if (!pkt->req->isUncacheable() && pkt->isRead() && !invalidate) {
1831 // reading non-exclusive shared data, note that we retain
1832 // the block in owned state if it is dirty, with the response
1833 // taken care of below, and otherwhise simply downgrade to
1834 // shared
1831 assert(!needs_exclusive);
1832 pkt->assertShared();
1835 assert(!needs_exclusive);
1836 pkt->assertShared();
1833 int bits_to_clear = BlkWritable;
1834 const bool haveOwnershipState = true; // for now
1835 if (!haveOwnershipState) {
1836 // if we don't support pure ownership (dirty && !writable),
1837 // have to clear dirty bit here, assume memory snarfs data
1838 // on cache-to-cache xfer
1839 bits_to_clear |= BlkDirty;
1840 }
1841 blk->status &= ~bits_to_clear;
1837 blk->status &= ~BlkWritable;
1842 }
1843
1844 if (respond) {
1845 // prevent anyone else from responding, cache as well as
1846 // memory, and also prevent any memory from even seeing the
1847 // request (with current inhibited semantics), note that this
1848 // applies both to reads and writes and that for writes it
1849 // works thanks to the fact that we still have dirty data and
1850 // will write it back at a later point
1851 pkt->assertMemInhibit();
1852 if (have_exclusive) {
1838 }
1839
1840 if (respond) {
1841 // prevent anyone else from responding, cache as well as
1842 // memory, and also prevent any memory from even seeing the
1843 // request (with current inhibited semantics), note that this
1844 // applies both to reads and writes and that for writes it
1845 // works thanks to the fact that we still have dirty data and
1846 // will write it back at a later point
1847 pkt->assertMemInhibit();
1848 if (have_exclusive) {
1853 // in the case of an uncacheable request there is no need
1854 // to set the exclusive flag, but since the recipient does
1855 // not care there is no harm in doing so
1849 // in the case of an uncacheable request there is no point
1850 // in setting the exclusive flag, but since the recipient
1851 // does not care there is no harm in doing so, in any case
1852 // it is just a hint
1856 pkt->setSupplyExclusive();
1857 }
1858 if (is_timing) {
1859 doTimingSupplyResponse(pkt, blk->data, is_deferred, pending_inval);
1860 } else {
1861 pkt->makeAtomicResponse();
1862 pkt->setDataFromBlock(blk->data, blkSize);
1863 }

--- 629 unchanged lines hidden --- 		1853 pkt->setSupplyExclusive();
1854 }
1855 if (is_timing) {
1856 doTimingSupplyResponse(pkt, blk->data, is_deferred, pending_inval);
1857 } else {
1858 pkt->makeAtomicResponse();
1859 pkt->setDataFromBlock(blk->data, blkSize);
1860 }

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