1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Erik Hallnor
42 * Dave Greene
43 * Nathan Binkert
44 * Steve Reinhardt
45 * Ron Dreslinski
46 * Andreas Sandberg
47 */
48
49/**
50 * @file
51 * Cache definitions.
52 */
53
54#include "mem/cache/cache.hh"
55
56#include "base/misc.hh"
57#include "base/types.hh"
58#include "debug/Cache.hh"
59#include "debug/CachePort.hh"
60#include "debug/CacheTags.hh"
61#include "debug/CacheVerbose.hh"
62#include "mem/cache/blk.hh"
63#include "mem/cache/mshr.hh"
64#include "mem/cache/prefetch/base.hh"
65#include "sim/sim_exit.hh"
66
67Cache::Cache(const CacheParams *p)
68 : BaseCache(p, p->system->cacheLineSize()),
69 tags(p->tags),
70 prefetcher(p->prefetcher),
71 doFastWrites(true),
72 prefetchOnAccess(p->prefetch_on_access),
73 clusivity(p->clusivity),
74 writebackClean(p->writeback_clean),
75 tempBlockWriteback(nullptr),
76 writebackTempBlockAtomicEvent(this, false,
77 EventBase::Delayed_Writeback_Pri)
78{
79 tempBlock = new CacheBlk();
80 tempBlock->data = new uint8_t[blkSize];
81
82 cpuSidePort = new CpuSidePort(p->name + ".cpu_side", this,
83 "CpuSidePort");
84 memSidePort = new MemSidePort(p->name + ".mem_side", this,
85 "MemSidePort");
86
87 tags->setCache(this);
88 if (prefetcher)
89 prefetcher->setCache(this);
90}
91
92Cache::~Cache()
93{
94 delete [] tempBlock->data;
95 delete tempBlock;
96
97 delete cpuSidePort;
98 delete memSidePort;
99}
100
101void
102Cache::regStats()
103{
104 BaseCache::regStats();
105}
106
107void
108Cache::cmpAndSwap(CacheBlk *blk, PacketPtr pkt)
109{
110 assert(pkt->isRequest());
111
112 uint64_t overwrite_val;
113 bool overwrite_mem;
114 uint64_t condition_val64;
115 uint32_t condition_val32;
116
117 int offset = tags->extractBlkOffset(pkt->getAddr());
118 uint8_t *blk_data = blk->data + offset;
119
120 assert(sizeof(uint64_t) >= pkt->getSize());
121
122 overwrite_mem = true;
123 // keep a copy of our possible write value, and copy what is at the
124 // memory address into the packet
125 pkt->writeData((uint8_t *)&overwrite_val);
126 pkt->setData(blk_data);
127
128 if (pkt->req->isCondSwap()) {
129 if (pkt->getSize() == sizeof(uint64_t)) {
130 condition_val64 = pkt->req->getExtraData();
131 overwrite_mem = !std::memcmp(&condition_val64, blk_data,
132 sizeof(uint64_t));
133 } else if (pkt->getSize() == sizeof(uint32_t)) {
134 condition_val32 = (uint32_t)pkt->req->getExtraData();
135 overwrite_mem = !std::memcmp(&condition_val32, blk_data,
136 sizeof(uint32_t));
137 } else
138 panic("Invalid size for conditional read/write\n");
139 }
140
141 if (overwrite_mem) {
142 std::memcpy(blk_data, &overwrite_val, pkt->getSize());
143 blk->status |= BlkDirty;
144 }
145}
146
147
148void
149Cache::satisfyRequest(PacketPtr pkt, CacheBlk *blk,
150 bool deferred_response, bool pending_downgrade)
151{
152 assert(pkt->isRequest());
153
154 assert(blk && blk->isValid());
155 // Occasionally this is not true... if we are a lower-level cache
156 // satisfying a string of Read and ReadEx requests from
157 // upper-level caches, a Read will mark the block as shared but we
158 // can satisfy a following ReadEx anyway since we can rely on the
159 // Read requester(s) to have buffered the ReadEx snoop and to
160 // invalidate their blocks after receiving them.
161 // assert(!pkt->needsWritable() || blk->isWritable());
162 assert(pkt->getOffset(blkSize) + pkt->getSize() <= blkSize);
163
164 // Check RMW operations first since both isRead() and
165 // isWrite() will be true for them
166 if (pkt->cmd == MemCmd::SwapReq) {
167 cmpAndSwap(blk, pkt);
168 } else if (pkt->isWrite()) {
169 // we have the block in a writable state and can go ahead,
170 // note that the line may be also be considered writable in
171 // downstream caches along the path to memory, but always
172 // Exclusive, and never Modified
173 assert(blk->isWritable());
174 // Write or WriteLine at the first cache with block in writable state
175 if (blk->checkWrite(pkt)) {
176 pkt->writeDataToBlock(blk->data, blkSize);
177 }
178 // Always mark the line as dirty (and thus transition to the
179 // Modified state) even if we are a failed StoreCond so we
180 // supply data to any snoops that have appended themselves to
181 // this cache before knowing the store will fail.
182 blk->status |= BlkDirty;
| 1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Erik Hallnor
42 * Dave Greene
43 * Nathan Binkert
44 * Steve Reinhardt
45 * Ron Dreslinski
46 * Andreas Sandberg
47 */
48
49/**
50 * @file
51 * Cache definitions.
52 */
53
54#include "mem/cache/cache.hh"
55
56#include "base/misc.hh"
57#include "base/types.hh"
58#include "debug/Cache.hh"
59#include "debug/CachePort.hh"
60#include "debug/CacheTags.hh"
61#include "debug/CacheVerbose.hh"
62#include "mem/cache/blk.hh"
63#include "mem/cache/mshr.hh"
64#include "mem/cache/prefetch/base.hh"
65#include "sim/sim_exit.hh"
66
67Cache::Cache(const CacheParams *p)
68 : BaseCache(p, p->system->cacheLineSize()),
69 tags(p->tags),
70 prefetcher(p->prefetcher),
71 doFastWrites(true),
72 prefetchOnAccess(p->prefetch_on_access),
73 clusivity(p->clusivity),
74 writebackClean(p->writeback_clean),
75 tempBlockWriteback(nullptr),
76 writebackTempBlockAtomicEvent(this, false,
77 EventBase::Delayed_Writeback_Pri)
78{
79 tempBlock = new CacheBlk();
80 tempBlock->data = new uint8_t[blkSize];
81
82 cpuSidePort = new CpuSidePort(p->name + ".cpu_side", this,
83 "CpuSidePort");
84 memSidePort = new MemSidePort(p->name + ".mem_side", this,
85 "MemSidePort");
86
87 tags->setCache(this);
88 if (prefetcher)
89 prefetcher->setCache(this);
90}
91
92Cache::~Cache()
93{
94 delete [] tempBlock->data;
95 delete tempBlock;
96
97 delete cpuSidePort;
98 delete memSidePort;
99}
100
101void
102Cache::regStats()
103{
104 BaseCache::regStats();
105}
106
107void
108Cache::cmpAndSwap(CacheBlk *blk, PacketPtr pkt)
109{
110 assert(pkt->isRequest());
111
112 uint64_t overwrite_val;
113 bool overwrite_mem;
114 uint64_t condition_val64;
115 uint32_t condition_val32;
116
117 int offset = tags->extractBlkOffset(pkt->getAddr());
118 uint8_t *blk_data = blk->data + offset;
119
120 assert(sizeof(uint64_t) >= pkt->getSize());
121
122 overwrite_mem = true;
123 // keep a copy of our possible write value, and copy what is at the
124 // memory address into the packet
125 pkt->writeData((uint8_t *)&overwrite_val);
126 pkt->setData(blk_data);
127
128 if (pkt->req->isCondSwap()) {
129 if (pkt->getSize() == sizeof(uint64_t)) {
130 condition_val64 = pkt->req->getExtraData();
131 overwrite_mem = !std::memcmp(&condition_val64, blk_data,
132 sizeof(uint64_t));
133 } else if (pkt->getSize() == sizeof(uint32_t)) {
134 condition_val32 = (uint32_t)pkt->req->getExtraData();
135 overwrite_mem = !std::memcmp(&condition_val32, blk_data,
136 sizeof(uint32_t));
137 } else
138 panic("Invalid size for conditional read/write\n");
139 }
140
141 if (overwrite_mem) {
142 std::memcpy(blk_data, &overwrite_val, pkt->getSize());
143 blk->status |= BlkDirty;
144 }
145}
146
147
148void
149Cache::satisfyRequest(PacketPtr pkt, CacheBlk *blk,
150 bool deferred_response, bool pending_downgrade)
151{
152 assert(pkt->isRequest());
153
154 assert(blk && blk->isValid());
155 // Occasionally this is not true... if we are a lower-level cache
156 // satisfying a string of Read and ReadEx requests from
157 // upper-level caches, a Read will mark the block as shared but we
158 // can satisfy a following ReadEx anyway since we can rely on the
159 // Read requester(s) to have buffered the ReadEx snoop and to
160 // invalidate their blocks after receiving them.
161 // assert(!pkt->needsWritable() || blk->isWritable());
162 assert(pkt->getOffset(blkSize) + pkt->getSize() <= blkSize);
163
164 // Check RMW operations first since both isRead() and
165 // isWrite() will be true for them
166 if (pkt->cmd == MemCmd::SwapReq) {
167 cmpAndSwap(blk, pkt);
168 } else if (pkt->isWrite()) {
169 // we have the block in a writable state and can go ahead,
170 // note that the line may be also be considered writable in
171 // downstream caches along the path to memory, but always
172 // Exclusive, and never Modified
173 assert(blk->isWritable());
174 // Write or WriteLine at the first cache with block in writable state
175 if (blk->checkWrite(pkt)) {
176 pkt->writeDataToBlock(blk->data, blkSize);
177 }
178 // Always mark the line as dirty (and thus transition to the
179 // Modified state) even if we are a failed StoreCond so we
180 // supply data to any snoops that have appended themselves to
181 // this cache before knowing the store will fail.
182 blk->status |= BlkDirty;
|
183 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d (write)\n",
184 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize());
| 183 DPRINTF(CacheVerbose, "%s for %s (write)\n", __func__, pkt->print());
|
185 } else if (pkt->isRead()) {
186 if (pkt->isLLSC()) {
187 blk->trackLoadLocked(pkt);
188 }
189
190 // all read responses have a data payload
191 assert(pkt->hasRespData());
192 pkt->setDataFromBlock(blk->data, blkSize);
193
194 // determine if this read is from a (coherent) cache or not
195 if (pkt->fromCache()) {
196 assert(pkt->getSize() == blkSize);
197 // special handling for coherent block requests from
198 // upper-level caches
199 if (pkt->needsWritable()) {
200 // sanity check
201 assert(pkt->cmd == MemCmd::ReadExReq ||
202 pkt->cmd == MemCmd::SCUpgradeFailReq);
203 assert(!pkt->hasSharers());
204
205 // if we have a dirty copy, make sure the recipient
206 // keeps it marked dirty (in the modified state)
207 if (blk->isDirty()) {
208 pkt->setCacheResponding();
209 blk->status &= ~BlkDirty;
210 }
211 } else if (blk->isWritable() && !pending_downgrade &&
212 !pkt->hasSharers() &&
213 pkt->cmd != MemCmd::ReadCleanReq) {
214 // we can give the requester a writable copy on a read
215 // request if:
216 // - we have a writable copy at this level (& below)
217 // - we don't have a pending snoop from below
218 // signaling another read request
219 // - no other cache above has a copy (otherwise it
220 // would have set hasSharers flag when
221 // snooping the packet)
222 // - the read has explicitly asked for a clean
223 // copy of the line
224 if (blk->isDirty()) {
225 // special considerations if we're owner:
226 if (!deferred_response) {
227 // respond with the line in Modified state
228 // (cacheResponding set, hasSharers not set)
229 pkt->setCacheResponding();
230
231 // if this cache is mostly inclusive, we
232 // keep the block in the Exclusive state,
233 // and pass it upwards as Modified
234 // (writable and dirty), hence we have
235 // multiple caches, all on the same path
236 // towards memory, all considering the
237 // same block writable, but only one
238 // considering it Modified
239
240 // we get away with multiple caches (on
241 // the same path to memory) considering
242 // the block writeable as we always enter
243 // the cache hierarchy through a cache,
244 // and first snoop upwards in all other
245 // branches
246 blk->status &= ~BlkDirty;
247 } else {
248 // if we're responding after our own miss,
249 // there's a window where the recipient didn't
250 // know it was getting ownership and may not
251 // have responded to snoops correctly, so we
252 // have to respond with a shared line
253 pkt->setHasSharers();
254 }
255 }
256 } else {
257 // otherwise only respond with a shared copy
258 pkt->setHasSharers();
259 }
260 }
261 } else if (pkt->isUpgrade()) {
262 // sanity check
263 assert(!pkt->hasSharers());
264
265 if (blk->isDirty()) {
266 // we were in the Owned state, and a cache above us that
267 // has the line in Shared state needs to be made aware
268 // that the data it already has is in fact dirty
269 pkt->setCacheResponding();
270 blk->status &= ~BlkDirty;
271 }
272 } else {
273 assert(pkt->isInvalidate());
274 invalidateBlock(blk);
| 184 } else if (pkt->isRead()) {
185 if (pkt->isLLSC()) {
186 blk->trackLoadLocked(pkt);
187 }
188
189 // all read responses have a data payload
190 assert(pkt->hasRespData());
191 pkt->setDataFromBlock(blk->data, blkSize);
192
193 // determine if this read is from a (coherent) cache or not
194 if (pkt->fromCache()) {
195 assert(pkt->getSize() == blkSize);
196 // special handling for coherent block requests from
197 // upper-level caches
198 if (pkt->needsWritable()) {
199 // sanity check
200 assert(pkt->cmd == MemCmd::ReadExReq ||
201 pkt->cmd == MemCmd::SCUpgradeFailReq);
202 assert(!pkt->hasSharers());
203
204 // if we have a dirty copy, make sure the recipient
205 // keeps it marked dirty (in the modified state)
206 if (blk->isDirty()) {
207 pkt->setCacheResponding();
208 blk->status &= ~BlkDirty;
209 }
210 } else if (blk->isWritable() && !pending_downgrade &&
211 !pkt->hasSharers() &&
212 pkt->cmd != MemCmd::ReadCleanReq) {
213 // we can give the requester a writable copy on a read
214 // request if:
215 // - we have a writable copy at this level (& below)
216 // - we don't have a pending snoop from below
217 // signaling another read request
218 // - no other cache above has a copy (otherwise it
219 // would have set hasSharers flag when
220 // snooping the packet)
221 // - the read has explicitly asked for a clean
222 // copy of the line
223 if (blk->isDirty()) {
224 // special considerations if we're owner:
225 if (!deferred_response) {
226 // respond with the line in Modified state
227 // (cacheResponding set, hasSharers not set)
228 pkt->setCacheResponding();
229
230 // if this cache is mostly inclusive, we
231 // keep the block in the Exclusive state,
232 // and pass it upwards as Modified
233 // (writable and dirty), hence we have
234 // multiple caches, all on the same path
235 // towards memory, all considering the
236 // same block writable, but only one
237 // considering it Modified
238
239 // we get away with multiple caches (on
240 // the same path to memory) considering
241 // the block writeable as we always enter
242 // the cache hierarchy through a cache,
243 // and first snoop upwards in all other
244 // branches
245 blk->status &= ~BlkDirty;
246 } else {
247 // if we're responding after our own miss,
248 // there's a window where the recipient didn't
249 // know it was getting ownership and may not
250 // have responded to snoops correctly, so we
251 // have to respond with a shared line
252 pkt->setHasSharers();
253 }
254 }
255 } else {
256 // otherwise only respond with a shared copy
257 pkt->setHasSharers();
258 }
259 }
260 } else if (pkt->isUpgrade()) {
261 // sanity check
262 assert(!pkt->hasSharers());
263
264 if (blk->isDirty()) {
265 // we were in the Owned state, and a cache above us that
266 // has the line in Shared state needs to be made aware
267 // that the data it already has is in fact dirty
268 pkt->setCacheResponding();
269 blk->status &= ~BlkDirty;
270 }
271 } else {
272 assert(pkt->isInvalidate());
273 invalidateBlock(blk);
|
275 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d (invalidation)\n",
276 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize());
| 274 DPRINTF(CacheVerbose, "%s for %s (invalidation)\n", __func__,
275 pkt->print());
|
277 }
278}
279
280/////////////////////////////////////////////////////
281//
282// Access path: requests coming in from the CPU side
283//
284/////////////////////////////////////////////////////
285
286bool
287Cache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat,
288 PacketList &writebacks)
289{
290 // sanity check
291 assert(pkt->isRequest());
292
293 chatty_assert(!(isReadOnly && pkt->isWrite()),
294 "Should never see a write in a read-only cache %s\n",
295 name());
296
| 276 }
277}
278
279/////////////////////////////////////////////////////
280//
281// Access path: requests coming in from the CPU side
282//
283/////////////////////////////////////////////////////
284
285bool
286Cache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat,
287 PacketList &writebacks)
288{
289 // sanity check
290 assert(pkt->isRequest());
291
292 chatty_assert(!(isReadOnly && pkt->isWrite()),
293 "Should never see a write in a read-only cache %s\n",
294 name());
295
|
297 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d\n", __func__,
298 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
| 296 DPRINTF(CacheVerbose, "%s for %s\n", __func__, pkt->print());
|
299
300 if (pkt->req->isUncacheable()) {
| 297
298 if (pkt->req->isUncacheable()) {
|
301 DPRINTF(Cache, "%s%s addr %#llx uncacheable\n", pkt->cmdString(),
302 pkt->req->isInstFetch() ? " (ifetch)" : "",
303 pkt->getAddr());
| 299 DPRINTF(Cache, "uncacheable: %s\n", pkt->print());
|
304
305 // flush and invalidate any existing block
306 CacheBlk *old_blk(tags->findBlock(pkt->getAddr(), pkt->isSecure()));
307 if (old_blk && old_blk->isValid()) {
308 if (old_blk->isDirty() || writebackClean)
309 writebacks.push_back(writebackBlk(old_blk));
310 else
311 writebacks.push_back(cleanEvictBlk(old_blk));
312 tags->invalidate(old_blk);
313 old_blk->invalidate();
314 }
315
316 blk = nullptr;
317 // lookupLatency is the latency in case the request is uncacheable.
318 lat = lookupLatency;
319 return false;
320 }
321
322 ContextID id = pkt->req->hasContextId() ?
323 pkt->req->contextId() : InvalidContextID;
324 // Here lat is the value passed as parameter to accessBlock() function
325 // that can modify its value.
326 blk = tags->accessBlock(pkt->getAddr(), pkt->isSecure(), lat, id);
327
| 300
301 // flush and invalidate any existing block
302 CacheBlk *old_blk(tags->findBlock(pkt->getAddr(), pkt->isSecure()));
303 if (old_blk && old_blk->isValid()) {
304 if (old_blk->isDirty() || writebackClean)
305 writebacks.push_back(writebackBlk(old_blk));
306 else
307 writebacks.push_back(cleanEvictBlk(old_blk));
308 tags->invalidate(old_blk);
309 old_blk->invalidate();
310 }
311
312 blk = nullptr;
313 // lookupLatency is the latency in case the request is uncacheable.
314 lat = lookupLatency;
315 return false;
316 }
317
318 ContextID id = pkt->req->hasContextId() ?
319 pkt->req->contextId() : InvalidContextID;
320 // Here lat is the value passed as parameter to accessBlock() function
321 // that can modify its value.
322 blk = tags->accessBlock(pkt->getAddr(), pkt->isSecure(), lat, id);
323
|
328 DPRINTF(Cache, "%s%s addr %#llx size %d (%s) %s\n", pkt->cmdString(),
329 pkt->req->isInstFetch() ? " (ifetch)" : "",
330 pkt->getAddr(), pkt->getSize(), pkt->isSecure() ? "s" : "ns",
| 324 DPRINTF(Cache, "%s %s\n", pkt->print(),
|
331 blk ? "hit " + blk->print() : "miss");
332
333
334 if (pkt->isEviction()) {
335 // We check for presence of block in above caches before issuing
336 // Writeback or CleanEvict to write buffer. Therefore the only
337 // possible cases can be of a CleanEvict packet coming from above
338 // encountering a Writeback generated in this cache peer cache and
339 // waiting in the write buffer. Cases of upper level peer caches
340 // generating CleanEvict and Writeback or simply CleanEvict and
341 // CleanEvict almost simultaneously will be caught by snoops sent out
342 // by crossbar.
343 WriteQueueEntry *wb_entry = writeBuffer.findMatch(pkt->getAddr(),
344 pkt->isSecure());
345 if (wb_entry) {
346 assert(wb_entry->getNumTargets() == 1);
347 PacketPtr wbPkt = wb_entry->getTarget()->pkt;
348 assert(wbPkt->isWriteback());
349
350 if (pkt->isCleanEviction()) {
351 // The CleanEvict and WritebackClean snoops into other
352 // peer caches of the same level while traversing the
353 // crossbar. If a copy of the block is found, the
354 // packet is deleted in the crossbar. Hence, none of
355 // the other upper level caches connected to this
356 // cache have the block, so we can clear the
357 // BLOCK_CACHED flag in the Writeback if set and
358 // discard the CleanEvict by returning true.
359 wbPkt->clearBlockCached();
360 return true;
361 } else {
362 assert(pkt->cmd == MemCmd::WritebackDirty);
363 // Dirty writeback from above trumps our clean
364 // writeback... discard here
365 // Note: markInService will remove entry from writeback buffer.
366 markInService(wb_entry);
367 delete wbPkt;
368 }
369 }
370 }
371
372 // Writeback handling is special case. We can write the block into
373 // the cache without having a writeable copy (or any copy at all).
374 if (pkt->isWriteback()) {
375 assert(blkSize == pkt->getSize());
376
377 // we could get a clean writeback while we are having
378 // outstanding accesses to a block, do the simple thing for
379 // now and drop the clean writeback so that we do not upset
380 // any ordering/decisions about ownership already taken
381 if (pkt->cmd == MemCmd::WritebackClean &&
382 mshrQueue.findMatch(pkt->getAddr(), pkt->isSecure())) {
383 DPRINTF(Cache, "Clean writeback %#llx to block with MSHR, "
384 "dropping\n", pkt->getAddr());
385 return true;
386 }
387
388 if (blk == nullptr) {
389 // need to do a replacement
390 blk = allocateBlock(pkt->getAddr(), pkt->isSecure(), writebacks);
391 if (blk == nullptr) {
392 // no replaceable block available: give up, fwd to next level.
393 incMissCount(pkt);
394 return false;
395 }
396 tags->insertBlock(pkt, blk);
397
398 blk->status = (BlkValid | BlkReadable);
399 if (pkt->isSecure()) {
400 blk->status |= BlkSecure;
401 }
402 }
403 // only mark the block dirty if we got a writeback command,
404 // and leave it as is for a clean writeback
405 if (pkt->cmd == MemCmd::WritebackDirty) {
406 blk->status |= BlkDirty;
407 }
408 // if the packet does not have sharers, it is passing
409 // writable, and we got the writeback in Modified or Exclusive
410 // state, if not we are in the Owned or Shared state
411 if (!pkt->hasSharers()) {
412 blk->status |= BlkWritable;
413 }
414 // nothing else to do; writeback doesn't expect response
415 assert(!pkt->needsResponse());
416 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize);
417 DPRINTF(Cache, "%s new state is %s\n", __func__, blk->print());
418 incHitCount(pkt);
419 return true;
420 } else if (pkt->cmd == MemCmd::CleanEvict) {
421 if (blk != nullptr) {
422 // Found the block in the tags, need to stop CleanEvict from
423 // propagating further down the hierarchy. Returning true will
424 // treat the CleanEvict like a satisfied write request and delete
425 // it.
426 return true;
427 }
428 // We didn't find the block here, propagate the CleanEvict further
429 // down the memory hierarchy. Returning false will treat the CleanEvict
430 // like a Writeback which could not find a replaceable block so has to
431 // go to next level.
432 return false;
433 } else if (blk && (pkt->needsWritable() ? blk->isWritable() :
434 blk->isReadable())) {
435 // OK to satisfy access
436 incHitCount(pkt);
437 satisfyRequest(pkt, blk);
438 maintainClusivity(pkt->fromCache(), blk);
439
440 return true;
441 }
442
443 // Can't satisfy access normally... either no block (blk == nullptr)
444 // or have block but need writable
445
446 incMissCount(pkt);
447
448 if (blk == nullptr && pkt->isLLSC() && pkt->isWrite()) {
449 // complete miss on store conditional... just give up now
450 pkt->req->setExtraData(0);
451 return true;
452 }
453
454 return false;
455}
456
457void
458Cache::maintainClusivity(bool from_cache, CacheBlk *blk)
459{
460 if (from_cache && blk && blk->isValid() && !blk->isDirty() &&
461 clusivity == Enums::mostly_excl) {
462 // if we have responded to a cache, and our block is still
463 // valid, but not dirty, and this cache is mostly exclusive
464 // with respect to the cache above, drop the block
465 invalidateBlock(blk);
466 }
467}
468
469void
470Cache::doWritebacks(PacketList& writebacks, Tick forward_time)
471{
472 while (!writebacks.empty()) {
473 PacketPtr wbPkt = writebacks.front();
474 // We use forwardLatency here because we are copying writebacks to
475 // write buffer. Call isCachedAbove for both Writebacks and
476 // CleanEvicts. If isCachedAbove returns true we set BLOCK_CACHED flag
477 // in Writebacks and discard CleanEvicts.
478 if (isCachedAbove(wbPkt)) {
479 if (wbPkt->cmd == MemCmd::CleanEvict) {
480 // Delete CleanEvict because cached copies exist above. The
481 // packet destructor will delete the request object because
482 // this is a non-snoop request packet which does not require a
483 // response.
484 delete wbPkt;
485 } else if (wbPkt->cmd == MemCmd::WritebackClean) {
486 // clean writeback, do not send since the block is
487 // still cached above
488 assert(writebackClean);
489 delete wbPkt;
490 } else {
491 assert(wbPkt->cmd == MemCmd::WritebackDirty);
492 // Set BLOCK_CACHED flag in Writeback and send below, so that
493 // the Writeback does not reset the bit corresponding to this
494 // address in the snoop filter below.
495 wbPkt->setBlockCached();
496 allocateWriteBuffer(wbPkt, forward_time);
497 }
498 } else {
499 // If the block is not cached above, send packet below. Both
500 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
501 // reset the bit corresponding to this address in the snoop filter
502 // below.
503 allocateWriteBuffer(wbPkt, forward_time);
504 }
505 writebacks.pop_front();
506 }
507}
508
509void
510Cache::doWritebacksAtomic(PacketList& writebacks)
511{
512 while (!writebacks.empty()) {
513 PacketPtr wbPkt = writebacks.front();
514 // Call isCachedAbove for both Writebacks and CleanEvicts. If
515 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks
516 // and discard CleanEvicts.
517 if (isCachedAbove(wbPkt, false)) {
518 if (wbPkt->cmd == MemCmd::WritebackDirty) {
519 // Set BLOCK_CACHED flag in Writeback and send below,
520 // so that the Writeback does not reset the bit
521 // corresponding to this address in the snoop filter
522 // below. We can discard CleanEvicts because cached
523 // copies exist above. Atomic mode isCachedAbove
524 // modifies packet to set BLOCK_CACHED flag
525 memSidePort->sendAtomic(wbPkt);
526 }
527 } else {
528 // If the block is not cached above, send packet below. Both
529 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
530 // reset the bit corresponding to this address in the snoop filter
531 // below.
532 memSidePort->sendAtomic(wbPkt);
533 }
534 writebacks.pop_front();
535 // In case of CleanEvicts, the packet destructor will delete the
536 // request object because this is a non-snoop request packet which
537 // does not require a response.
538 delete wbPkt;
539 }
540}
541
542
543void
544Cache::recvTimingSnoopResp(PacketPtr pkt)
545{
| 325 blk ? "hit " + blk->print() : "miss");
326
327
328 if (pkt->isEviction()) {
329 // We check for presence of block in above caches before issuing
330 // Writeback or CleanEvict to write buffer. Therefore the only
331 // possible cases can be of a CleanEvict packet coming from above
332 // encountering a Writeback generated in this cache peer cache and
333 // waiting in the write buffer. Cases of upper level peer caches
334 // generating CleanEvict and Writeback or simply CleanEvict and
335 // CleanEvict almost simultaneously will be caught by snoops sent out
336 // by crossbar.
337 WriteQueueEntry *wb_entry = writeBuffer.findMatch(pkt->getAddr(),
338 pkt->isSecure());
339 if (wb_entry) {
340 assert(wb_entry->getNumTargets() == 1);
341 PacketPtr wbPkt = wb_entry->getTarget()->pkt;
342 assert(wbPkt->isWriteback());
343
344 if (pkt->isCleanEviction()) {
345 // The CleanEvict and WritebackClean snoops into other
346 // peer caches of the same level while traversing the
347 // crossbar. If a copy of the block is found, the
348 // packet is deleted in the crossbar. Hence, none of
349 // the other upper level caches connected to this
350 // cache have the block, so we can clear the
351 // BLOCK_CACHED flag in the Writeback if set and
352 // discard the CleanEvict by returning true.
353 wbPkt->clearBlockCached();
354 return true;
355 } else {
356 assert(pkt->cmd == MemCmd::WritebackDirty);
357 // Dirty writeback from above trumps our clean
358 // writeback... discard here
359 // Note: markInService will remove entry from writeback buffer.
360 markInService(wb_entry);
361 delete wbPkt;
362 }
363 }
364 }
365
366 // Writeback handling is special case. We can write the block into
367 // the cache without having a writeable copy (or any copy at all).
368 if (pkt->isWriteback()) {
369 assert(blkSize == pkt->getSize());
370
371 // we could get a clean writeback while we are having
372 // outstanding accesses to a block, do the simple thing for
373 // now and drop the clean writeback so that we do not upset
374 // any ordering/decisions about ownership already taken
375 if (pkt->cmd == MemCmd::WritebackClean &&
376 mshrQueue.findMatch(pkt->getAddr(), pkt->isSecure())) {
377 DPRINTF(Cache, "Clean writeback %#llx to block with MSHR, "
378 "dropping\n", pkt->getAddr());
379 return true;
380 }
381
382 if (blk == nullptr) {
383 // need to do a replacement
384 blk = allocateBlock(pkt->getAddr(), pkt->isSecure(), writebacks);
385 if (blk == nullptr) {
386 // no replaceable block available: give up, fwd to next level.
387 incMissCount(pkt);
388 return false;
389 }
390 tags->insertBlock(pkt, blk);
391
392 blk->status = (BlkValid | BlkReadable);
393 if (pkt->isSecure()) {
394 blk->status |= BlkSecure;
395 }
396 }
397 // only mark the block dirty if we got a writeback command,
398 // and leave it as is for a clean writeback
399 if (pkt->cmd == MemCmd::WritebackDirty) {
400 blk->status |= BlkDirty;
401 }
402 // if the packet does not have sharers, it is passing
403 // writable, and we got the writeback in Modified or Exclusive
404 // state, if not we are in the Owned or Shared state
405 if (!pkt->hasSharers()) {
406 blk->status |= BlkWritable;
407 }
408 // nothing else to do; writeback doesn't expect response
409 assert(!pkt->needsResponse());
410 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize);
411 DPRINTF(Cache, "%s new state is %s\n", __func__, blk->print());
412 incHitCount(pkt);
413 return true;
414 } else if (pkt->cmd == MemCmd::CleanEvict) {
415 if (blk != nullptr) {
416 // Found the block in the tags, need to stop CleanEvict from
417 // propagating further down the hierarchy. Returning true will
418 // treat the CleanEvict like a satisfied write request and delete
419 // it.
420 return true;
421 }
422 // We didn't find the block here, propagate the CleanEvict further
423 // down the memory hierarchy. Returning false will treat the CleanEvict
424 // like a Writeback which could not find a replaceable block so has to
425 // go to next level.
426 return false;
427 } else if (blk && (pkt->needsWritable() ? blk->isWritable() :
428 blk->isReadable())) {
429 // OK to satisfy access
430 incHitCount(pkt);
431 satisfyRequest(pkt, blk);
432 maintainClusivity(pkt->fromCache(), blk);
433
434 return true;
435 }
436
437 // Can't satisfy access normally... either no block (blk == nullptr)
438 // or have block but need writable
439
440 incMissCount(pkt);
441
442 if (blk == nullptr && pkt->isLLSC() && pkt->isWrite()) {
443 // complete miss on store conditional... just give up now
444 pkt->req->setExtraData(0);
445 return true;
446 }
447
448 return false;
449}
450
451void
452Cache::maintainClusivity(bool from_cache, CacheBlk *blk)
453{
454 if (from_cache && blk && blk->isValid() && !blk->isDirty() &&
455 clusivity == Enums::mostly_excl) {
456 // if we have responded to a cache, and our block is still
457 // valid, but not dirty, and this cache is mostly exclusive
458 // with respect to the cache above, drop the block
459 invalidateBlock(blk);
460 }
461}
462
463void
464Cache::doWritebacks(PacketList& writebacks, Tick forward_time)
465{
466 while (!writebacks.empty()) {
467 PacketPtr wbPkt = writebacks.front();
468 // We use forwardLatency here because we are copying writebacks to
469 // write buffer. Call isCachedAbove for both Writebacks and
470 // CleanEvicts. If isCachedAbove returns true we set BLOCK_CACHED flag
471 // in Writebacks and discard CleanEvicts.
472 if (isCachedAbove(wbPkt)) {
473 if (wbPkt->cmd == MemCmd::CleanEvict) {
474 // Delete CleanEvict because cached copies exist above. The
475 // packet destructor will delete the request object because
476 // this is a non-snoop request packet which does not require a
477 // response.
478 delete wbPkt;
479 } else if (wbPkt->cmd == MemCmd::WritebackClean) {
480 // clean writeback, do not send since the block is
481 // still cached above
482 assert(writebackClean);
483 delete wbPkt;
484 } else {
485 assert(wbPkt->cmd == MemCmd::WritebackDirty);
486 // Set BLOCK_CACHED flag in Writeback and send below, so that
487 // the Writeback does not reset the bit corresponding to this
488 // address in the snoop filter below.
489 wbPkt->setBlockCached();
490 allocateWriteBuffer(wbPkt, forward_time);
491 }
492 } else {
493 // If the block is not cached above, send packet below. Both
494 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
495 // reset the bit corresponding to this address in the snoop filter
496 // below.
497 allocateWriteBuffer(wbPkt, forward_time);
498 }
499 writebacks.pop_front();
500 }
501}
502
503void
504Cache::doWritebacksAtomic(PacketList& writebacks)
505{
506 while (!writebacks.empty()) {
507 PacketPtr wbPkt = writebacks.front();
508 // Call isCachedAbove for both Writebacks and CleanEvicts. If
509 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks
510 // and discard CleanEvicts.
511 if (isCachedAbove(wbPkt, false)) {
512 if (wbPkt->cmd == MemCmd::WritebackDirty) {
513 // Set BLOCK_CACHED flag in Writeback and send below,
514 // so that the Writeback does not reset the bit
515 // corresponding to this address in the snoop filter
516 // below. We can discard CleanEvicts because cached
517 // copies exist above. Atomic mode isCachedAbove
518 // modifies packet to set BLOCK_CACHED flag
519 memSidePort->sendAtomic(wbPkt);
520 }
521 } else {
522 // If the block is not cached above, send packet below. Both
523 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
524 // reset the bit corresponding to this address in the snoop filter
525 // below.
526 memSidePort->sendAtomic(wbPkt);
527 }
528 writebacks.pop_front();
529 // In case of CleanEvicts, the packet destructor will delete the
530 // request object because this is a non-snoop request packet which
531 // does not require a response.
532 delete wbPkt;
533 }
534}
535
536
537void
538Cache::recvTimingSnoopResp(PacketPtr pkt)
539{
|
546 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__,
547 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
| 540 DPRINTF(Cache, "%s for %s\n", __func__, pkt->print());
|
548
549 assert(pkt->isResponse());
550 assert(!system->bypassCaches());
551
552 // determine if the response is from a snoop request we created
553 // (in which case it should be in the outstandingSnoop), or if we
554 // merely forwarded someone else's snoop request
555 const bool forwardAsSnoop = outstandingSnoop.find(pkt->req) ==
556 outstandingSnoop.end();
557
558 if (!forwardAsSnoop) {
559 // the packet came from this cache, so sink it here and do not
560 // forward it
561 assert(pkt->cmd == MemCmd::HardPFResp);
562
563 outstandingSnoop.erase(pkt->req);
564
565 DPRINTF(Cache, "Got prefetch response from above for addr "
566 "%#llx (%s)\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
567 recvTimingResp(pkt);
568 return;
569 }
570
571 // forwardLatency is set here because there is a response from an
572 // upper level cache.
573 // To pay the delay that occurs if the packet comes from the bus,
574 // we charge also headerDelay.
575 Tick snoop_resp_time = clockEdge(forwardLatency) + pkt->headerDelay;
576 // Reset the timing of the packet.
577 pkt->headerDelay = pkt->payloadDelay = 0;
578 memSidePort->schedTimingSnoopResp(pkt, snoop_resp_time);
579}
580
581void
582Cache::promoteWholeLineWrites(PacketPtr pkt)
583{
584 // Cache line clearing instructions
585 if (doFastWrites && (pkt->cmd == MemCmd::WriteReq) &&
586 (pkt->getSize() == blkSize) && (pkt->getOffset(blkSize) == 0)) {
587 pkt->cmd = MemCmd::WriteLineReq;
588 DPRINTF(Cache, "packet promoted from Write to WriteLineReq\n");
589 }
590}
591
592bool
593Cache::recvTimingReq(PacketPtr pkt)
594{
595 DPRINTF(CacheTags, "%s tags: %s\n", __func__, tags->print());
596
597 assert(pkt->isRequest());
598
599 // Just forward the packet if caches are disabled.
600 if (system->bypassCaches()) {
601 // @todo This should really enqueue the packet rather
602 bool M5_VAR_USED success = memSidePort->sendTimingReq(pkt);
603 assert(success);
604 return true;
605 }
606
607 promoteWholeLineWrites(pkt);
608
609 if (pkt->cacheResponding()) {
610 // a cache above us (but not where the packet came from) is
611 // responding to the request, in other words it has the line
612 // in Modified or Owned state
| 541
542 assert(pkt->isResponse());
543 assert(!system->bypassCaches());
544
545 // determine if the response is from a snoop request we created
546 // (in which case it should be in the outstandingSnoop), or if we
547 // merely forwarded someone else's snoop request
548 const bool forwardAsSnoop = outstandingSnoop.find(pkt->req) ==
549 outstandingSnoop.end();
550
551 if (!forwardAsSnoop) {
552 // the packet came from this cache, so sink it here and do not
553 // forward it
554 assert(pkt->cmd == MemCmd::HardPFResp);
555
556 outstandingSnoop.erase(pkt->req);
557
558 DPRINTF(Cache, "Got prefetch response from above for addr "
559 "%#llx (%s)\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
560 recvTimingResp(pkt);
561 return;
562 }
563
564 // forwardLatency is set here because there is a response from an
565 // upper level cache.
566 // To pay the delay that occurs if the packet comes from the bus,
567 // we charge also headerDelay.
568 Tick snoop_resp_time = clockEdge(forwardLatency) + pkt->headerDelay;
569 // Reset the timing of the packet.
570 pkt->headerDelay = pkt->payloadDelay = 0;
571 memSidePort->schedTimingSnoopResp(pkt, snoop_resp_time);
572}
573
574void
575Cache::promoteWholeLineWrites(PacketPtr pkt)
576{
577 // Cache line clearing instructions
578 if (doFastWrites && (pkt->cmd == MemCmd::WriteReq) &&
579 (pkt->getSize() == blkSize) && (pkt->getOffset(blkSize) == 0)) {
580 pkt->cmd = MemCmd::WriteLineReq;
581 DPRINTF(Cache, "packet promoted from Write to WriteLineReq\n");
582 }
583}
584
585bool
586Cache::recvTimingReq(PacketPtr pkt)
587{
588 DPRINTF(CacheTags, "%s tags: %s\n", __func__, tags->print());
589
590 assert(pkt->isRequest());
591
592 // Just forward the packet if caches are disabled.
593 if (system->bypassCaches()) {
594 // @todo This should really enqueue the packet rather
595 bool M5_VAR_USED success = memSidePort->sendTimingReq(pkt);
596 assert(success);
597 return true;
598 }
599
600 promoteWholeLineWrites(pkt);
601
602 if (pkt->cacheResponding()) {
603 // a cache above us (but not where the packet came from) is
604 // responding to the request, in other words it has the line
605 // in Modified or Owned state
|
613 DPRINTF(Cache, "Cache above responding to %#llx (%s): "
614 "not responding\n",
615 pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
| 606 DPRINTF(Cache, "Cache above responding to %s: not responding\n",
607 pkt->print());
|
616
617 // if the packet needs the block to be writable, and the cache
618 // that has promised to respond (setting the cache responding
619 // flag) is not providing writable (it is in Owned rather than
620 // the Modified state), we know that there may be other Shared
621 // copies in the system; go out and invalidate them all
622 assert(pkt->needsWritable() && !pkt->responderHadWritable());
623
624 // an upstream cache that had the line in Owned state
625 // (dirty, but not writable), is responding and thus
626 // transferring the dirty line from one branch of the
627 // cache hierarchy to another
628
629 // send out an express snoop and invalidate all other
630 // copies (snooping a packet that needs writable is the
631 // same as an invalidation), thus turning the Owned line
632 // into a Modified line, note that we don't invalidate the
633 // block in the current cache or any other cache on the
634 // path to memory
635
636 // create a downstream express snoop with cleared packet
637 // flags, there is no need to allocate any data as the
638 // packet is merely used to co-ordinate state transitions
639 Packet *snoop_pkt = new Packet(pkt, true, false);
640
641 // also reset the bus time that the original packet has
642 // not yet paid for
643 snoop_pkt->headerDelay = snoop_pkt->payloadDelay = 0;
644
645 // make this an instantaneous express snoop, and let the
646 // other caches in the system know that the another cache
647 // is responding, because we have found the authorative
648 // copy (Modified or Owned) that will supply the right
649 // data
650 snoop_pkt->setExpressSnoop();
651 snoop_pkt->setCacheResponding();
652
653 // this express snoop travels towards the memory, and at
654 // every crossbar it is snooped upwards thus reaching
655 // every cache in the system
656 bool M5_VAR_USED success = memSidePort->sendTimingReq(snoop_pkt);
657 // express snoops always succeed
658 assert(success);
659
660 // main memory will delete the snoop packet
661
662 // queue for deletion, as opposed to immediate deletion, as
663 // the sending cache is still relying on the packet
664 pendingDelete.reset(pkt);
665
666 // no need to take any further action in this particular cache
667 // as an upstram cache has already committed to responding,
668 // and we have already sent out any express snoops in the
669 // section above to ensure all other copies in the system are
670 // invalidated
671 return true;
672 }
673
674 // anything that is merely forwarded pays for the forward latency and
675 // the delay provided by the crossbar
676 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
677
678 // We use lookupLatency here because it is used to specify the latency
679 // to access.
680 Cycles lat = lookupLatency;
681 CacheBlk *blk = nullptr;
682 bool satisfied = false;
683 {
684 PacketList writebacks;
685 // Note that lat is passed by reference here. The function
686 // access() calls accessBlock() which can modify lat value.
687 satisfied = access(pkt, blk, lat, writebacks);
688
689 // copy writebacks to write buffer here to ensure they logically
690 // proceed anything happening below
691 doWritebacks(writebacks, forward_time);
692 }
693
694 // Here we charge the headerDelay that takes into account the latencies
695 // of the bus, if the packet comes from it.
696 // The latency charged it is just lat that is the value of lookupLatency
697 // modified by access() function, or if not just lookupLatency.
698 // In case of a hit we are neglecting response latency.
699 // In case of a miss we are neglecting forward latency.
700 Tick request_time = clockEdge(lat) + pkt->headerDelay;
701 // Here we reset the timing of the packet.
702 pkt->headerDelay = pkt->payloadDelay = 0;
703
704 // track time of availability of next prefetch, if any
705 Tick next_pf_time = MaxTick;
706
707 bool needsResponse = pkt->needsResponse();
708
709 if (satisfied) {
710 // should never be satisfying an uncacheable access as we
711 // flush and invalidate any existing block as part of the
712 // lookup
713 assert(!pkt->req->isUncacheable());
714
715 // hit (for all other request types)
716
717 if (prefetcher && (prefetchOnAccess ||
718 (blk && blk->wasPrefetched()))) {
719 if (blk)
720 blk->status &= ~BlkHWPrefetched;
721
722 // Don't notify on SWPrefetch
723 if (!pkt->cmd.isSWPrefetch())
724 next_pf_time = prefetcher->notify(pkt);
725 }
726
727 if (needsResponse) {
728 pkt->makeTimingResponse();
729 // @todo: Make someone pay for this
730 pkt->headerDelay = pkt->payloadDelay = 0;
731
732 // In this case we are considering request_time that takes
733 // into account the delay of the xbar, if any, and just
734 // lat, neglecting responseLatency, modelling hit latency
735 // just as lookupLatency or or the value of lat overriden
736 // by access(), that calls accessBlock() function.
737 cpuSidePort->schedTimingResp(pkt, request_time, true);
738 } else {
| 608
609 // if the packet needs the block to be writable, and the cache
610 // that has promised to respond (setting the cache responding
611 // flag) is not providing writable (it is in Owned rather than
612 // the Modified state), we know that there may be other Shared
613 // copies in the system; go out and invalidate them all
614 assert(pkt->needsWritable() && !pkt->responderHadWritable());
615
616 // an upstream cache that had the line in Owned state
617 // (dirty, but not writable), is responding and thus
618 // transferring the dirty line from one branch of the
619 // cache hierarchy to another
620
621 // send out an express snoop and invalidate all other
622 // copies (snooping a packet that needs writable is the
623 // same as an invalidation), thus turning the Owned line
624 // into a Modified line, note that we don't invalidate the
625 // block in the current cache or any other cache on the
626 // path to memory
627
628 // create a downstream express snoop with cleared packet
629 // flags, there is no need to allocate any data as the
630 // packet is merely used to co-ordinate state transitions
631 Packet *snoop_pkt = new Packet(pkt, true, false);
632
633 // also reset the bus time that the original packet has
634 // not yet paid for
635 snoop_pkt->headerDelay = snoop_pkt->payloadDelay = 0;
636
637 // make this an instantaneous express snoop, and let the
638 // other caches in the system know that the another cache
639 // is responding, because we have found the authorative
640 // copy (Modified or Owned) that will supply the right
641 // data
642 snoop_pkt->setExpressSnoop();
643 snoop_pkt->setCacheResponding();
644
645 // this express snoop travels towards the memory, and at
646 // every crossbar it is snooped upwards thus reaching
647 // every cache in the system
648 bool M5_VAR_USED success = memSidePort->sendTimingReq(snoop_pkt);
649 // express snoops always succeed
650 assert(success);
651
652 // main memory will delete the snoop packet
653
654 // queue for deletion, as opposed to immediate deletion, as
655 // the sending cache is still relying on the packet
656 pendingDelete.reset(pkt);
657
658 // no need to take any further action in this particular cache
659 // as an upstram cache has already committed to responding,
660 // and we have already sent out any express snoops in the
661 // section above to ensure all other copies in the system are
662 // invalidated
663 return true;
664 }
665
666 // anything that is merely forwarded pays for the forward latency and
667 // the delay provided by the crossbar
668 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
669
670 // We use lookupLatency here because it is used to specify the latency
671 // to access.
672 Cycles lat = lookupLatency;
673 CacheBlk *blk = nullptr;
674 bool satisfied = false;
675 {
676 PacketList writebacks;
677 // Note that lat is passed by reference here. The function
678 // access() calls accessBlock() which can modify lat value.
679 satisfied = access(pkt, blk, lat, writebacks);
680
681 // copy writebacks to write buffer here to ensure they logically
682 // proceed anything happening below
683 doWritebacks(writebacks, forward_time);
684 }
685
686 // Here we charge the headerDelay that takes into account the latencies
687 // of the bus, if the packet comes from it.
688 // The latency charged it is just lat that is the value of lookupLatency
689 // modified by access() function, or if not just lookupLatency.
690 // In case of a hit we are neglecting response latency.
691 // In case of a miss we are neglecting forward latency.
692 Tick request_time = clockEdge(lat) + pkt->headerDelay;
693 // Here we reset the timing of the packet.
694 pkt->headerDelay = pkt->payloadDelay = 0;
695
696 // track time of availability of next prefetch, if any
697 Tick next_pf_time = MaxTick;
698
699 bool needsResponse = pkt->needsResponse();
700
701 if (satisfied) {
702 // should never be satisfying an uncacheable access as we
703 // flush and invalidate any existing block as part of the
704 // lookup
705 assert(!pkt->req->isUncacheable());
706
707 // hit (for all other request types)
708
709 if (prefetcher && (prefetchOnAccess ||
710 (blk && blk->wasPrefetched()))) {
711 if (blk)
712 blk->status &= ~BlkHWPrefetched;
713
714 // Don't notify on SWPrefetch
715 if (!pkt->cmd.isSWPrefetch())
716 next_pf_time = prefetcher->notify(pkt);
717 }
718
719 if (needsResponse) {
720 pkt->makeTimingResponse();
721 // @todo: Make someone pay for this
722 pkt->headerDelay = pkt->payloadDelay = 0;
723
724 // In this case we are considering request_time that takes
725 // into account the delay of the xbar, if any, and just
726 // lat, neglecting responseLatency, modelling hit latency
727 // just as lookupLatency or or the value of lat overriden
728 // by access(), that calls accessBlock() function.
729 cpuSidePort->schedTimingResp(pkt, request_time, true);
730 } else {
|
739 DPRINTF(Cache, "%s satisfied %s addr %#llx, no response needed\n",
740 __func__, pkt->cmdString(), pkt->getAddr());
| 731 DPRINTF(Cache, "%s satisfied %s, no response needed\n", __func__,
732 pkt->print());
|
741
742 // queue the packet for deletion, as the sending cache is
743 // still relying on it; if the block is found in access(),
744 // CleanEvict and Writeback messages will be deleted
745 // here as well
746 pendingDelete.reset(pkt);
747 }
748 } else {
749 // miss
750
751 Addr blk_addr = blockAlign(pkt->getAddr());
752
753 // ignore any existing MSHR if we are dealing with an
754 // uncacheable request
755 MSHR *mshr = pkt->req->isUncacheable() ? nullptr :
756 mshrQueue.findMatch(blk_addr, pkt->isSecure());
757
758 // Software prefetch handling:
759 // To keep the core from waiting on data it won't look at
760 // anyway, send back a response with dummy data. Miss handling
761 // will continue asynchronously. Unfortunately, the core will
762 // insist upon freeing original Packet/Request, so we have to
763 // create a new pair with a different lifecycle. Note that this
764 // processing happens before any MSHR munging on the behalf of
765 // this request because this new Request will be the one stored
766 // into the MSHRs, not the original.
767 if (pkt->cmd.isSWPrefetch()) {
768 assert(needsResponse);
769 assert(pkt->req->hasPaddr());
770 assert(!pkt->req->isUncacheable());
771
772 // There's no reason to add a prefetch as an additional target
773 // to an existing MSHR. If an outstanding request is already
774 // in progress, there is nothing for the prefetch to do.
775 // If this is the case, we don't even create a request at all.
776 PacketPtr pf = nullptr;
777
778 if (!mshr) {
779 // copy the request and create a new SoftPFReq packet
780 RequestPtr req = new Request(pkt->req->getPaddr(),
781 pkt->req->getSize(),
782 pkt->req->getFlags(),
783 pkt->req->masterId());
784 pf = new Packet(req, pkt->cmd);
785 pf->allocate();
786 assert(pf->getAddr() == pkt->getAddr());
787 assert(pf->getSize() == pkt->getSize());
788 }
789
790 pkt->makeTimingResponse();
791
792 // request_time is used here, taking into account lat and the delay
793 // charged if the packet comes from the xbar.
794 cpuSidePort->schedTimingResp(pkt, request_time, true);
795
796 // If an outstanding request is in progress (we found an
797 // MSHR) this is set to null
798 pkt = pf;
799 }
800
801 if (mshr) {
802 /// MSHR hit
803 /// @note writebacks will be checked in getNextMSHR()
804 /// for any conflicting requests to the same block
805
806 //@todo remove hw_pf here
807
808 // Coalesce unless it was a software prefetch (see above).
809 if (pkt) {
810 assert(!pkt->isWriteback());
811 // CleanEvicts corresponding to blocks which have
812 // outstanding requests in MSHRs are simply sunk here
813 if (pkt->cmd == MemCmd::CleanEvict) {
814 pendingDelete.reset(pkt);
815 } else {
| 733
734 // queue the packet for deletion, as the sending cache is
735 // still relying on it; if the block is found in access(),
736 // CleanEvict and Writeback messages will be deleted
737 // here as well
738 pendingDelete.reset(pkt);
739 }
740 } else {
741 // miss
742
743 Addr blk_addr = blockAlign(pkt->getAddr());
744
745 // ignore any existing MSHR if we are dealing with an
746 // uncacheable request
747 MSHR *mshr = pkt->req->isUncacheable() ? nullptr :
748 mshrQueue.findMatch(blk_addr, pkt->isSecure());
749
750 // Software prefetch handling:
751 // To keep the core from waiting on data it won't look at
752 // anyway, send back a response with dummy data. Miss handling
753 // will continue asynchronously. Unfortunately, the core will
754 // insist upon freeing original Packet/Request, so we have to
755 // create a new pair with a different lifecycle. Note that this
756 // processing happens before any MSHR munging on the behalf of
757 // this request because this new Request will be the one stored
758 // into the MSHRs, not the original.
759 if (pkt->cmd.isSWPrefetch()) {
760 assert(needsResponse);
761 assert(pkt->req->hasPaddr());
762 assert(!pkt->req->isUncacheable());
763
764 // There's no reason to add a prefetch as an additional target
765 // to an existing MSHR. If an outstanding request is already
766 // in progress, there is nothing for the prefetch to do.
767 // If this is the case, we don't even create a request at all.
768 PacketPtr pf = nullptr;
769
770 if (!mshr) {
771 // copy the request and create a new SoftPFReq packet
772 RequestPtr req = new Request(pkt->req->getPaddr(),
773 pkt->req->getSize(),
774 pkt->req->getFlags(),
775 pkt->req->masterId());
776 pf = new Packet(req, pkt->cmd);
777 pf->allocate();
778 assert(pf->getAddr() == pkt->getAddr());
779 assert(pf->getSize() == pkt->getSize());
780 }
781
782 pkt->makeTimingResponse();
783
784 // request_time is used here, taking into account lat and the delay
785 // charged if the packet comes from the xbar.
786 cpuSidePort->schedTimingResp(pkt, request_time, true);
787
788 // If an outstanding request is in progress (we found an
789 // MSHR) this is set to null
790 pkt = pf;
791 }
792
793 if (mshr) {
794 /// MSHR hit
795 /// @note writebacks will be checked in getNextMSHR()
796 /// for any conflicting requests to the same block
797
798 //@todo remove hw_pf here
799
800 // Coalesce unless it was a software prefetch (see above).
801 if (pkt) {
802 assert(!pkt->isWriteback());
803 // CleanEvicts corresponding to blocks which have
804 // outstanding requests in MSHRs are simply sunk here
805 if (pkt->cmd == MemCmd::CleanEvict) {
806 pendingDelete.reset(pkt);
807 } else {
|
816 DPRINTF(Cache, "%s coalescing MSHR for %s addr %#llx "
817 "size %d\n", __func__, pkt->cmdString(),
818 pkt->getAddr(), pkt->getSize());
| 808 DPRINTF(Cache, "%s coalescing MSHR for %s\n", __func__,
809 pkt->print());
|
819
820 assert(pkt->req->masterId() < system->maxMasters());
821 mshr_hits[pkt->cmdToIndex()][pkt->req->masterId()]++;
822 // We use forward_time here because it is the same
823 // considering new targets. We have multiple
824 // requests for the same address here. It
825 // specifies the latency to allocate an internal
826 // buffer and to schedule an event to the queued
827 // port and also takes into account the additional
828 // delay of the xbar.
829 mshr->allocateTarget(pkt, forward_time, order++,
830 allocOnFill(pkt->cmd));
831 if (mshr->getNumTargets() == numTarget) {
832 noTargetMSHR = mshr;
833 setBlocked(Blocked_NoTargets);
834 // need to be careful with this... if this mshr isn't
835 // ready yet (i.e. time > curTick()), we don't want to
836 // move it ahead of mshrs that are ready
837 // mshrQueue.moveToFront(mshr);
838 }
839 }
840 // We should call the prefetcher reguardless if the request is
841 // satisfied or not, reguardless if the request is in the MSHR
842 // or not. The request could be a ReadReq hit, but still not
843 // satisfied (potentially because of a prior write to the same
844 // cache line. So, even when not satisfied, tehre is an MSHR
845 // already allocated for this, we need to let the prefetcher
846 // know about the request
847 if (prefetcher) {
848 // Don't notify on SWPrefetch
849 if (!pkt->cmd.isSWPrefetch())
850 next_pf_time = prefetcher->notify(pkt);
851 }
852 }
853 } else {
854 // no MSHR
855 assert(pkt->req->masterId() < system->maxMasters());
856 if (pkt->req->isUncacheable()) {
857 mshr_uncacheable[pkt->cmdToIndex()][pkt->req->masterId()]++;
858 } else {
859 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++;
860 }
861
862 if (pkt->isEviction() ||
863 (pkt->req->isUncacheable() && pkt->isWrite())) {
864 // We use forward_time here because there is an
865 // uncached memory write, forwarded to WriteBuffer.
866 allocateWriteBuffer(pkt, forward_time);
867 } else {
868 if (blk && blk->isValid()) {
869 // should have flushed and have no valid block
870 assert(!pkt->req->isUncacheable());
871
872 // If we have a write miss to a valid block, we
873 // need to mark the block non-readable. Otherwise
874 // if we allow reads while there's an outstanding
875 // write miss, the read could return stale data
876 // out of the cache block... a more aggressive
877 // system could detect the overlap (if any) and
878 // forward data out of the MSHRs, but we don't do
879 // that yet. Note that we do need to leave the
880 // block valid so that it stays in the cache, in
881 // case we get an upgrade response (and hence no
882 // new data) when the write miss completes.
883 // As long as CPUs do proper store/load forwarding
884 // internally, and have a sufficiently weak memory
885 // model, this is probably unnecessary, but at some
886 // point it must have seemed like we needed it...
887 assert(pkt->needsWritable());
888 assert(!blk->isWritable());
889 blk->status &= ~BlkReadable;
890 }
891 // Here we are using forward_time, modelling the latency of
892 // a miss (outbound) just as forwardLatency, neglecting the
893 // lookupLatency component.
894 allocateMissBuffer(pkt, forward_time);
895 }
896
897 if (prefetcher) {
898 // Don't notify on SWPrefetch
899 if (!pkt->cmd.isSWPrefetch())
900 next_pf_time = prefetcher->notify(pkt);
901 }
902 }
903 }
904
905 if (next_pf_time != MaxTick)
906 schedMemSideSendEvent(next_pf_time);
907
908 return true;
909}
910
911PacketPtr
912Cache::createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk,
913 bool needsWritable) const
914{
915 // should never see evictions here
916 assert(!cpu_pkt->isEviction());
917
918 bool blkValid = blk && blk->isValid();
919
920 if (cpu_pkt->req->isUncacheable() ||
921 (!blkValid && cpu_pkt->isUpgrade())) {
922 // uncacheable requests and upgrades from upper-level caches
923 // that missed completely just go through as is
924 return nullptr;
925 }
926
927 assert(cpu_pkt->needsResponse());
928
929 MemCmd cmd;
930 // @TODO make useUpgrades a parameter.
931 // Note that ownership protocols require upgrade, otherwise a
932 // write miss on a shared owned block will generate a ReadExcl,
933 // which will clobber the owned copy.
934 const bool useUpgrades = true;
935 if (blkValid && useUpgrades) {
936 // only reason to be here is that blk is read only and we need
937 // it to be writable
938 assert(needsWritable);
939 assert(!blk->isWritable());
940 cmd = cpu_pkt->isLLSC() ? MemCmd::SCUpgradeReq : MemCmd::UpgradeReq;
941 } else if (cpu_pkt->cmd == MemCmd::SCUpgradeFailReq ||
942 cpu_pkt->cmd == MemCmd::StoreCondFailReq) {
943 // Even though this SC will fail, we still need to send out the
944 // request and get the data to supply it to other snoopers in the case
945 // where the determination the StoreCond fails is delayed due to
946 // all caches not being on the same local bus.
947 cmd = MemCmd::SCUpgradeFailReq;
948 } else if (cpu_pkt->cmd == MemCmd::WriteLineReq ||
949 cpu_pkt->cmd == MemCmd::InvalidateReq) {
950 // forward as invalidate to all other caches, this gives us
951 // the line in Exclusive state, and invalidates all other
952 // copies
953 cmd = MemCmd::InvalidateReq;
954 } else {
955 // block is invalid
956 cmd = needsWritable ? MemCmd::ReadExReq :
957 (isReadOnly ? MemCmd::ReadCleanReq : MemCmd::ReadSharedReq);
958 }
959 PacketPtr pkt = new Packet(cpu_pkt->req, cmd, blkSize);
960
961 // if there are upstream caches that have already marked the
962 // packet as having sharers (not passing writable), pass that info
963 // downstream
964 if (cpu_pkt->hasSharers() && !needsWritable) {
965 // note that cpu_pkt may have spent a considerable time in the
966 // MSHR queue and that the information could possibly be out
967 // of date, however, there is no harm in conservatively
968 // assuming the block has sharers
969 pkt->setHasSharers();
| 810
811 assert(pkt->req->masterId() < system->maxMasters());
812 mshr_hits[pkt->cmdToIndex()][pkt->req->masterId()]++;
813 // We use forward_time here because it is the same
814 // considering new targets. We have multiple
815 // requests for the same address here. It
816 // specifies the latency to allocate an internal
817 // buffer and to schedule an event to the queued
818 // port and also takes into account the additional
819 // delay of the xbar.
820 mshr->allocateTarget(pkt, forward_time, order++,
821 allocOnFill(pkt->cmd));
822 if (mshr->getNumTargets() == numTarget) {
823 noTargetMSHR = mshr;
824 setBlocked(Blocked_NoTargets);
825 // need to be careful with this... if this mshr isn't
826 // ready yet (i.e. time > curTick()), we don't want to
827 // move it ahead of mshrs that are ready
828 // mshrQueue.moveToFront(mshr);
829 }
830 }
831 // We should call the prefetcher reguardless if the request is
832 // satisfied or not, reguardless if the request is in the MSHR
833 // or not. The request could be a ReadReq hit, but still not
834 // satisfied (potentially because of a prior write to the same
835 // cache line. So, even when not satisfied, tehre is an MSHR
836 // already allocated for this, we need to let the prefetcher
837 // know about the request
838 if (prefetcher) {
839 // Don't notify on SWPrefetch
840 if (!pkt->cmd.isSWPrefetch())
841 next_pf_time = prefetcher->notify(pkt);
842 }
843 }
844 } else {
845 // no MSHR
846 assert(pkt->req->masterId() < system->maxMasters());
847 if (pkt->req->isUncacheable()) {
848 mshr_uncacheable[pkt->cmdToIndex()][pkt->req->masterId()]++;
849 } else {
850 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++;
851 }
852
853 if (pkt->isEviction() ||
854 (pkt->req->isUncacheable() && pkt->isWrite())) {
855 // We use forward_time here because there is an
856 // uncached memory write, forwarded to WriteBuffer.
857 allocateWriteBuffer(pkt, forward_time);
858 } else {
859 if (blk && blk->isValid()) {
860 // should have flushed and have no valid block
861 assert(!pkt->req->isUncacheable());
862
863 // If we have a write miss to a valid block, we
864 // need to mark the block non-readable. Otherwise
865 // if we allow reads while there's an outstanding
866 // write miss, the read could return stale data
867 // out of the cache block... a more aggressive
868 // system could detect the overlap (if any) and
869 // forward data out of the MSHRs, but we don't do
870 // that yet. Note that we do need to leave the
871 // block valid so that it stays in the cache, in
872 // case we get an upgrade response (and hence no
873 // new data) when the write miss completes.
874 // As long as CPUs do proper store/load forwarding
875 // internally, and have a sufficiently weak memory
876 // model, this is probably unnecessary, but at some
877 // point it must have seemed like we needed it...
878 assert(pkt->needsWritable());
879 assert(!blk->isWritable());
880 blk->status &= ~BlkReadable;
881 }
882 // Here we are using forward_time, modelling the latency of
883 // a miss (outbound) just as forwardLatency, neglecting the
884 // lookupLatency component.
885 allocateMissBuffer(pkt, forward_time);
886 }
887
888 if (prefetcher) {
889 // Don't notify on SWPrefetch
890 if (!pkt->cmd.isSWPrefetch())
891 next_pf_time = prefetcher->notify(pkt);
892 }
893 }
894 }
895
896 if (next_pf_time != MaxTick)
897 schedMemSideSendEvent(next_pf_time);
898
899 return true;
900}
901
902PacketPtr
903Cache::createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk,
904 bool needsWritable) const
905{
906 // should never see evictions here
907 assert(!cpu_pkt->isEviction());
908
909 bool blkValid = blk && blk->isValid();
910
911 if (cpu_pkt->req->isUncacheable() ||
912 (!blkValid && cpu_pkt->isUpgrade())) {
913 // uncacheable requests and upgrades from upper-level caches
914 // that missed completely just go through as is
915 return nullptr;
916 }
917
918 assert(cpu_pkt->needsResponse());
919
920 MemCmd cmd;
921 // @TODO make useUpgrades a parameter.
922 // Note that ownership protocols require upgrade, otherwise a
923 // write miss on a shared owned block will generate a ReadExcl,
924 // which will clobber the owned copy.
925 const bool useUpgrades = true;
926 if (blkValid && useUpgrades) {
927 // only reason to be here is that blk is read only and we need
928 // it to be writable
929 assert(needsWritable);
930 assert(!blk->isWritable());
931 cmd = cpu_pkt->isLLSC() ? MemCmd::SCUpgradeReq : MemCmd::UpgradeReq;
932 } else if (cpu_pkt->cmd == MemCmd::SCUpgradeFailReq ||
933 cpu_pkt->cmd == MemCmd::StoreCondFailReq) {
934 // Even though this SC will fail, we still need to send out the
935 // request and get the data to supply it to other snoopers in the case
936 // where the determination the StoreCond fails is delayed due to
937 // all caches not being on the same local bus.
938 cmd = MemCmd::SCUpgradeFailReq;
939 } else if (cpu_pkt->cmd == MemCmd::WriteLineReq ||
940 cpu_pkt->cmd == MemCmd::InvalidateReq) {
941 // forward as invalidate to all other caches, this gives us
942 // the line in Exclusive state, and invalidates all other
943 // copies
944 cmd = MemCmd::InvalidateReq;
945 } else {
946 // block is invalid
947 cmd = needsWritable ? MemCmd::ReadExReq :
948 (isReadOnly ? MemCmd::ReadCleanReq : MemCmd::ReadSharedReq);
949 }
950 PacketPtr pkt = new Packet(cpu_pkt->req, cmd, blkSize);
951
952 // if there are upstream caches that have already marked the
953 // packet as having sharers (not passing writable), pass that info
954 // downstream
955 if (cpu_pkt->hasSharers() && !needsWritable) {
956 // note that cpu_pkt may have spent a considerable time in the
957 // MSHR queue and that the information could possibly be out
958 // of date, however, there is no harm in conservatively
959 // assuming the block has sharers
960 pkt->setHasSharers();
|
970 DPRINTF(Cache, "%s passing hasSharers from %s to %s addr %#llx "
971 "size %d\n",
972 __func__, cpu_pkt->cmdString(), pkt->cmdString(),
973 pkt->getAddr(), pkt->getSize());
| 961 DPRINTF(Cache, "%s: passing hasSharers from %s to %s\n",
962 __func__, cpu_pkt->print(), pkt->print());
|
974 }
975
976 // the packet should be block aligned
977 assert(pkt->getAddr() == blockAlign(pkt->getAddr()));
978
979 pkt->allocate();
| 963 }
964
965 // the packet should be block aligned
966 assert(pkt->getAddr() == blockAlign(pkt->getAddr()));
967
968 pkt->allocate();
|
980 DPRINTF(Cache, "%s created %s from %s for addr %#llx size %d\n",
981 __func__, pkt->cmdString(), cpu_pkt->cmdString(), pkt->getAddr(),
982 pkt->getSize());
| 969 DPRINTF(Cache, "%s: created %s from %s\n", __func__, pkt->print(),
970 cpu_pkt->print());
|
983 return pkt;
984}
985
986
987Tick
988Cache::recvAtomic(PacketPtr pkt)
989{
990 // We are in atomic mode so we pay just for lookupLatency here.
991 Cycles lat = lookupLatency;
992
993 // Forward the request if the system is in cache bypass mode.
994 if (system->bypassCaches())
995 return ticksToCycles(memSidePort->sendAtomic(pkt));
996
997 promoteWholeLineWrites(pkt);
998
999 // follow the same flow as in recvTimingReq, and check if a cache
1000 // above us is responding
1001 if (pkt->cacheResponding()) {
| 971 return pkt;
972}
973
974
975Tick
976Cache::recvAtomic(PacketPtr pkt)
977{
978 // We are in atomic mode so we pay just for lookupLatency here.
979 Cycles lat = lookupLatency;
980
981 // Forward the request if the system is in cache bypass mode.
982 if (system->bypassCaches())
983 return ticksToCycles(memSidePort->sendAtomic(pkt));
984
985 promoteWholeLineWrites(pkt);
986
987 // follow the same flow as in recvTimingReq, and check if a cache
988 // above us is responding
989 if (pkt->cacheResponding()) {
|
1002 DPRINTF(Cache, "Cache above responding to %#llx (%s): "
1003 "not responding\n",
1004 pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
| 990 DPRINTF(Cache, "Cache above responding to %s: not responding\n",
991 pkt->print());
|
1005
1006 // if a cache is responding, and it had the line in Owned
1007 // rather than Modified state, we need to invalidate any
1008 // copies that are not on the same path to memory
1009 assert(pkt->needsWritable() && !pkt->responderHadWritable());
1010 lat += ticksToCycles(memSidePort->sendAtomic(pkt));
1011
1012 return lat * clockPeriod();
1013 }
1014
1015 // should assert here that there are no outstanding MSHRs or
1016 // writebacks... that would mean that someone used an atomic
1017 // access in timing mode
1018
1019 CacheBlk *blk = nullptr;
1020 PacketList writebacks;
1021 bool satisfied = access(pkt, blk, lat, writebacks);
1022
1023 // handle writebacks resulting from the access here to ensure they
1024 // logically proceed anything happening below
1025 doWritebacksAtomic(writebacks);
1026
1027 if (!satisfied) {
1028 // MISS
1029
1030 // deal with the packets that go through the write path of
1031 // the cache, i.e. any evictions and uncacheable writes
1032 if (pkt->isEviction() ||
1033 (pkt->req->isUncacheable() && pkt->isWrite())) {
1034 lat += ticksToCycles(memSidePort->sendAtomic(pkt));
1035 return lat * clockPeriod();
1036 }
1037 // only misses left
1038
1039 PacketPtr bus_pkt = createMissPacket(pkt, blk, pkt->needsWritable());
1040
1041 bool is_forward = (bus_pkt == nullptr);
1042
1043 if (is_forward) {
1044 // just forwarding the same request to the next level
1045 // no local cache operation involved
1046 bus_pkt = pkt;
1047 }
1048
| 992
993 // if a cache is responding, and it had the line in Owned
994 // rather than Modified state, we need to invalidate any
995 // copies that are not on the same path to memory
996 assert(pkt->needsWritable() && !pkt->responderHadWritable());
997 lat += ticksToCycles(memSidePort->sendAtomic(pkt));
998
999 return lat * clockPeriod();
1000 }
1001
1002 // should assert here that there are no outstanding MSHRs or
1003 // writebacks... that would mean that someone used an atomic
1004 // access in timing mode
1005
1006 CacheBlk *blk = nullptr;
1007 PacketList writebacks;
1008 bool satisfied = access(pkt, blk, lat, writebacks);
1009
1010 // handle writebacks resulting from the access here to ensure they
1011 // logically proceed anything happening below
1012 doWritebacksAtomic(writebacks);
1013
1014 if (!satisfied) {
1015 // MISS
1016
1017 // deal with the packets that go through the write path of
1018 // the cache, i.e. any evictions and uncacheable writes
1019 if (pkt->isEviction() ||
1020 (pkt->req->isUncacheable() && pkt->isWrite())) {
1021 lat += ticksToCycles(memSidePort->sendAtomic(pkt));
1022 return lat * clockPeriod();
1023 }
1024 // only misses left
1025
1026 PacketPtr bus_pkt = createMissPacket(pkt, blk, pkt->needsWritable());
1027
1028 bool is_forward = (bus_pkt == nullptr);
1029
1030 if (is_forward) {
1031 // just forwarding the same request to the next level
1032 // no local cache operation involved
1033 bus_pkt = pkt;
1034 }
1035
|
1049 DPRINTF(Cache, "Sending an atomic %s for %#llx (%s)\n",
1050 bus_pkt->cmdString(), bus_pkt->getAddr(),
1051 bus_pkt->isSecure() ? "s" : "ns");
| 1036 DPRINTF(Cache, "%s: Sending an atomic %s\n", __func__,
1037 bus_pkt->print());
|
1052
1053#if TRACING_ON
1054 CacheBlk::State old_state = blk ? blk->status : 0;
1055#endif
1056
1057 lat += ticksToCycles(memSidePort->sendAtomic(bus_pkt));
1058
1059 bool is_invalidate = bus_pkt->isInvalidate();
1060
1061 // We are now dealing with the response handling
| 1038
1039#if TRACING_ON
1040 CacheBlk::State old_state = blk ? blk->status : 0;
1041#endif
1042
1043 lat += ticksToCycles(memSidePort->sendAtomic(bus_pkt));
1044
1045 bool is_invalidate = bus_pkt->isInvalidate();
1046
1047 // We are now dealing with the response handling
|
1062 DPRINTF(Cache, "Receive response: %s for addr %#llx (%s) in "
1063 "state %i\n", bus_pkt->cmdString(), bus_pkt->getAddr(),
1064 bus_pkt->isSecure() ? "s" : "ns",
1065 old_state);
| 1048 DPRINTF(Cache, "%s: Receive response: %s in state %i\n", __func__,
1049 bus_pkt->print(), old_state);
|
1066
1067 // If packet was a forward, the response (if any) is already
1068 // in place in the bus_pkt == pkt structure, so we don't need
1069 // to do anything. Otherwise, use the separate bus_pkt to
1070 // generate response to pkt and then delete it.
1071 if (!is_forward) {
1072 if (pkt->needsResponse()) {
1073 assert(bus_pkt->isResponse());
1074 if (bus_pkt->isError()) {
1075 pkt->makeAtomicResponse();
1076 pkt->copyError(bus_pkt);
1077 } else if (pkt->cmd == MemCmd::WriteLineReq) {
1078 // note the use of pkt, not bus_pkt here.
1079
1080 // write-line request to the cache that promoted
1081 // the write to a whole line
1082 blk = handleFill(pkt, blk, writebacks,
1083 allocOnFill(pkt->cmd));
1084 assert(blk != NULL);
1085 is_invalidate = false;
1086 satisfyRequest(pkt, blk);
1087 } else if (bus_pkt->isRead() ||
1088 bus_pkt->cmd == MemCmd::UpgradeResp) {
1089 // we're updating cache state to allow us to
1090 // satisfy the upstream request from the cache
1091 blk = handleFill(bus_pkt, blk, writebacks,
1092 allocOnFill(pkt->cmd));
1093 satisfyRequest(pkt, blk);
1094 maintainClusivity(pkt->fromCache(), blk);
1095 } else {
1096 // we're satisfying the upstream request without
1097 // modifying cache state, e.g., a write-through
1098 pkt->makeAtomicResponse();
1099 }
1100 }
1101 delete bus_pkt;
1102 }
1103
1104 if (is_invalidate && blk && blk->isValid()) {
1105 invalidateBlock(blk);
1106 }
1107 }
1108
1109 // Note that we don't invoke the prefetcher at all in atomic mode.
1110 // It's not clear how to do it properly, particularly for
1111 // prefetchers that aggressively generate prefetch candidates and
1112 // rely on bandwidth contention to throttle them; these will tend
1113 // to pollute the cache in atomic mode since there is no bandwidth
1114 // contention. If we ever do want to enable prefetching in atomic
1115 // mode, though, this is the place to do it... see timingAccess()
1116 // for an example (though we'd want to issue the prefetch(es)
1117 // immediately rather than calling requestMemSideBus() as we do
1118 // there).
1119
1120 // do any writebacks resulting from the response handling
1121 doWritebacksAtomic(writebacks);
1122
1123 // if we used temp block, check to see if its valid and if so
1124 // clear it out, but only do so after the call to recvAtomic is
1125 // finished so that any downstream observers (such as a snoop
1126 // filter), first see the fill, and only then see the eviction
1127 if (blk == tempBlock && tempBlock->isValid()) {
1128 // the atomic CPU calls recvAtomic for fetch and load/store
1129 // sequentuially, and we may already have a tempBlock
1130 // writeback from the fetch that we have not yet sent
1131 if (tempBlockWriteback) {
1132 // if that is the case, write the prevoius one back, and
1133 // do not schedule any new event
1134 writebackTempBlockAtomic();
1135 } else {
1136 // the writeback/clean eviction happens after the call to
1137 // recvAtomic has finished (but before any successive
1138 // calls), so that the response handling from the fill is
1139 // allowed to happen first
1140 schedule(writebackTempBlockAtomicEvent, curTick());
1141 }
1142
1143 tempBlockWriteback = (blk->isDirty() || writebackClean) ?
1144 writebackBlk(blk) : cleanEvictBlk(blk);
1145 blk->invalidate();
1146 }
1147
1148 if (pkt->needsResponse()) {
1149 pkt->makeAtomicResponse();
1150 }
1151
1152 return lat * clockPeriod();
1153}
1154
1155
1156void
1157Cache::functionalAccess(PacketPtr pkt, bool fromCpuSide)
1158{
1159 if (system->bypassCaches()) {
1160 // Packets from the memory side are snoop request and
1161 // shouldn't happen in bypass mode.
1162 assert(fromCpuSide);
1163
1164 // The cache should be flushed if we are in cache bypass mode,
1165 // so we don't need to check if we need to update anything.
1166 memSidePort->sendFunctional(pkt);
1167 return;
1168 }
1169
1170 Addr blk_addr = blockAlign(pkt->getAddr());
1171 bool is_secure = pkt->isSecure();
1172 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure);
1173 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure);
1174
1175 pkt->pushLabel(name());
1176
1177 CacheBlkPrintWrapper cbpw(blk);
1178
1179 // Note that just because an L2/L3 has valid data doesn't mean an
1180 // L1 doesn't have a more up-to-date modified copy that still
1181 // needs to be found. As a result we always update the request if
1182 // we have it, but only declare it satisfied if we are the owner.
1183
1184 // see if we have data at all (owned or otherwise)
1185 bool have_data = blk && blk->isValid()
1186 && pkt->checkFunctional(&cbpw, blk_addr, is_secure, blkSize,
1187 blk->data);
1188
1189 // data we have is dirty if marked as such or if we have an
1190 // in-service MSHR that is pending a modified line
1191 bool have_dirty =
1192 have_data && (blk->isDirty() ||
1193 (mshr && mshr->inService && mshr->isPendingModified()));
1194
1195 bool done = have_dirty
1196 || cpuSidePort->checkFunctional(pkt)
1197 || mshrQueue.checkFunctional(pkt, blk_addr)
1198 || writeBuffer.checkFunctional(pkt, blk_addr)
1199 || memSidePort->checkFunctional(pkt);
1200
| 1050
1051 // If packet was a forward, the response (if any) is already
1052 // in place in the bus_pkt == pkt structure, so we don't need
1053 // to do anything. Otherwise, use the separate bus_pkt to
1054 // generate response to pkt and then delete it.
1055 if (!is_forward) {
1056 if (pkt->needsResponse()) {
1057 assert(bus_pkt->isResponse());
1058 if (bus_pkt->isError()) {
1059 pkt->makeAtomicResponse();
1060 pkt->copyError(bus_pkt);
1061 } else if (pkt->cmd == MemCmd::WriteLineReq) {
1062 // note the use of pkt, not bus_pkt here.
1063
1064 // write-line request to the cache that promoted
1065 // the write to a whole line
1066 blk = handleFill(pkt, blk, writebacks,
1067 allocOnFill(pkt->cmd));
1068 assert(blk != NULL);
1069 is_invalidate = false;
1070 satisfyRequest(pkt, blk);
1071 } else if (bus_pkt->isRead() ||
1072 bus_pkt->cmd == MemCmd::UpgradeResp) {
1073 // we're updating cache state to allow us to
1074 // satisfy the upstream request from the cache
1075 blk = handleFill(bus_pkt, blk, writebacks,
1076 allocOnFill(pkt->cmd));
1077 satisfyRequest(pkt, blk);
1078 maintainClusivity(pkt->fromCache(), blk);
1079 } else {
1080 // we're satisfying the upstream request without
1081 // modifying cache state, e.g., a write-through
1082 pkt->makeAtomicResponse();
1083 }
1084 }
1085 delete bus_pkt;
1086 }
1087
1088 if (is_invalidate && blk && blk->isValid()) {
1089 invalidateBlock(blk);
1090 }
1091 }
1092
1093 // Note that we don't invoke the prefetcher at all in atomic mode.
1094 // It's not clear how to do it properly, particularly for
1095 // prefetchers that aggressively generate prefetch candidates and
1096 // rely on bandwidth contention to throttle them; these will tend
1097 // to pollute the cache in atomic mode since there is no bandwidth
1098 // contention. If we ever do want to enable prefetching in atomic
1099 // mode, though, this is the place to do it... see timingAccess()
1100 // for an example (though we'd want to issue the prefetch(es)
1101 // immediately rather than calling requestMemSideBus() as we do
1102 // there).
1103
1104 // do any writebacks resulting from the response handling
1105 doWritebacksAtomic(writebacks);
1106
1107 // if we used temp block, check to see if its valid and if so
1108 // clear it out, but only do so after the call to recvAtomic is
1109 // finished so that any downstream observers (such as a snoop
1110 // filter), first see the fill, and only then see the eviction
1111 if (blk == tempBlock && tempBlock->isValid()) {
1112 // the atomic CPU calls recvAtomic for fetch and load/store
1113 // sequentuially, and we may already have a tempBlock
1114 // writeback from the fetch that we have not yet sent
1115 if (tempBlockWriteback) {
1116 // if that is the case, write the prevoius one back, and
1117 // do not schedule any new event
1118 writebackTempBlockAtomic();
1119 } else {
1120 // the writeback/clean eviction happens after the call to
1121 // recvAtomic has finished (but before any successive
1122 // calls), so that the response handling from the fill is
1123 // allowed to happen first
1124 schedule(writebackTempBlockAtomicEvent, curTick());
1125 }
1126
1127 tempBlockWriteback = (blk->isDirty() || writebackClean) ?
1128 writebackBlk(blk) : cleanEvictBlk(blk);
1129 blk->invalidate();
1130 }
1131
1132 if (pkt->needsResponse()) {
1133 pkt->makeAtomicResponse();
1134 }
1135
1136 return lat * clockPeriod();
1137}
1138
1139
1140void
1141Cache::functionalAccess(PacketPtr pkt, bool fromCpuSide)
1142{
1143 if (system->bypassCaches()) {
1144 // Packets from the memory side are snoop request and
1145 // shouldn't happen in bypass mode.
1146 assert(fromCpuSide);
1147
1148 // The cache should be flushed if we are in cache bypass mode,
1149 // so we don't need to check if we need to update anything.
1150 memSidePort->sendFunctional(pkt);
1151 return;
1152 }
1153
1154 Addr blk_addr = blockAlign(pkt->getAddr());
1155 bool is_secure = pkt->isSecure();
1156 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure);
1157 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure);
1158
1159 pkt->pushLabel(name());
1160
1161 CacheBlkPrintWrapper cbpw(blk);
1162
1163 // Note that just because an L2/L3 has valid data doesn't mean an
1164 // L1 doesn't have a more up-to-date modified copy that still
1165 // needs to be found. As a result we always update the request if
1166 // we have it, but only declare it satisfied if we are the owner.
1167
1168 // see if we have data at all (owned or otherwise)
1169 bool have_data = blk && blk->isValid()
1170 && pkt->checkFunctional(&cbpw, blk_addr, is_secure, blkSize,
1171 blk->data);
1172
1173 // data we have is dirty if marked as such or if we have an
1174 // in-service MSHR that is pending a modified line
1175 bool have_dirty =
1176 have_data && (blk->isDirty() ||
1177 (mshr && mshr->inService && mshr->isPendingModified()));
1178
1179 bool done = have_dirty
1180 || cpuSidePort->checkFunctional(pkt)
1181 || mshrQueue.checkFunctional(pkt, blk_addr)
1182 || writeBuffer.checkFunctional(pkt, blk_addr)
1183 || memSidePort->checkFunctional(pkt);
1184
|
1201 DPRINTF(CacheVerbose, "functional %s %#llx (%s) %s%s%s\n",
1202 pkt->cmdString(), pkt->getAddr(), is_secure ? "s" : "ns",
| 1185 DPRINTF(CacheVerbose, "%s: %s %s%s%s\n", __func__, pkt->print(),
|
1203 (blk && blk->isValid()) ? "valid " : "",
1204 have_data ? "data " : "", done ? "done " : "");
1205
1206 // We're leaving the cache, so pop cache->name() label
1207 pkt->popLabel();
1208
1209 if (done) {
1210 pkt->makeResponse();
1211 } else {
1212 // if it came as a request from the CPU side then make sure it
1213 // continues towards the memory side
1214 if (fromCpuSide) {
1215 memSidePort->sendFunctional(pkt);
1216 } else if (cpuSidePort->isSnooping()) {
1217 // if it came from the memory side, it must be a snoop request
1218 // and we should only forward it if we are forwarding snoops
1219 cpuSidePort->sendFunctionalSnoop(pkt);
1220 }
1221 }
1222}
1223
1224
1225/////////////////////////////////////////////////////
1226//
1227// Response handling: responses from the memory side
1228//
1229/////////////////////////////////////////////////////
1230
1231
1232void
1233Cache::handleUncacheableWriteResp(PacketPtr pkt)
1234{
1235 Tick completion_time = clockEdge(responseLatency) +
1236 pkt->headerDelay + pkt->payloadDelay;
1237
1238 // Reset the bus additional time as it is now accounted for
1239 pkt->headerDelay = pkt->payloadDelay = 0;
1240
1241 cpuSidePort->schedTimingResp(pkt, completion_time, true);
1242}
1243
1244void
1245Cache::recvTimingResp(PacketPtr pkt)
1246{
1247 assert(pkt->isResponse());
1248
1249 // all header delay should be paid for by the crossbar, unless
1250 // this is a prefetch response from above
1251 panic_if(pkt->headerDelay != 0 && pkt->cmd != MemCmd::HardPFResp,
1252 "%s saw a non-zero packet delay\n", name());
1253
1254 bool is_error = pkt->isError();
1255
1256 if (is_error) {
| 1186 (blk && blk->isValid()) ? "valid " : "",
1187 have_data ? "data " : "", done ? "done " : "");
1188
1189 // We're leaving the cache, so pop cache->name() label
1190 pkt->popLabel();
1191
1192 if (done) {
1193 pkt->makeResponse();
1194 } else {
1195 // if it came as a request from the CPU side then make sure it
1196 // continues towards the memory side
1197 if (fromCpuSide) {
1198 memSidePort->sendFunctional(pkt);
1199 } else if (cpuSidePort->isSnooping()) {
1200 // if it came from the memory side, it must be a snoop request
1201 // and we should only forward it if we are forwarding snoops
1202 cpuSidePort->sendFunctionalSnoop(pkt);
1203 }
1204 }
1205}
1206
1207
1208/////////////////////////////////////////////////////
1209//
1210// Response handling: responses from the memory side
1211//
1212/////////////////////////////////////////////////////
1213
1214
1215void
1216Cache::handleUncacheableWriteResp(PacketPtr pkt)
1217{
1218 Tick completion_time = clockEdge(responseLatency) +
1219 pkt->headerDelay + pkt->payloadDelay;
1220
1221 // Reset the bus additional time as it is now accounted for
1222 pkt->headerDelay = pkt->payloadDelay = 0;
1223
1224 cpuSidePort->schedTimingResp(pkt, completion_time, true);
1225}
1226
1227void
1228Cache::recvTimingResp(PacketPtr pkt)
1229{
1230 assert(pkt->isResponse());
1231
1232 // all header delay should be paid for by the crossbar, unless
1233 // this is a prefetch response from above
1234 panic_if(pkt->headerDelay != 0 && pkt->cmd != MemCmd::HardPFResp,
1235 "%s saw a non-zero packet delay\n", name());
1236
1237 bool is_error = pkt->isError();
1238
1239 if (is_error) {
|
1257 DPRINTF(Cache, "Cache received packet with error for addr %#llx (%s), "
1258 "cmd: %s\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns",
1259 pkt->cmdString());
| 1240 DPRINTF(Cache, "%s: Cache received %s with error\n", __func__,
1241 pkt->print());
|
1260 }
1261
| 1242 }
1243
|
1262 DPRINTF(Cache, "Handling response %s for addr %#llx size %d (%s)\n",
1263 pkt->cmdString(), pkt->getAddr(), pkt->getSize(),
1264 pkt->isSecure() ? "s" : "ns");
| 1244 DPRINTF(Cache, "%s: Handling response %s\n", __func__,
1245 pkt->print());
|
1265
1266 // if this is a write, we should be looking at an uncacheable
1267 // write
1268 if (pkt->isWrite()) {
1269 assert(pkt->req->isUncacheable());
1270 handleUncacheableWriteResp(pkt);
1271 return;
1272 }
1273
1274 // we have dealt with any (uncacheable) writes above, from here on
1275 // we know we are dealing with an MSHR due to a miss or a prefetch
1276 MSHR *mshr = dynamic_cast<MSHR*>(pkt->popSenderState());
1277 assert(mshr);
1278
1279 if (mshr == noTargetMSHR) {
1280 // we always clear at least one target
1281 clearBlocked(Blocked_NoTargets);
1282 noTargetMSHR = nullptr;
1283 }
1284
1285 // Initial target is used just for stats
1286 MSHR::Target *initial_tgt = mshr->getTarget();
1287 int stats_cmd_idx = initial_tgt->pkt->cmdToIndex();
1288 Tick miss_latency = curTick() - initial_tgt->recvTime;
1289
1290 if (pkt->req->isUncacheable()) {
1291 assert(pkt->req->masterId() < system->maxMasters());
1292 mshr_uncacheable_lat[stats_cmd_idx][pkt->req->masterId()] +=
1293 miss_latency;
1294 } else {
1295 assert(pkt->req->masterId() < system->maxMasters());
1296 mshr_miss_latency[stats_cmd_idx][pkt->req->masterId()] +=
1297 miss_latency;
1298 }
1299
1300 bool wasFull = mshrQueue.isFull();
1301
1302 PacketList writebacks;
1303
1304 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
1305
1306 // upgrade deferred targets if the response has no sharers, and is
1307 // thus passing writable
1308 if (!pkt->hasSharers()) {
1309 mshr->promoteWritable();
1310 }
1311
1312 bool is_fill = !mshr->isForward &&
1313 (pkt->isRead() || pkt->cmd == MemCmd::UpgradeResp);
1314
1315 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
1316
1317 if (is_fill && !is_error) {
1318 DPRINTF(Cache, "Block for addr %#llx being updated in Cache\n",
1319 pkt->getAddr());
1320
1321 blk = handleFill(pkt, blk, writebacks, mshr->allocOnFill());
1322 assert(blk != nullptr);
1323 }
1324
1325 // allow invalidation responses originating from write-line
1326 // requests to be discarded
1327 bool is_invalidate = pkt->isInvalidate();
1328
1329 // First offset for critical word first calculations
1330 int initial_offset = initial_tgt->pkt->getOffset(blkSize);
1331
1332 bool from_cache = false;
1333 MSHR::TargetList targets = mshr->extractServiceableTargets(pkt);
1334 for (auto &target: targets) {
1335 Packet *tgt_pkt = target.pkt;
1336 switch (target.source) {
1337 case MSHR::Target::FromCPU:
1338 Tick completion_time;
1339 // Here we charge on completion_time the delay of the xbar if the
1340 // packet comes from it, charged on headerDelay.
1341 completion_time = pkt->headerDelay;
1342
1343 // Software prefetch handling for cache closest to core
1344 if (tgt_pkt->cmd.isSWPrefetch()) {
1345 // a software prefetch would have already been ack'd
1346 // immediately with dummy data so the core would be able to
1347 // retire it. This request completes right here, so we
1348 // deallocate it.
1349 delete tgt_pkt->req;
1350 delete tgt_pkt;
1351 break; // skip response
1352 }
1353
1354 // keep track of whether we have responded to another
1355 // cache
1356 from_cache = from_cache || tgt_pkt->fromCache();
1357
1358 // unlike the other packet flows, where data is found in other
1359 // caches or memory and brought back, write-line requests always
1360 // have the data right away, so the above check for "is fill?"
1361 // cannot actually be determined until examining the stored MSHR
1362 // state. We "catch up" with that logic here, which is duplicated
1363 // from above.
1364 if (tgt_pkt->cmd == MemCmd::WriteLineReq) {
1365 assert(!is_error);
1366 // we got the block in a writable state, so promote
1367 // any deferred targets if possible
1368 mshr->promoteWritable();
1369 // NB: we use the original packet here and not the response!
1370 blk = handleFill(tgt_pkt, blk, writebacks,
1371 targets.allocOnFill);
1372 assert(blk != nullptr);
1373
1374 // treat as a fill, and discard the invalidation
1375 // response
1376 is_fill = true;
1377 is_invalidate = false;
1378 }
1379
1380 if (is_fill) {
1381 satisfyRequest(tgt_pkt, blk, true, mshr->hasPostDowngrade());
1382
1383 // How many bytes past the first request is this one
1384 int transfer_offset =
1385 tgt_pkt->getOffset(blkSize) - initial_offset;
1386 if (transfer_offset < 0) {
1387 transfer_offset += blkSize;
1388 }
1389
1390 // If not critical word (offset) return payloadDelay.
1391 // responseLatency is the latency of the return path
1392 // from lower level caches/memory to an upper level cache or
1393 // the core.
1394 completion_time += clockEdge(responseLatency) +
1395 (transfer_offset ? pkt->payloadDelay : 0);
1396
1397 assert(!tgt_pkt->req->isUncacheable());
1398
1399 assert(tgt_pkt->req->masterId() < system->maxMasters());
1400 missLatency[tgt_pkt->cmdToIndex()][tgt_pkt->req->masterId()] +=
1401 completion_time - target.recvTime;
1402 } else if (pkt->cmd == MemCmd::UpgradeFailResp) {
1403 // failed StoreCond upgrade
1404 assert(tgt_pkt->cmd == MemCmd::StoreCondReq ||
1405 tgt_pkt->cmd == MemCmd::StoreCondFailReq ||
1406 tgt_pkt->cmd == MemCmd::SCUpgradeFailReq);
1407 // responseLatency is the latency of the return path
1408 // from lower level caches/memory to an upper level cache or
1409 // the core.
1410 completion_time += clockEdge(responseLatency) +
1411 pkt->payloadDelay;
1412 tgt_pkt->req->setExtraData(0);
1413 } else {
1414 // not a cache fill, just forwarding response
1415 // responseLatency is the latency of the return path
1416 // from lower level cahces/memory to the core.
1417 completion_time += clockEdge(responseLatency) +
1418 pkt->payloadDelay;
1419 if (pkt->isRead() && !is_error) {
1420 // sanity check
1421 assert(pkt->getAddr() == tgt_pkt->getAddr());
1422 assert(pkt->getSize() >= tgt_pkt->getSize());
1423
1424 tgt_pkt->setData(pkt->getConstPtr<uint8_t>());
1425 }
1426 }
1427 tgt_pkt->makeTimingResponse();
1428 // if this packet is an error copy that to the new packet
1429 if (is_error)
1430 tgt_pkt->copyError(pkt);
1431 if (tgt_pkt->cmd == MemCmd::ReadResp &&
1432 (is_invalidate || mshr->hasPostInvalidate())) {
1433 // If intermediate cache got ReadRespWithInvalidate,
1434 // propagate that. Response should not have
1435 // isInvalidate() set otherwise.
1436 tgt_pkt->cmd = MemCmd::ReadRespWithInvalidate;
| 1246
1247 // if this is a write, we should be looking at an uncacheable
1248 // write
1249 if (pkt->isWrite()) {
1250 assert(pkt->req->isUncacheable());
1251 handleUncacheableWriteResp(pkt);
1252 return;
1253 }
1254
1255 // we have dealt with any (uncacheable) writes above, from here on
1256 // we know we are dealing with an MSHR due to a miss or a prefetch
1257 MSHR *mshr = dynamic_cast<MSHR*>(pkt->popSenderState());
1258 assert(mshr);
1259
1260 if (mshr == noTargetMSHR) {
1261 // we always clear at least one target
1262 clearBlocked(Blocked_NoTargets);
1263 noTargetMSHR = nullptr;
1264 }
1265
1266 // Initial target is used just for stats
1267 MSHR::Target *initial_tgt = mshr->getTarget();
1268 int stats_cmd_idx = initial_tgt->pkt->cmdToIndex();
1269 Tick miss_latency = curTick() - initial_tgt->recvTime;
1270
1271 if (pkt->req->isUncacheable()) {
1272 assert(pkt->req->masterId() < system->maxMasters());
1273 mshr_uncacheable_lat[stats_cmd_idx][pkt->req->masterId()] +=
1274 miss_latency;
1275 } else {
1276 assert(pkt->req->masterId() < system->maxMasters());
1277 mshr_miss_latency[stats_cmd_idx][pkt->req->masterId()] +=
1278 miss_latency;
1279 }
1280
1281 bool wasFull = mshrQueue.isFull();
1282
1283 PacketList writebacks;
1284
1285 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
1286
1287 // upgrade deferred targets if the response has no sharers, and is
1288 // thus passing writable
1289 if (!pkt->hasSharers()) {
1290 mshr->promoteWritable();
1291 }
1292
1293 bool is_fill = !mshr->isForward &&
1294 (pkt->isRead() || pkt->cmd == MemCmd::UpgradeResp);
1295
1296 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
1297
1298 if (is_fill && !is_error) {
1299 DPRINTF(Cache, "Block for addr %#llx being updated in Cache\n",
1300 pkt->getAddr());
1301
1302 blk = handleFill(pkt, blk, writebacks, mshr->allocOnFill());
1303 assert(blk != nullptr);
1304 }
1305
1306 // allow invalidation responses originating from write-line
1307 // requests to be discarded
1308 bool is_invalidate = pkt->isInvalidate();
1309
1310 // First offset for critical word first calculations
1311 int initial_offset = initial_tgt->pkt->getOffset(blkSize);
1312
1313 bool from_cache = false;
1314 MSHR::TargetList targets = mshr->extractServiceableTargets(pkt);
1315 for (auto &target: targets) {
1316 Packet *tgt_pkt = target.pkt;
1317 switch (target.source) {
1318 case MSHR::Target::FromCPU:
1319 Tick completion_time;
1320 // Here we charge on completion_time the delay of the xbar if the
1321 // packet comes from it, charged on headerDelay.
1322 completion_time = pkt->headerDelay;
1323
1324 // Software prefetch handling for cache closest to core
1325 if (tgt_pkt->cmd.isSWPrefetch()) {
1326 // a software prefetch would have already been ack'd
1327 // immediately with dummy data so the core would be able to
1328 // retire it. This request completes right here, so we
1329 // deallocate it.
1330 delete tgt_pkt->req;
1331 delete tgt_pkt;
1332 break; // skip response
1333 }
1334
1335 // keep track of whether we have responded to another
1336 // cache
1337 from_cache = from_cache || tgt_pkt->fromCache();
1338
1339 // unlike the other packet flows, where data is found in other
1340 // caches or memory and brought back, write-line requests always
1341 // have the data right away, so the above check for "is fill?"
1342 // cannot actually be determined until examining the stored MSHR
1343 // state. We "catch up" with that logic here, which is duplicated
1344 // from above.
1345 if (tgt_pkt->cmd == MemCmd::WriteLineReq) {
1346 assert(!is_error);
1347 // we got the block in a writable state, so promote
1348 // any deferred targets if possible
1349 mshr->promoteWritable();
1350 // NB: we use the original packet here and not the response!
1351 blk = handleFill(tgt_pkt, blk, writebacks,
1352 targets.allocOnFill);
1353 assert(blk != nullptr);
1354
1355 // treat as a fill, and discard the invalidation
1356 // response
1357 is_fill = true;
1358 is_invalidate = false;
1359 }
1360
1361 if (is_fill) {
1362 satisfyRequest(tgt_pkt, blk, true, mshr->hasPostDowngrade());
1363
1364 // How many bytes past the first request is this one
1365 int transfer_offset =
1366 tgt_pkt->getOffset(blkSize) - initial_offset;
1367 if (transfer_offset < 0) {
1368 transfer_offset += blkSize;
1369 }
1370
1371 // If not critical word (offset) return payloadDelay.
1372 // responseLatency is the latency of the return path
1373 // from lower level caches/memory to an upper level cache or
1374 // the core.
1375 completion_time += clockEdge(responseLatency) +
1376 (transfer_offset ? pkt->payloadDelay : 0);
1377
1378 assert(!tgt_pkt->req->isUncacheable());
1379
1380 assert(tgt_pkt->req->masterId() < system->maxMasters());
1381 missLatency[tgt_pkt->cmdToIndex()][tgt_pkt->req->masterId()] +=
1382 completion_time - target.recvTime;
1383 } else if (pkt->cmd == MemCmd::UpgradeFailResp) {
1384 // failed StoreCond upgrade
1385 assert(tgt_pkt->cmd == MemCmd::StoreCondReq ||
1386 tgt_pkt->cmd == MemCmd::StoreCondFailReq ||
1387 tgt_pkt->cmd == MemCmd::SCUpgradeFailReq);
1388 // responseLatency is the latency of the return path
1389 // from lower level caches/memory to an upper level cache or
1390 // the core.
1391 completion_time += clockEdge(responseLatency) +
1392 pkt->payloadDelay;
1393 tgt_pkt->req->setExtraData(0);
1394 } else {
1395 // not a cache fill, just forwarding response
1396 // responseLatency is the latency of the return path
1397 // from lower level cahces/memory to the core.
1398 completion_time += clockEdge(responseLatency) +
1399 pkt->payloadDelay;
1400 if (pkt->isRead() && !is_error) {
1401 // sanity check
1402 assert(pkt->getAddr() == tgt_pkt->getAddr());
1403 assert(pkt->getSize() >= tgt_pkt->getSize());
1404
1405 tgt_pkt->setData(pkt->getConstPtr<uint8_t>());
1406 }
1407 }
1408 tgt_pkt->makeTimingResponse();
1409 // if this packet is an error copy that to the new packet
1410 if (is_error)
1411 tgt_pkt->copyError(pkt);
1412 if (tgt_pkt->cmd == MemCmd::ReadResp &&
1413 (is_invalidate || mshr->hasPostInvalidate())) {
1414 // If intermediate cache got ReadRespWithInvalidate,
1415 // propagate that. Response should not have
1416 // isInvalidate() set otherwise.
1417 tgt_pkt->cmd = MemCmd::ReadRespWithInvalidate;
|
1437 DPRINTF(Cache, "%s updated cmd to %s for addr %#llx\n",
1438 __func__, tgt_pkt->cmdString(), tgt_pkt->getAddr());
| 1418 DPRINTF(Cache, "%s: updated cmd to %s\n", __func__,
1419 tgt_pkt->print());
|
1439 }
1440 // Reset the bus additional time as it is now accounted for
1441 tgt_pkt->headerDelay = tgt_pkt->payloadDelay = 0;
1442 cpuSidePort->schedTimingResp(tgt_pkt, completion_time, true);
1443 break;
1444
1445 case MSHR::Target::FromPrefetcher:
1446 assert(tgt_pkt->cmd == MemCmd::HardPFReq);
1447 if (blk)
1448 blk->status |= BlkHWPrefetched;
1449 delete tgt_pkt->req;
1450 delete tgt_pkt;
1451 break;
1452
1453 case MSHR::Target::FromSnoop:
1454 // I don't believe that a snoop can be in an error state
1455 assert(!is_error);
1456 // response to snoop request
1457 DPRINTF(Cache, "processing deferred snoop...\n");
1458 assert(!(is_invalidate && !mshr->hasPostInvalidate()));
1459 handleSnoop(tgt_pkt, blk, true, true, mshr->hasPostInvalidate());
1460 break;
1461
1462 default:
1463 panic("Illegal target->source enum %d\n", target.source);
1464 }
1465 }
1466
1467 maintainClusivity(from_cache, blk);
1468
1469 if (blk && blk->isValid()) {
1470 // an invalidate response stemming from a write line request
1471 // should not invalidate the block, so check if the
1472 // invalidation should be discarded
1473 if (is_invalidate || mshr->hasPostInvalidate()) {
1474 invalidateBlock(blk);
1475 } else if (mshr->hasPostDowngrade()) {
1476 blk->status &= ~BlkWritable;
1477 }
1478 }
1479
1480 if (mshr->promoteDeferredTargets()) {
1481 // avoid later read getting stale data while write miss is
1482 // outstanding.. see comment in timingAccess()
1483 if (blk) {
1484 blk->status &= ~BlkReadable;
1485 }
1486 mshrQueue.markPending(mshr);
1487 schedMemSideSendEvent(clockEdge() + pkt->payloadDelay);
1488 } else {
1489 mshrQueue.deallocate(mshr);
1490 if (wasFull && !mshrQueue.isFull()) {
1491 clearBlocked(Blocked_NoMSHRs);
1492 }
1493
1494 // Request the bus for a prefetch if this deallocation freed enough
1495 // MSHRs for a prefetch to take place
1496 if (prefetcher && mshrQueue.canPrefetch()) {
1497 Tick next_pf_time = std::max(prefetcher->nextPrefetchReadyTime(),
1498 clockEdge());
1499 if (next_pf_time != MaxTick)
1500 schedMemSideSendEvent(next_pf_time);
1501 }
1502 }
1503 // reset the xbar additional timinig as it is now accounted for
1504 pkt->headerDelay = pkt->payloadDelay = 0;
1505
1506 // copy writebacks to write buffer
1507 doWritebacks(writebacks, forward_time);
1508
1509 // if we used temp block, check to see if its valid and then clear it out
1510 if (blk == tempBlock && tempBlock->isValid()) {
1511 // We use forwardLatency here because we are copying
1512 // Writebacks/CleanEvicts to write buffer. It specifies the latency to
1513 // allocate an internal buffer and to schedule an event to the
1514 // queued port.
1515 if (blk->isDirty() || writebackClean) {
1516 PacketPtr wbPkt = writebackBlk(blk);
1517 allocateWriteBuffer(wbPkt, forward_time);
1518 // Set BLOCK_CACHED flag if cached above.
1519 if (isCachedAbove(wbPkt))
1520 wbPkt->setBlockCached();
1521 } else {
1522 PacketPtr wcPkt = cleanEvictBlk(blk);
1523 // Check to see if block is cached above. If not allocate
1524 // write buffer
1525 if (isCachedAbove(wcPkt))
1526 delete wcPkt;
1527 else
1528 allocateWriteBuffer(wcPkt, forward_time);
1529 }
1530 blk->invalidate();
1531 }
1532
| 1420 }
1421 // Reset the bus additional time as it is now accounted for
1422 tgt_pkt->headerDelay = tgt_pkt->payloadDelay = 0;
1423 cpuSidePort->schedTimingResp(tgt_pkt, completion_time, true);
1424 break;
1425
1426 case MSHR::Target::FromPrefetcher:
1427 assert(tgt_pkt->cmd == MemCmd::HardPFReq);
1428 if (blk)
1429 blk->status |= BlkHWPrefetched;
1430 delete tgt_pkt->req;
1431 delete tgt_pkt;
1432 break;
1433
1434 case MSHR::Target::FromSnoop:
1435 // I don't believe that a snoop can be in an error state
1436 assert(!is_error);
1437 // response to snoop request
1438 DPRINTF(Cache, "processing deferred snoop...\n");
1439 assert(!(is_invalidate && !mshr->hasPostInvalidate()));
1440 handleSnoop(tgt_pkt, blk, true, true, mshr->hasPostInvalidate());
1441 break;
1442
1443 default:
1444 panic("Illegal target->source enum %d\n", target.source);
1445 }
1446 }
1447
1448 maintainClusivity(from_cache, blk);
1449
1450 if (blk && blk->isValid()) {
1451 // an invalidate response stemming from a write line request
1452 // should not invalidate the block, so check if the
1453 // invalidation should be discarded
1454 if (is_invalidate || mshr->hasPostInvalidate()) {
1455 invalidateBlock(blk);
1456 } else if (mshr->hasPostDowngrade()) {
1457 blk->status &= ~BlkWritable;
1458 }
1459 }
1460
1461 if (mshr->promoteDeferredTargets()) {
1462 // avoid later read getting stale data while write miss is
1463 // outstanding.. see comment in timingAccess()
1464 if (blk) {
1465 blk->status &= ~BlkReadable;
1466 }
1467 mshrQueue.markPending(mshr);
1468 schedMemSideSendEvent(clockEdge() + pkt->payloadDelay);
1469 } else {
1470 mshrQueue.deallocate(mshr);
1471 if (wasFull && !mshrQueue.isFull()) {
1472 clearBlocked(Blocked_NoMSHRs);
1473 }
1474
1475 // Request the bus for a prefetch if this deallocation freed enough
1476 // MSHRs for a prefetch to take place
1477 if (prefetcher && mshrQueue.canPrefetch()) {
1478 Tick next_pf_time = std::max(prefetcher->nextPrefetchReadyTime(),
1479 clockEdge());
1480 if (next_pf_time != MaxTick)
1481 schedMemSideSendEvent(next_pf_time);
1482 }
1483 }
1484 // reset the xbar additional timinig as it is now accounted for
1485 pkt->headerDelay = pkt->payloadDelay = 0;
1486
1487 // copy writebacks to write buffer
1488 doWritebacks(writebacks, forward_time);
1489
1490 // if we used temp block, check to see if its valid and then clear it out
1491 if (blk == tempBlock && tempBlock->isValid()) {
1492 // We use forwardLatency here because we are copying
1493 // Writebacks/CleanEvicts to write buffer. It specifies the latency to
1494 // allocate an internal buffer and to schedule an event to the
1495 // queued port.
1496 if (blk->isDirty() || writebackClean) {
1497 PacketPtr wbPkt = writebackBlk(blk);
1498 allocateWriteBuffer(wbPkt, forward_time);
1499 // Set BLOCK_CACHED flag if cached above.
1500 if (isCachedAbove(wbPkt))
1501 wbPkt->setBlockCached();
1502 } else {
1503 PacketPtr wcPkt = cleanEvictBlk(blk);
1504 // Check to see if block is cached above. If not allocate
1505 // write buffer
1506 if (isCachedAbove(wcPkt))
1507 delete wcPkt;
1508 else
1509 allocateWriteBuffer(wcPkt, forward_time);
1510 }
1511 blk->invalidate();
1512 }
1513
|
1533 DPRINTF(CacheVerbose, "Leaving %s with %s for addr %#llx\n", __func__,
1534 pkt->cmdString(), pkt->getAddr());
| 1514 DPRINTF(CacheVerbose, "%s: Leaving with %s\n", __func__, pkt->print());
|
1535 delete pkt;
1536}
1537
1538PacketPtr
1539Cache::writebackBlk(CacheBlk *blk)
1540{
1541 chatty_assert(!isReadOnly || writebackClean,
1542 "Writeback from read-only cache");
1543 assert(blk && blk->isValid() && (blk->isDirty() || writebackClean));
1544
1545 writebacks[Request::wbMasterId]++;
1546
1547 Request *req = new Request(tags->regenerateBlkAddr(blk->tag, blk->set),
1548 blkSize, 0, Request::wbMasterId);
1549 if (blk->isSecure())
1550 req->setFlags(Request::SECURE);
1551
1552 req->taskId(blk->task_id);
1553 blk->task_id= ContextSwitchTaskId::Unknown;
1554 blk->tickInserted = curTick();
1555
1556 PacketPtr pkt =
1557 new Packet(req, blk->isDirty() ?
1558 MemCmd::WritebackDirty : MemCmd::WritebackClean);
1559
| 1515 delete pkt;
1516}
1517
1518PacketPtr
1519Cache::writebackBlk(CacheBlk *blk)
1520{
1521 chatty_assert(!isReadOnly || writebackClean,
1522 "Writeback from read-only cache");
1523 assert(blk && blk->isValid() && (blk->isDirty() || writebackClean));
1524
1525 writebacks[Request::wbMasterId]++;
1526
1527 Request *req = new Request(tags->regenerateBlkAddr(blk->tag, blk->set),
1528 blkSize, 0, Request::wbMasterId);
1529 if (blk->isSecure())
1530 req->setFlags(Request::SECURE);
1531
1532 req->taskId(blk->task_id);
1533 blk->task_id= ContextSwitchTaskId::Unknown;
1534 blk->tickInserted = curTick();
1535
1536 PacketPtr pkt =
1537 new Packet(req, blk->isDirty() ?
1538 MemCmd::WritebackDirty : MemCmd::WritebackClean);
1539
|
1560 DPRINTF(Cache, "Create Writeback %#llx writable: %d, dirty: %d\n",
1561 pkt->getAddr(), blk->isWritable(), blk->isDirty());
| 1540 DPRINTF(Cache, "Create Writeback %s writable: %d, dirty: %d\n",
1541 pkt->print(), blk->isWritable(), blk->isDirty());
|
1562
1563 if (blk->isWritable()) {
1564 // not asserting shared means we pass the block in modified
1565 // state, mark our own block non-writeable
1566 blk->status &= ~BlkWritable;
1567 } else {
1568 // we are in the Owned state, tell the receiver
1569 pkt->setHasSharers();
1570 }
1571
1572 // make sure the block is not marked dirty
1573 blk->status &= ~BlkDirty;
1574
1575 pkt->allocate();
1576 std::memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize);
1577
1578 return pkt;
1579}
1580
1581PacketPtr
1582Cache::cleanEvictBlk(CacheBlk *blk)
1583{
1584 assert(!writebackClean);
1585 assert(blk && blk->isValid() && !blk->isDirty());
1586 // Creating a zero sized write, a message to the snoop filter
1587 Request *req =
1588 new Request(tags->regenerateBlkAddr(blk->tag, blk->set), blkSize, 0,
1589 Request::wbMasterId);
1590 if (blk->isSecure())
1591 req->setFlags(Request::SECURE);
1592
1593 req->taskId(blk->task_id);
1594 blk->task_id = ContextSwitchTaskId::Unknown;
1595 blk->tickInserted = curTick();
1596
1597 PacketPtr pkt = new Packet(req, MemCmd::CleanEvict);
1598 pkt->allocate();
| 1542
1543 if (blk->isWritable()) {
1544 // not asserting shared means we pass the block in modified
1545 // state, mark our own block non-writeable
1546 blk->status &= ~BlkWritable;
1547 } else {
1548 // we are in the Owned state, tell the receiver
1549 pkt->setHasSharers();
1550 }
1551
1552 // make sure the block is not marked dirty
1553 blk->status &= ~BlkDirty;
1554
1555 pkt->allocate();
1556 std::memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize);
1557
1558 return pkt;
1559}
1560
1561PacketPtr
1562Cache::cleanEvictBlk(CacheBlk *blk)
1563{
1564 assert(!writebackClean);
1565 assert(blk && blk->isValid() && !blk->isDirty());
1566 // Creating a zero sized write, a message to the snoop filter
1567 Request *req =
1568 new Request(tags->regenerateBlkAddr(blk->tag, blk->set), blkSize, 0,
1569 Request::wbMasterId);
1570 if (blk->isSecure())
1571 req->setFlags(Request::SECURE);
1572
1573 req->taskId(blk->task_id);
1574 blk->task_id = ContextSwitchTaskId::Unknown;
1575 blk->tickInserted = curTick();
1576
1577 PacketPtr pkt = new Packet(req, MemCmd::CleanEvict);
1578 pkt->allocate();
|
1599 DPRINTF(Cache, "%s%s %x Create CleanEvict\n", pkt->cmdString(),
1600 pkt->req->isInstFetch() ? " (ifetch)" : "",
1601 pkt->getAddr());
| 1579 DPRINTF(Cache, "Create CleanEvict %s\n", pkt->print());
|
1602
1603 return pkt;
1604}
1605
1606void
1607Cache::memWriteback()
1608{
1609 CacheBlkVisitorWrapper visitor(*this, &Cache::writebackVisitor);
1610 tags->forEachBlk(visitor);
1611}
1612
1613void
1614Cache::memInvalidate()
1615{
1616 CacheBlkVisitorWrapper visitor(*this, &Cache::invalidateVisitor);
1617 tags->forEachBlk(visitor);
1618}
1619
1620bool
1621Cache::isDirty() const
1622{
1623 CacheBlkIsDirtyVisitor visitor;
1624 tags->forEachBlk(visitor);
1625
1626 return visitor.isDirty();
1627}
1628
1629bool
1630Cache::writebackVisitor(CacheBlk &blk)
1631{
1632 if (blk.isDirty()) {
1633 assert(blk.isValid());
1634
1635 Request request(tags->regenerateBlkAddr(blk.tag, blk.set),
1636 blkSize, 0, Request::funcMasterId);
1637 request.taskId(blk.task_id);
1638
1639 Packet packet(&request, MemCmd::WriteReq);
1640 packet.dataStatic(blk.data);
1641
1642 memSidePort->sendFunctional(&packet);
1643
1644 blk.status &= ~BlkDirty;
1645 }
1646
1647 return true;
1648}
1649
1650bool
1651Cache::invalidateVisitor(CacheBlk &blk)
1652{
1653
1654 if (blk.isDirty())
1655 warn_once("Invalidating dirty cache lines. Expect things to break.\n");
1656
1657 if (blk.isValid()) {
1658 assert(!blk.isDirty());
1659 tags->invalidate(&blk);
1660 blk.invalidate();
1661 }
1662
1663 return true;
1664}
1665
1666CacheBlk*
1667Cache::allocateBlock(Addr addr, bool is_secure, PacketList &writebacks)
1668{
1669 CacheBlk *blk = tags->findVictim(addr);
1670
1671 // It is valid to return nullptr if there is no victim
1672 if (!blk)
1673 return nullptr;
1674
1675 if (blk->isValid()) {
1676 Addr repl_addr = tags->regenerateBlkAddr(blk->tag, blk->set);
1677 MSHR *repl_mshr = mshrQueue.findMatch(repl_addr, blk->isSecure());
1678 if (repl_mshr) {
1679 // must be an outstanding upgrade request
1680 // on a block we're about to replace...
1681 assert(!blk->isWritable() || blk->isDirty());
1682 assert(repl_mshr->needsWritable());
1683 // too hard to replace block with transient state
1684 // allocation failed, block not inserted
1685 return nullptr;
1686 } else {
1687 DPRINTF(Cache, "replacement: replacing %#llx (%s) with %#llx "
1688 "(%s): %s\n", repl_addr, blk->isSecure() ? "s" : "ns",
1689 addr, is_secure ? "s" : "ns",
1690 blk->isDirty() ? "writeback" : "clean");
1691
1692 if (blk->wasPrefetched()) {
1693 unusedPrefetches++;
1694 }
1695 // Will send up Writeback/CleanEvict snoops via isCachedAbove
1696 // when pushing this writeback list into the write buffer.
1697 if (blk->isDirty() || writebackClean) {
1698 // Save writeback packet for handling by caller
1699 writebacks.push_back(writebackBlk(blk));
1700 } else {
1701 writebacks.push_back(cleanEvictBlk(blk));
1702 }
1703 }
1704 }
1705
1706 return blk;
1707}
1708
1709void
1710Cache::invalidateBlock(CacheBlk *blk)
1711{
1712 if (blk != tempBlock)
1713 tags->invalidate(blk);
1714 blk->invalidate();
1715}
1716
1717// Note that the reason we return a list of writebacks rather than
1718// inserting them directly in the write buffer is that this function
1719// is called by both atomic and timing-mode accesses, and in atomic
1720// mode we don't mess with the write buffer (we just perform the
1721// writebacks atomically once the original request is complete).
1722CacheBlk*
1723Cache::handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks,
1724 bool allocate)
1725{
1726 assert(pkt->isResponse() || pkt->cmd == MemCmd::WriteLineReq);
1727 Addr addr = pkt->getAddr();
1728 bool is_secure = pkt->isSecure();
1729#if TRACING_ON
1730 CacheBlk::State old_state = blk ? blk->status : 0;
1731#endif
1732
1733 // When handling a fill, we should have no writes to this line.
1734 assert(addr == blockAlign(addr));
1735 assert(!writeBuffer.findMatch(addr, is_secure));
1736
1737 if (blk == nullptr) {
1738 // better have read new data...
1739 assert(pkt->hasData());
1740
1741 // only read responses and write-line requests have data;
1742 // note that we don't write the data here for write-line - that
1743 // happens in the subsequent call to satisfyRequest
1744 assert(pkt->isRead() || pkt->cmd == MemCmd::WriteLineReq);
1745
1746 // need to do a replacement if allocating, otherwise we stick
1747 // with the temporary storage
1748 blk = allocate ? allocateBlock(addr, is_secure, writebacks) : nullptr;
1749
1750 if (blk == nullptr) {
1751 // No replaceable block or a mostly exclusive
1752 // cache... just use temporary storage to complete the
1753 // current request and then get rid of it
1754 assert(!tempBlock->isValid());
1755 blk = tempBlock;
1756 tempBlock->set = tags->extractSet(addr);
1757 tempBlock->tag = tags->extractTag(addr);
1758 // @todo: set security state as well...
1759 DPRINTF(Cache, "using temp block for %#llx (%s)\n", addr,
1760 is_secure ? "s" : "ns");
1761 } else {
1762 tags->insertBlock(pkt, blk);
1763 }
1764
1765 // we should never be overwriting a valid block
1766 assert(!blk->isValid());
1767 } else {
1768 // existing block... probably an upgrade
1769 assert(blk->tag == tags->extractTag(addr));
1770 // either we're getting new data or the block should already be valid
1771 assert(pkt->hasData() || blk->isValid());
1772 // don't clear block status... if block is already dirty we
1773 // don't want to lose that
1774 }
1775
1776 if (is_secure)
1777 blk->status |= BlkSecure;
1778 blk->status |= BlkValid | BlkReadable;
1779
1780 // sanity check for whole-line writes, which should always be
1781 // marked as writable as part of the fill, and then later marked
1782 // dirty as part of satisfyRequest
1783 if (pkt->cmd == MemCmd::WriteLineReq) {
1784 assert(!pkt->hasSharers());
1785 // at the moment other caches do not respond to the
1786 // invalidation requests corresponding to a whole-line write
1787 assert(!pkt->cacheResponding());
1788 }
1789
1790 // here we deal with setting the appropriate state of the line,
1791 // and we start by looking at the hasSharers flag, and ignore the
1792 // cacheResponding flag (normally signalling dirty data) if the
1793 // packet has sharers, thus the line is never allocated as Owned
1794 // (dirty but not writable), and always ends up being either
1795 // Shared, Exclusive or Modified, see Packet::setCacheResponding
1796 // for more details
1797 if (!pkt->hasSharers()) {
1798 // we could get a writable line from memory (rather than a
1799 // cache) even in a read-only cache, note that we set this bit
1800 // even for a read-only cache, possibly revisit this decision
1801 blk->status |= BlkWritable;
1802
1803 // check if we got this via cache-to-cache transfer (i.e., from a
1804 // cache that had the block in Modified or Owned state)
1805 if (pkt->cacheResponding()) {
1806 // we got the block in Modified state, and invalidated the
1807 // owners copy
1808 blk->status |= BlkDirty;
1809
1810 chatty_assert(!isReadOnly, "Should never see dirty snoop response "
1811 "in read-only cache %s\n", name());
1812 }
1813 }
1814
1815 DPRINTF(Cache, "Block addr %#llx (%s) moving from state %x to %s\n",
1816 addr, is_secure ? "s" : "ns", old_state, blk->print());
1817
1818 // if we got new data, copy it in (checking for a read response
1819 // and a response that has data is the same in the end)
1820 if (pkt->isRead()) {
1821 // sanity checks
1822 assert(pkt->hasData());
1823 assert(pkt->getSize() == blkSize);
1824
1825 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize);
1826 }
1827 // We pay for fillLatency here.
1828 blk->whenReady = clockEdge() + fillLatency * clockPeriod() +
1829 pkt->payloadDelay;
1830
1831 return blk;
1832}
1833
1834
1835/////////////////////////////////////////////////////
1836//
1837// Snoop path: requests coming in from the memory side
1838//
1839/////////////////////////////////////////////////////
1840
1841void
1842Cache::doTimingSupplyResponse(PacketPtr req_pkt, const uint8_t *blk_data,
1843 bool already_copied, bool pending_inval)
1844{
1845 // sanity check
1846 assert(req_pkt->isRequest());
1847 assert(req_pkt->needsResponse());
1848
| 1580
1581 return pkt;
1582}
1583
1584void
1585Cache::memWriteback()
1586{
1587 CacheBlkVisitorWrapper visitor(*this, &Cache::writebackVisitor);
1588 tags->forEachBlk(visitor);
1589}
1590
1591void
1592Cache::memInvalidate()
1593{
1594 CacheBlkVisitorWrapper visitor(*this, &Cache::invalidateVisitor);
1595 tags->forEachBlk(visitor);
1596}
1597
1598bool
1599Cache::isDirty() const
1600{
1601 CacheBlkIsDirtyVisitor visitor;
1602 tags->forEachBlk(visitor);
1603
1604 return visitor.isDirty();
1605}
1606
1607bool
1608Cache::writebackVisitor(CacheBlk &blk)
1609{
1610 if (blk.isDirty()) {
1611 assert(blk.isValid());
1612
1613 Request request(tags->regenerateBlkAddr(blk.tag, blk.set),
1614 blkSize, 0, Request::funcMasterId);
1615 request.taskId(blk.task_id);
1616
1617 Packet packet(&request, MemCmd::WriteReq);
1618 packet.dataStatic(blk.data);
1619
1620 memSidePort->sendFunctional(&packet);
1621
1622 blk.status &= ~BlkDirty;
1623 }
1624
1625 return true;
1626}
1627
1628bool
1629Cache::invalidateVisitor(CacheBlk &blk)
1630{
1631
1632 if (blk.isDirty())
1633 warn_once("Invalidating dirty cache lines. Expect things to break.\n");
1634
1635 if (blk.isValid()) {
1636 assert(!blk.isDirty());
1637 tags->invalidate(&blk);
1638 blk.invalidate();
1639 }
1640
1641 return true;
1642}
1643
1644CacheBlk*
1645Cache::allocateBlock(Addr addr, bool is_secure, PacketList &writebacks)
1646{
1647 CacheBlk *blk = tags->findVictim(addr);
1648
1649 // It is valid to return nullptr if there is no victim
1650 if (!blk)
1651 return nullptr;
1652
1653 if (blk->isValid()) {
1654 Addr repl_addr = tags->regenerateBlkAddr(blk->tag, blk->set);
1655 MSHR *repl_mshr = mshrQueue.findMatch(repl_addr, blk->isSecure());
1656 if (repl_mshr) {
1657 // must be an outstanding upgrade request
1658 // on a block we're about to replace...
1659 assert(!blk->isWritable() || blk->isDirty());
1660 assert(repl_mshr->needsWritable());
1661 // too hard to replace block with transient state
1662 // allocation failed, block not inserted
1663 return nullptr;
1664 } else {
1665 DPRINTF(Cache, "replacement: replacing %#llx (%s) with %#llx "
1666 "(%s): %s\n", repl_addr, blk->isSecure() ? "s" : "ns",
1667 addr, is_secure ? "s" : "ns",
1668 blk->isDirty() ? "writeback" : "clean");
1669
1670 if (blk->wasPrefetched()) {
1671 unusedPrefetches++;
1672 }
1673 // Will send up Writeback/CleanEvict snoops via isCachedAbove
1674 // when pushing this writeback list into the write buffer.
1675 if (blk->isDirty() || writebackClean) {
1676 // Save writeback packet for handling by caller
1677 writebacks.push_back(writebackBlk(blk));
1678 } else {
1679 writebacks.push_back(cleanEvictBlk(blk));
1680 }
1681 }
1682 }
1683
1684 return blk;
1685}
1686
1687void
1688Cache::invalidateBlock(CacheBlk *blk)
1689{
1690 if (blk != tempBlock)
1691 tags->invalidate(blk);
1692 blk->invalidate();
1693}
1694
1695// Note that the reason we return a list of writebacks rather than
1696// inserting them directly in the write buffer is that this function
1697// is called by both atomic and timing-mode accesses, and in atomic
1698// mode we don't mess with the write buffer (we just perform the
1699// writebacks atomically once the original request is complete).
1700CacheBlk*
1701Cache::handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks,
1702 bool allocate)
1703{
1704 assert(pkt->isResponse() || pkt->cmd == MemCmd::WriteLineReq);
1705 Addr addr = pkt->getAddr();
1706 bool is_secure = pkt->isSecure();
1707#if TRACING_ON
1708 CacheBlk::State old_state = blk ? blk->status : 0;
1709#endif
1710
1711 // When handling a fill, we should have no writes to this line.
1712 assert(addr == blockAlign(addr));
1713 assert(!writeBuffer.findMatch(addr, is_secure));
1714
1715 if (blk == nullptr) {
1716 // better have read new data...
1717 assert(pkt->hasData());
1718
1719 // only read responses and write-line requests have data;
1720 // note that we don't write the data here for write-line - that
1721 // happens in the subsequent call to satisfyRequest
1722 assert(pkt->isRead() || pkt->cmd == MemCmd::WriteLineReq);
1723
1724 // need to do a replacement if allocating, otherwise we stick
1725 // with the temporary storage
1726 blk = allocate ? allocateBlock(addr, is_secure, writebacks) : nullptr;
1727
1728 if (blk == nullptr) {
1729 // No replaceable block or a mostly exclusive
1730 // cache... just use temporary storage to complete the
1731 // current request and then get rid of it
1732 assert(!tempBlock->isValid());
1733 blk = tempBlock;
1734 tempBlock->set = tags->extractSet(addr);
1735 tempBlock->tag = tags->extractTag(addr);
1736 // @todo: set security state as well...
1737 DPRINTF(Cache, "using temp block for %#llx (%s)\n", addr,
1738 is_secure ? "s" : "ns");
1739 } else {
1740 tags->insertBlock(pkt, blk);
1741 }
1742
1743 // we should never be overwriting a valid block
1744 assert(!blk->isValid());
1745 } else {
1746 // existing block... probably an upgrade
1747 assert(blk->tag == tags->extractTag(addr));
1748 // either we're getting new data or the block should already be valid
1749 assert(pkt->hasData() || blk->isValid());
1750 // don't clear block status... if block is already dirty we
1751 // don't want to lose that
1752 }
1753
1754 if (is_secure)
1755 blk->status |= BlkSecure;
1756 blk->status |= BlkValid | BlkReadable;
1757
1758 // sanity check for whole-line writes, which should always be
1759 // marked as writable as part of the fill, and then later marked
1760 // dirty as part of satisfyRequest
1761 if (pkt->cmd == MemCmd::WriteLineReq) {
1762 assert(!pkt->hasSharers());
1763 // at the moment other caches do not respond to the
1764 // invalidation requests corresponding to a whole-line write
1765 assert(!pkt->cacheResponding());
1766 }
1767
1768 // here we deal with setting the appropriate state of the line,
1769 // and we start by looking at the hasSharers flag, and ignore the
1770 // cacheResponding flag (normally signalling dirty data) if the
1771 // packet has sharers, thus the line is never allocated as Owned
1772 // (dirty but not writable), and always ends up being either
1773 // Shared, Exclusive or Modified, see Packet::setCacheResponding
1774 // for more details
1775 if (!pkt->hasSharers()) {
1776 // we could get a writable line from memory (rather than a
1777 // cache) even in a read-only cache, note that we set this bit
1778 // even for a read-only cache, possibly revisit this decision
1779 blk->status |= BlkWritable;
1780
1781 // check if we got this via cache-to-cache transfer (i.e., from a
1782 // cache that had the block in Modified or Owned state)
1783 if (pkt->cacheResponding()) {
1784 // we got the block in Modified state, and invalidated the
1785 // owners copy
1786 blk->status |= BlkDirty;
1787
1788 chatty_assert(!isReadOnly, "Should never see dirty snoop response "
1789 "in read-only cache %s\n", name());
1790 }
1791 }
1792
1793 DPRINTF(Cache, "Block addr %#llx (%s) moving from state %x to %s\n",
1794 addr, is_secure ? "s" : "ns", old_state, blk->print());
1795
1796 // if we got new data, copy it in (checking for a read response
1797 // and a response that has data is the same in the end)
1798 if (pkt->isRead()) {
1799 // sanity checks
1800 assert(pkt->hasData());
1801 assert(pkt->getSize() == blkSize);
1802
1803 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize);
1804 }
1805 // We pay for fillLatency here.
1806 blk->whenReady = clockEdge() + fillLatency * clockPeriod() +
1807 pkt->payloadDelay;
1808
1809 return blk;
1810}
1811
1812
1813/////////////////////////////////////////////////////
1814//
1815// Snoop path: requests coming in from the memory side
1816//
1817/////////////////////////////////////////////////////
1818
1819void
1820Cache::doTimingSupplyResponse(PacketPtr req_pkt, const uint8_t *blk_data,
1821 bool already_copied, bool pending_inval)
1822{
1823 // sanity check
1824 assert(req_pkt->isRequest());
1825 assert(req_pkt->needsResponse());
1826
|
1849 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__,
1850 req_pkt->cmdString(), req_pkt->getAddr(), req_pkt->getSize());
| 1827 DPRINTF(Cache, "%s: for %s\n", __func__, req_pkt->print());
|
1851 // timing-mode snoop responses require a new packet, unless we
1852 // already made a copy...
1853 PacketPtr pkt = req_pkt;
1854 if (!already_copied)
1855 // do not clear flags, and allocate space for data if the
1856 // packet needs it (the only packets that carry data are read
1857 // responses)
1858 pkt = new Packet(req_pkt, false, req_pkt->isRead());
1859
1860 assert(req_pkt->req->isUncacheable() || req_pkt->isInvalidate() ||
1861 pkt->hasSharers());
1862 pkt->makeTimingResponse();
1863 if (pkt->isRead()) {
1864 pkt->setDataFromBlock(blk_data, blkSize);
1865 }
1866 if (pkt->cmd == MemCmd::ReadResp && pending_inval) {
1867 // Assume we defer a response to a read from a far-away cache
1868 // A, then later defer a ReadExcl from a cache B on the same
1869 // bus as us. We'll assert cacheResponding in both cases, but
1870 // in the latter case cacheResponding will keep the
1871 // invalidation from reaching cache A. This special response
1872 // tells cache A that it gets the block to satisfy its read,
1873 // but must immediately invalidate it.
1874 pkt->cmd = MemCmd::ReadRespWithInvalidate;
1875 }
1876 // Here we consider forward_time, paying for just forward latency and
1877 // also charging the delay provided by the xbar.
1878 // forward_time is used as send_time in next allocateWriteBuffer().
1879 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
1880 // Here we reset the timing of the packet.
1881 pkt->headerDelay = pkt->payloadDelay = 0;
| 1828 // timing-mode snoop responses require a new packet, unless we
1829 // already made a copy...
1830 PacketPtr pkt = req_pkt;
1831 if (!already_copied)
1832 // do not clear flags, and allocate space for data if the
1833 // packet needs it (the only packets that carry data are read
1834 // responses)
1835 pkt = new Packet(req_pkt, false, req_pkt->isRead());
1836
1837 assert(req_pkt->req->isUncacheable() || req_pkt->isInvalidate() ||
1838 pkt->hasSharers());
1839 pkt->makeTimingResponse();
1840 if (pkt->isRead()) {
1841 pkt->setDataFromBlock(blk_data, blkSize);
1842 }
1843 if (pkt->cmd == MemCmd::ReadResp && pending_inval) {
1844 // Assume we defer a response to a read from a far-away cache
1845 // A, then later defer a ReadExcl from a cache B on the same
1846 // bus as us. We'll assert cacheResponding in both cases, but
1847 // in the latter case cacheResponding will keep the
1848 // invalidation from reaching cache A. This special response
1849 // tells cache A that it gets the block to satisfy its read,
1850 // but must immediately invalidate it.
1851 pkt->cmd = MemCmd::ReadRespWithInvalidate;
1852 }
1853 // Here we consider forward_time, paying for just forward latency and
1854 // also charging the delay provided by the xbar.
1855 // forward_time is used as send_time in next allocateWriteBuffer().
1856 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
1857 // Here we reset the timing of the packet.
1858 pkt->headerDelay = pkt->payloadDelay = 0;
|
1882 DPRINTF(CacheVerbose,
1883 "%s created response: %s addr %#llx size %d tick: %lu\n",
1884 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize(),
1885 forward_time);
| 1859 DPRINTF(CacheVerbose, "%s: created response: %s tick: %lu\n", __func__,
1860 pkt->print(), forward_time);
|
1886 memSidePort->schedTimingSnoopResp(pkt, forward_time, true);
1887}
1888
1889uint32_t
1890Cache::handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing,
1891 bool is_deferred, bool pending_inval)
1892{
| 1861 memSidePort->schedTimingSnoopResp(pkt, forward_time, true);
1862}
1863
1864uint32_t
1865Cache::handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing,
1866 bool is_deferred, bool pending_inval)
1867{
|
1893 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d\n", __func__,
1894 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
| 1868 DPRINTF(CacheVerbose, "%s: for %s\n", __func__, pkt->print());
|
1895 // deferred snoops can only happen in timing mode
1896 assert(!(is_deferred && !is_timing));
1897 // pending_inval only makes sense on deferred snoops
1898 assert(!(pending_inval && !is_deferred));
1899 assert(pkt->isRequest());
1900
1901 // the packet may get modified if we or a forwarded snooper
1902 // responds in atomic mode, so remember a few things about the
1903 // original packet up front
1904 bool invalidate = pkt->isInvalidate();
1905 bool M5_VAR_USED needs_writable = pkt->needsWritable();
1906
1907 // at the moment we could get an uncacheable write which does not
1908 // have the invalidate flag, and we need a suitable way of dealing
1909 // with this case
1910 panic_if(invalidate && pkt->req->isUncacheable(),
| 1869 // deferred snoops can only happen in timing mode
1870 assert(!(is_deferred && !is_timing));
1871 // pending_inval only makes sense on deferred snoops
1872 assert(!(pending_inval && !is_deferred));
1873 assert(pkt->isRequest());
1874
1875 // the packet may get modified if we or a forwarded snooper
1876 // responds in atomic mode, so remember a few things about the
1877 // original packet up front
1878 bool invalidate = pkt->isInvalidate();
1879 bool M5_VAR_USED needs_writable = pkt->needsWritable();
1880
1881 // at the moment we could get an uncacheable write which does not
1882 // have the invalidate flag, and we need a suitable way of dealing
1883 // with this case
1884 panic_if(invalidate && pkt->req->isUncacheable(),
|
1911 "%s got an invalidating uncacheable snoop request %s to %#llx",
1912 name(), pkt->cmdString(), pkt->getAddr());
| 1885 "%s got an invalidating uncacheable snoop request %s",
1886 name(), pkt->print());
|
1913
1914 uint32_t snoop_delay = 0;
1915
1916 if (forwardSnoops) {
1917 // first propagate snoop upward to see if anyone above us wants to
1918 // handle it. save & restore packet src since it will get
1919 // rewritten to be relative to cpu-side bus (if any)
1920 bool alreadyResponded = pkt->cacheResponding();
1921 if (is_timing) {
1922 // copy the packet so that we can clear any flags before
1923 // forwarding it upwards, we also allocate data (passing
1924 // the pointer along in case of static data), in case
1925 // there is a snoop hit in upper levels
1926 Packet snoopPkt(pkt, true, true);
1927 snoopPkt.setExpressSnoop();
1928 // the snoop packet does not need to wait any additional
1929 // time
1930 snoopPkt.headerDelay = snoopPkt.payloadDelay = 0;
1931 cpuSidePort->sendTimingSnoopReq(&snoopPkt);
1932
1933 // add the header delay (including crossbar and snoop
1934 // delays) of the upward snoop to the snoop delay for this
1935 // cache
1936 snoop_delay += snoopPkt.headerDelay;
1937
1938 if (snoopPkt.cacheResponding()) {
1939 // cache-to-cache response from some upper cache
1940 assert(!alreadyResponded);
1941 pkt->setCacheResponding();
1942 }
1943 // upstream cache has the block, or has an outstanding
1944 // MSHR, pass the flag on
1945 if (snoopPkt.hasSharers()) {
1946 pkt->setHasSharers();
1947 }
1948 // If this request is a prefetch or clean evict and an upper level
1949 // signals block present, make sure to propagate the block
1950 // presence to the requester.
1951 if (snoopPkt.isBlockCached()) {
1952 pkt->setBlockCached();
1953 }
1954 } else {
1955 cpuSidePort->sendAtomicSnoop(pkt);
1956 if (!alreadyResponded && pkt->cacheResponding()) {
1957 // cache-to-cache response from some upper cache:
1958 // forward response to original requester
1959 assert(pkt->isResponse());
1960 }
1961 }
1962 }
1963
1964 if (!blk || !blk->isValid()) {
| 1887
1888 uint32_t snoop_delay = 0;
1889
1890 if (forwardSnoops) {
1891 // first propagate snoop upward to see if anyone above us wants to
1892 // handle it. save & restore packet src since it will get
1893 // rewritten to be relative to cpu-side bus (if any)
1894 bool alreadyResponded = pkt->cacheResponding();
1895 if (is_timing) {
1896 // copy the packet so that we can clear any flags before
1897 // forwarding it upwards, we also allocate data (passing
1898 // the pointer along in case of static data), in case
1899 // there is a snoop hit in upper levels
1900 Packet snoopPkt(pkt, true, true);
1901 snoopPkt.setExpressSnoop();
1902 // the snoop packet does not need to wait any additional
1903 // time
1904 snoopPkt.headerDelay = snoopPkt.payloadDelay = 0;
1905 cpuSidePort->sendTimingSnoopReq(&snoopPkt);
1906
1907 // add the header delay (including crossbar and snoop
1908 // delays) of the upward snoop to the snoop delay for this
1909 // cache
1910 snoop_delay += snoopPkt.headerDelay;
1911
1912 if (snoopPkt.cacheResponding()) {
1913 // cache-to-cache response from some upper cache
1914 assert(!alreadyResponded);
1915 pkt->setCacheResponding();
1916 }
1917 // upstream cache has the block, or has an outstanding
1918 // MSHR, pass the flag on
1919 if (snoopPkt.hasSharers()) {
1920 pkt->setHasSharers();
1921 }
1922 // If this request is a prefetch or clean evict and an upper level
1923 // signals block present, make sure to propagate the block
1924 // presence to the requester.
1925 if (snoopPkt.isBlockCached()) {
1926 pkt->setBlockCached();
1927 }
1928 } else {
1929 cpuSidePort->sendAtomicSnoop(pkt);
1930 if (!alreadyResponded && pkt->cacheResponding()) {
1931 // cache-to-cache response from some upper cache:
1932 // forward response to original requester
1933 assert(pkt->isResponse());
1934 }
1935 }
1936 }
1937
1938 if (!blk || !blk->isValid()) {
|
| 1939 DPRINTF(CacheVerbose, "%s: snoop miss for %s\n", __func__,
1940 pkt->print());
|
1965 if (is_deferred) {
1966 // we no longer have the block, and will not respond, but a
1967 // packet was allocated in MSHR::handleSnoop and we have
1968 // to delete it
1969 assert(pkt->needsResponse());
1970
1971 // we have passed the block to a cache upstream, that
1972 // cache should be responding
1973 assert(pkt->cacheResponding());
1974
1975 delete pkt;
1976 }
| 1941 if (is_deferred) {
1942 // we no longer have the block, and will not respond, but a
1943 // packet was allocated in MSHR::handleSnoop and we have
1944 // to delete it
1945 assert(pkt->needsResponse());
1946
1947 // we have passed the block to a cache upstream, that
1948 // cache should be responding
1949 assert(pkt->cacheResponding());
1950
1951 delete pkt;
1952 }
|
1977
1978 DPRINTF(CacheVerbose, "%s snoop miss for %s addr %#llx size %d\n",
1979 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize());
| |
1980 return snoop_delay;
1981 } else {
| 1953 return snoop_delay;
1954 } else {
|
1982 DPRINTF(Cache, "%s snoop hit for %s addr %#llx size %d, "
1983 "old state is %s\n", __func__, pkt->cmdString(),
1984 pkt->getAddr(), pkt->getSize(), blk->print());
| 1955 DPRINTF(Cache, "%s: snoop hit for %s, old state is %s\n", __func__,
1956 pkt->print(), blk->print());
|
1985 }
1986
1987 chatty_assert(!(isReadOnly && blk->isDirty()),
1988 "Should never have a dirty block in a read-only cache %s\n",
1989 name());
1990
1991 // We may end up modifying both the block state and the packet (if
1992 // we respond in atomic mode), so just figure out what to do now
1993 // and then do it later. If we find dirty data while snooping for
1994 // an invalidate, we don't need to send a response. The
1995 // invalidation itself is taken care of below.
1996 bool respond = blk->isDirty() && pkt->needsResponse() &&
1997 pkt->cmd != MemCmd::InvalidateReq;
1998 bool have_writable = blk->isWritable();
1999
2000 // Invalidate any prefetch's from below that would strip write permissions
2001 // MemCmd::HardPFReq is only observed by upstream caches. After missing
2002 // above and in it's own cache, a new MemCmd::ReadReq is created that
2003 // downstream caches observe.
2004 if (pkt->mustCheckAbove()) {
2005 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s "
| 1957 }
1958
1959 chatty_assert(!(isReadOnly && blk->isDirty()),
1960 "Should never have a dirty block in a read-only cache %s\n",
1961 name());
1962
1963 // We may end up modifying both the block state and the packet (if
1964 // we respond in atomic mode), so just figure out what to do now
1965 // and then do it later. If we find dirty data while snooping for
1966 // an invalidate, we don't need to send a response. The
1967 // invalidation itself is taken care of below.
1968 bool respond = blk->isDirty() && pkt->needsResponse() &&
1969 pkt->cmd != MemCmd::InvalidateReq;
1970 bool have_writable = blk->isWritable();
1971
1972 // Invalidate any prefetch's from below that would strip write permissions
1973 // MemCmd::HardPFReq is only observed by upstream caches. After missing
1974 // above and in it's own cache, a new MemCmd::ReadReq is created that
1975 // downstream caches observe.
1976 if (pkt->mustCheckAbove()) {
1977 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s "
|
2006 "from lower cache\n", pkt->getAddr(), pkt->cmdString());
| 1978 "from lower cache\n", pkt->getAddr(), pkt->print());
|
2007 pkt->setBlockCached();
2008 return snoop_delay;
2009 }
2010
2011 if (pkt->isRead() && !invalidate) {
2012 // reading without requiring the line in a writable state
2013 assert(!needs_writable);
2014 pkt->setHasSharers();
2015
2016 // if the requesting packet is uncacheable, retain the line in
2017 // the current state, otherwhise unset the writable flag,
2018 // which means we go from Modified to Owned (and will respond
2019 // below), remain in Owned (and will respond below), from
2020 // Exclusive to Shared, or remain in Shared
2021 if (!pkt->req->isUncacheable())
2022 blk->status &= ~BlkWritable;
2023 }
2024
2025 if (respond) {
2026 // prevent anyone else from responding, cache as well as
2027 // memory, and also prevent any memory from even seeing the
2028 // request
2029 pkt->setCacheResponding();
2030 if (have_writable) {
2031 // inform the cache hierarchy that this cache had the line
2032 // in the Modified state so that we avoid unnecessary
2033 // invalidations (see Packet::setResponderHadWritable)
2034 pkt->setResponderHadWritable();
2035
2036 // in the case of an uncacheable request there is no point
2037 // in setting the responderHadWritable flag, but since the
2038 // recipient does not care there is no harm in doing so
2039 } else {
2040 // if the packet has needsWritable set we invalidate our
2041 // copy below and all other copies will be invalidates
2042 // through express snoops, and if needsWritable is not set
2043 // we already called setHasSharers above
2044 }
2045
2046 // if we are returning a writable and dirty (Modified) line,
2047 // we should be invalidating the line
2048 panic_if(!invalidate && !pkt->hasSharers(),
| 1979 pkt->setBlockCached();
1980 return snoop_delay;
1981 }
1982
1983 if (pkt->isRead() && !invalidate) {
1984 // reading without requiring the line in a writable state
1985 assert(!needs_writable);
1986 pkt->setHasSharers();
1987
1988 // if the requesting packet is uncacheable, retain the line in
1989 // the current state, otherwhise unset the writable flag,
1990 // which means we go from Modified to Owned (and will respond
1991 // below), remain in Owned (and will respond below), from
1992 // Exclusive to Shared, or remain in Shared
1993 if (!pkt->req->isUncacheable())
1994 blk->status &= ~BlkWritable;
1995 }
1996
1997 if (respond) {
1998 // prevent anyone else from responding, cache as well as
1999 // memory, and also prevent any memory from even seeing the
2000 // request
2001 pkt->setCacheResponding();
2002 if (have_writable) {
2003 // inform the cache hierarchy that this cache had the line
2004 // in the Modified state so that we avoid unnecessary
2005 // invalidations (see Packet::setResponderHadWritable)
2006 pkt->setResponderHadWritable();
2007
2008 // in the case of an uncacheable request there is no point
2009 // in setting the responderHadWritable flag, but since the
2010 // recipient does not care there is no harm in doing so
2011 } else {
2012 // if the packet has needsWritable set we invalidate our
2013 // copy below and all other copies will be invalidates
2014 // through express snoops, and if needsWritable is not set
2015 // we already called setHasSharers above
2016 }
2017
2018 // if we are returning a writable and dirty (Modified) line,
2019 // we should be invalidating the line
2020 panic_if(!invalidate && !pkt->hasSharers(),
|
2049 "%s is passing a Modified line through %s to %#llx, "
2050 "but keeping the block",
2051 name(), pkt->cmdString(), pkt->getAddr());
| 2021 "%s is passing a Modified line through %s, "
2022 "but keeping the block", name(), pkt->print());
|
2052
2053 if (is_timing) {
2054 doTimingSupplyResponse(pkt, blk->data, is_deferred, pending_inval);
2055 } else {
2056 pkt->makeAtomicResponse();
2057 // packets such as upgrades do not actually have any data
2058 // payload
2059 if (pkt->hasData())
2060 pkt->setDataFromBlock(blk->data, blkSize);
2061 }
2062 }
2063
2064 if (!respond && is_deferred) {
2065 assert(pkt->needsResponse());
2066
2067 // if we copied the deferred packet with the intention to
2068 // respond, but are not responding, then a cache above us must
2069 // be, and we can use this as the indication of whether this
2070 // is a packet where we created a copy of the request or not
2071 if (!pkt->cacheResponding()) {
2072 delete pkt->req;
2073 }
2074
2075 delete pkt;
2076 }
2077
2078 // Do this last in case it deallocates block data or something
2079 // like that
2080 if (invalidate) {
2081 invalidateBlock(blk);
2082 }
2083
2084 DPRINTF(Cache, "new state is %s\n", blk->print());
2085
2086 return snoop_delay;
2087}
2088
2089
2090void
2091Cache::recvTimingSnoopReq(PacketPtr pkt)
2092{
| 2023
2024 if (is_timing) {
2025 doTimingSupplyResponse(pkt, blk->data, is_deferred, pending_inval);
2026 } else {
2027 pkt->makeAtomicResponse();
2028 // packets such as upgrades do not actually have any data
2029 // payload
2030 if (pkt->hasData())
2031 pkt->setDataFromBlock(blk->data, blkSize);
2032 }
2033 }
2034
2035 if (!respond && is_deferred) {
2036 assert(pkt->needsResponse());
2037
2038 // if we copied the deferred packet with the intention to
2039 // respond, but are not responding, then a cache above us must
2040 // be, and we can use this as the indication of whether this
2041 // is a packet where we created a copy of the request or not
2042 if (!pkt->cacheResponding()) {
2043 delete pkt->req;
2044 }
2045
2046 delete pkt;
2047 }
2048
2049 // Do this last in case it deallocates block data or something
2050 // like that
2051 if (invalidate) {
2052 invalidateBlock(blk);
2053 }
2054
2055 DPRINTF(Cache, "new state is %s\n", blk->print());
2056
2057 return snoop_delay;
2058}
2059
2060
2061void
2062Cache::recvTimingSnoopReq(PacketPtr pkt)
2063{
|
2093 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d\n", __func__,
2094 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
| 2064 DPRINTF(CacheVerbose, "%s: for %s\n", __func__, pkt->print());
|
2095
2096 // Snoops shouldn't happen when bypassing caches
2097 assert(!system->bypassCaches());
2098
2099 // no need to snoop requests that are not in range
2100 if (!inRange(pkt->getAddr())) {
2101 return;
2102 }
2103
2104 bool is_secure = pkt->isSecure();
2105 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure);
2106
2107 Addr blk_addr = blockAlign(pkt->getAddr());
2108 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure);
2109
2110 // Update the latency cost of the snoop so that the crossbar can
2111 // account for it. Do not overwrite what other neighbouring caches
2112 // have already done, rather take the maximum. The update is
2113 // tentative, for cases where we return before an upward snoop
2114 // happens below.
2115 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay,
2116 lookupLatency * clockPeriod());
2117
2118 // Inform request(Prefetch, CleanEvict or Writeback) from below of
2119 // MSHR hit, set setBlockCached.
2120 if (mshr && pkt->mustCheckAbove()) {
| 2065
2066 // Snoops shouldn't happen when bypassing caches
2067 assert(!system->bypassCaches());
2068
2069 // no need to snoop requests that are not in range
2070 if (!inRange(pkt->getAddr())) {
2071 return;
2072 }
2073
2074 bool is_secure = pkt->isSecure();
2075 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure);
2076
2077 Addr blk_addr = blockAlign(pkt->getAddr());
2078 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure);
2079
2080 // Update the latency cost of the snoop so that the crossbar can
2081 // account for it. Do not overwrite what other neighbouring caches
2082 // have already done, rather take the maximum. The update is
2083 // tentative, for cases where we return before an upward snoop
2084 // happens below.
2085 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay,
2086 lookupLatency * clockPeriod());
2087
2088 // Inform request(Prefetch, CleanEvict or Writeback) from below of
2089 // MSHR hit, set setBlockCached.
2090 if (mshr && pkt->mustCheckAbove()) {
|
2121 DPRINTF(Cache, "Setting block cached for %s from"
2122 "lower cache on mshr hit %#x\n",
2123 pkt->cmdString(), pkt->getAddr());
| 2091 DPRINTF(Cache, "Setting block cached for %s from lower cache on "
2092 "mshr hit\n", pkt->print());
|
2124 pkt->setBlockCached();
2125 return;
2126 }
2127
2128 // Let the MSHR itself track the snoop and decide whether we want
2129 // to go ahead and do the regular cache snoop
2130 if (mshr && mshr->handleSnoop(pkt, order++)) {
2131 DPRINTF(Cache, "Deferring snoop on in-service MSHR to blk %#llx (%s)."
2132 "mshrs: %s\n", blk_addr, is_secure ? "s" : "ns",
2133 mshr->print());
2134
2135 if (mshr->getNumTargets() > numTarget)
2136 warn("allocating bonus target for snoop"); //handle later
2137 return;
2138 }
2139
2140 //We also need to check the writeback buffers and handle those
2141 WriteQueueEntry *wb_entry = writeBuffer.findMatch(blk_addr, is_secure);
2142 if (wb_entry) {
2143 DPRINTF(Cache, "Snoop hit in writeback to addr %#llx (%s)\n",
2144 pkt->getAddr(), is_secure ? "s" : "ns");
2145 // Expect to see only Writebacks and/or CleanEvicts here, both of
2146 // which should not be generated for uncacheable data.
2147 assert(!wb_entry->isUncacheable());
2148 // There should only be a single request responsible for generating
2149 // Writebacks/CleanEvicts.
2150 assert(wb_entry->getNumTargets() == 1);
2151 PacketPtr wb_pkt = wb_entry->getTarget()->pkt;
2152 assert(wb_pkt->isEviction());
2153
2154 if (pkt->isEviction()) {
2155 // if the block is found in the write queue, set the BLOCK_CACHED
2156 // flag for Writeback/CleanEvict snoop. On return the snoop will
2157 // propagate the BLOCK_CACHED flag in Writeback packets and prevent
2158 // any CleanEvicts from travelling down the memory hierarchy.
2159 pkt->setBlockCached();
| 2093 pkt->setBlockCached();
2094 return;
2095 }
2096
2097 // Let the MSHR itself track the snoop and decide whether we want
2098 // to go ahead and do the regular cache snoop
2099 if (mshr && mshr->handleSnoop(pkt, order++)) {
2100 DPRINTF(Cache, "Deferring snoop on in-service MSHR to blk %#llx (%s)."
2101 "mshrs: %s\n", blk_addr, is_secure ? "s" : "ns",
2102 mshr->print());
2103
2104 if (mshr->getNumTargets() > numTarget)
2105 warn("allocating bonus target for snoop"); //handle later
2106 return;
2107 }
2108
2109 //We also need to check the writeback buffers and handle those
2110 WriteQueueEntry *wb_entry = writeBuffer.findMatch(blk_addr, is_secure);
2111 if (wb_entry) {
2112 DPRINTF(Cache, "Snoop hit in writeback to addr %#llx (%s)\n",
2113 pkt->getAddr(), is_secure ? "s" : "ns");
2114 // Expect to see only Writebacks and/or CleanEvicts here, both of
2115 // which should not be generated for uncacheable data.
2116 assert(!wb_entry->isUncacheable());
2117 // There should only be a single request responsible for generating
2118 // Writebacks/CleanEvicts.
2119 assert(wb_entry->getNumTargets() == 1);
2120 PacketPtr wb_pkt = wb_entry->getTarget()->pkt;
2121 assert(wb_pkt->isEviction());
2122
2123 if (pkt->isEviction()) {
2124 // if the block is found in the write queue, set the BLOCK_CACHED
2125 // flag for Writeback/CleanEvict snoop. On return the snoop will
2126 // propagate the BLOCK_CACHED flag in Writeback packets and prevent
2127 // any CleanEvicts from travelling down the memory hierarchy.
2128 pkt->setBlockCached();
|
2160 DPRINTF(Cache, "Squashing %s from lower cache on writequeue hit"
2161 " %#x\n", pkt->cmdString(), pkt->getAddr());
| 2129 DPRINTF(Cache, "%s: Squashing %s from lower cache on writequeue "
2130 "hit\n", __func__, pkt->print());
|
2162 return;
2163 }
2164
2165 // conceptually writebacks are no different to other blocks in
2166 // this cache, so the behaviour is modelled after handleSnoop,
2167 // the difference being that instead of querying the block
2168 // state to determine if it is dirty and writable, we use the
2169 // command and fields of the writeback packet
2170 bool respond = wb_pkt->cmd == MemCmd::WritebackDirty &&
2171 pkt->needsResponse() && pkt->cmd != MemCmd::InvalidateReq;
2172 bool have_writable = !wb_pkt->hasSharers();
2173 bool invalidate = pkt->isInvalidate();
2174
2175 if (!pkt->req->isUncacheable() && pkt->isRead() && !invalidate) {
2176 assert(!pkt->needsWritable());
2177 pkt->setHasSharers();
2178 wb_pkt->setHasSharers();
2179 }
2180
2181 if (respond) {
2182 pkt->setCacheResponding();
2183
2184 if (have_writable) {
2185 pkt->setResponderHadWritable();
2186 }
2187
2188 doTimingSupplyResponse(pkt, wb_pkt->getConstPtr<uint8_t>(),
2189 false, false);
2190 }
2191
2192 if (invalidate) {
2193 // Invalidation trumps our writeback... discard here
2194 // Note: markInService will remove entry from writeback buffer.
2195 markInService(wb_entry);
2196 delete wb_pkt;
2197 }
2198 }
2199
2200 // If this was a shared writeback, there may still be
2201 // other shared copies above that require invalidation.
2202 // We could be more selective and return here if the
2203 // request is non-exclusive or if the writeback is
2204 // exclusive.
2205 uint32_t snoop_delay = handleSnoop(pkt, blk, true, false, false);
2206
2207 // Override what we did when we first saw the snoop, as we now
2208 // also have the cost of the upwards snoops to account for
2209 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay, snoop_delay +
2210 lookupLatency * clockPeriod());
2211}
2212
2213bool
2214Cache::CpuSidePort::recvTimingSnoopResp(PacketPtr pkt)
2215{
2216 // Express snoop responses from master to slave, e.g., from L1 to L2
2217 cache->recvTimingSnoopResp(pkt);
2218 return true;
2219}
2220
2221Tick
2222Cache::recvAtomicSnoop(PacketPtr pkt)
2223{
2224 // Snoops shouldn't happen when bypassing caches
2225 assert(!system->bypassCaches());
2226
2227 // no need to snoop requests that are not in range.
2228 if (!inRange(pkt->getAddr())) {
2229 return 0;
2230 }
2231
2232 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
2233 uint32_t snoop_delay = handleSnoop(pkt, blk, false, false, false);
2234 return snoop_delay + lookupLatency * clockPeriod();
2235}
2236
2237
2238QueueEntry*
2239Cache::getNextQueueEntry()
2240{
2241 // Check both MSHR queue and write buffer for potential requests,
2242 // note that null does not mean there is no request, it could
2243 // simply be that it is not ready
2244 MSHR *miss_mshr = mshrQueue.getNext();
2245 WriteQueueEntry *wq_entry = writeBuffer.getNext();
2246
2247 // If we got a write buffer request ready, first priority is a
2248 // full write buffer, otherwise we favour the miss requests
2249 if (wq_entry && (writeBuffer.isFull() || !miss_mshr)) {
2250 // need to search MSHR queue for conflicting earlier miss.
2251 MSHR *conflict_mshr =
2252 mshrQueue.findPending(wq_entry->blkAddr,
2253 wq_entry->isSecure);
2254
2255 if (conflict_mshr && conflict_mshr->order < wq_entry->order) {
2256 // Service misses in order until conflict is cleared.
2257 return conflict_mshr;
2258
2259 // @todo Note that we ignore the ready time of the conflict here
2260 }
2261
2262 // No conflicts; issue write
2263 return wq_entry;
2264 } else if (miss_mshr) {
2265 // need to check for conflicting earlier writeback
2266 WriteQueueEntry *conflict_mshr =
2267 writeBuffer.findPending(miss_mshr->blkAddr,
2268 miss_mshr->isSecure);
2269 if (conflict_mshr) {
2270 // not sure why we don't check order here... it was in the
2271 // original code but commented out.
2272
2273 // The only way this happens is if we are
2274 // doing a write and we didn't have permissions
2275 // then subsequently saw a writeback (owned got evicted)
2276 // We need to make sure to perform the writeback first
2277 // To preserve the dirty data, then we can issue the write
2278
2279 // should we return wq_entry here instead? I.e. do we
2280 // have to flush writes in order? I don't think so... not
2281 // for Alpha anyway. Maybe for x86?
2282 return conflict_mshr;
2283
2284 // @todo Note that we ignore the ready time of the conflict here
2285 }
2286
2287 // No conflicts; issue read
2288 return miss_mshr;
2289 }
2290
2291 // fall through... no pending requests. Try a prefetch.
2292 assert(!miss_mshr && !wq_entry);
2293 if (prefetcher && mshrQueue.canPrefetch()) {
2294 // If we have a miss queue slot, we can try a prefetch
2295 PacketPtr pkt = prefetcher->getPacket();
2296 if (pkt) {
2297 Addr pf_addr = blockAlign(pkt->getAddr());
2298 if (!tags->findBlock(pf_addr, pkt->isSecure()) &&
2299 !mshrQueue.findMatch(pf_addr, pkt->isSecure()) &&
2300 !writeBuffer.findMatch(pf_addr, pkt->isSecure())) {
2301 // Update statistic on number of prefetches issued
2302 // (hwpf_mshr_misses)
2303 assert(pkt->req->masterId() < system->maxMasters());
2304 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++;
2305
2306 // allocate an MSHR and return it, note
2307 // that we send the packet straight away, so do not
2308 // schedule the send
2309 return allocateMissBuffer(pkt, curTick(), false);
2310 } else {
2311 // free the request and packet
2312 delete pkt->req;
2313 delete pkt;
2314 }
2315 }
2316 }
2317
2318 return nullptr;
2319}
2320
2321bool
2322Cache::isCachedAbove(PacketPtr pkt, bool is_timing) const
2323{
2324 if (!forwardSnoops)
2325 return false;
2326 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and
2327 // Writeback snoops into upper level caches to check for copies of the
2328 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict
2329 // packet, the cache can inform the crossbar below of presence or absence
2330 // of the block.
2331 if (is_timing) {
2332 Packet snoop_pkt(pkt, true, false);
2333 snoop_pkt.setExpressSnoop();
2334 // Assert that packet is either Writeback or CleanEvict and not a
2335 // prefetch request because prefetch requests need an MSHR and may
2336 // generate a snoop response.
2337 assert(pkt->isEviction());
2338 snoop_pkt.senderState = nullptr;
2339 cpuSidePort->sendTimingSnoopReq(&snoop_pkt);
2340 // Writeback/CleanEvict snoops do not generate a snoop response.
2341 assert(!(snoop_pkt.cacheResponding()));
2342 return snoop_pkt.isBlockCached();
2343 } else {
2344 cpuSidePort->sendAtomicSnoop(pkt);
2345 return pkt->isBlockCached();
2346 }
2347}
2348
2349Tick
2350Cache::nextQueueReadyTime() const
2351{
2352 Tick nextReady = std::min(mshrQueue.nextReadyTime(),
2353 writeBuffer.nextReadyTime());
2354
2355 // Don't signal prefetch ready time if no MSHRs available
2356 // Will signal once enoguh MSHRs are deallocated
2357 if (prefetcher && mshrQueue.canPrefetch()) {
2358 nextReady = std::min(nextReady,
2359 prefetcher->nextPrefetchReadyTime());
2360 }
2361
2362 return nextReady;
2363}
2364
2365bool
2366Cache::sendMSHRQueuePacket(MSHR* mshr)
2367{
2368 assert(mshr);
2369
2370 // use request from 1st target
2371 PacketPtr tgt_pkt = mshr->getTarget()->pkt;
2372
| 2131 return;
2132 }
2133
2134 // conceptually writebacks are no different to other blocks in
2135 // this cache, so the behaviour is modelled after handleSnoop,
2136 // the difference being that instead of querying the block
2137 // state to determine if it is dirty and writable, we use the
2138 // command and fields of the writeback packet
2139 bool respond = wb_pkt->cmd == MemCmd::WritebackDirty &&
2140 pkt->needsResponse() && pkt->cmd != MemCmd::InvalidateReq;
2141 bool have_writable = !wb_pkt->hasSharers();
2142 bool invalidate = pkt->isInvalidate();
2143
2144 if (!pkt->req->isUncacheable() && pkt->isRead() && !invalidate) {
2145 assert(!pkt->needsWritable());
2146 pkt->setHasSharers();
2147 wb_pkt->setHasSharers();
2148 }
2149
2150 if (respond) {
2151 pkt->setCacheResponding();
2152
2153 if (have_writable) {
2154 pkt->setResponderHadWritable();
2155 }
2156
2157 doTimingSupplyResponse(pkt, wb_pkt->getConstPtr<uint8_t>(),
2158 false, false);
2159 }
2160
2161 if (invalidate) {
2162 // Invalidation trumps our writeback... discard here
2163 // Note: markInService will remove entry from writeback buffer.
2164 markInService(wb_entry);
2165 delete wb_pkt;
2166 }
2167 }
2168
2169 // If this was a shared writeback, there may still be
2170 // other shared copies above that require invalidation.
2171 // We could be more selective and return here if the
2172 // request is non-exclusive or if the writeback is
2173 // exclusive.
2174 uint32_t snoop_delay = handleSnoop(pkt, blk, true, false, false);
2175
2176 // Override what we did when we first saw the snoop, as we now
2177 // also have the cost of the upwards snoops to account for
2178 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay, snoop_delay +
2179 lookupLatency * clockPeriod());
2180}
2181
2182bool
2183Cache::CpuSidePort::recvTimingSnoopResp(PacketPtr pkt)
2184{
2185 // Express snoop responses from master to slave, e.g., from L1 to L2
2186 cache->recvTimingSnoopResp(pkt);
2187 return true;
2188}
2189
2190Tick
2191Cache::recvAtomicSnoop(PacketPtr pkt)
2192{
2193 // Snoops shouldn't happen when bypassing caches
2194 assert(!system->bypassCaches());
2195
2196 // no need to snoop requests that are not in range.
2197 if (!inRange(pkt->getAddr())) {
2198 return 0;
2199 }
2200
2201 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
2202 uint32_t snoop_delay = handleSnoop(pkt, blk, false, false, false);
2203 return snoop_delay + lookupLatency * clockPeriod();
2204}
2205
2206
2207QueueEntry*
2208Cache::getNextQueueEntry()
2209{
2210 // Check both MSHR queue and write buffer for potential requests,
2211 // note that null does not mean there is no request, it could
2212 // simply be that it is not ready
2213 MSHR *miss_mshr = mshrQueue.getNext();
2214 WriteQueueEntry *wq_entry = writeBuffer.getNext();
2215
2216 // If we got a write buffer request ready, first priority is a
2217 // full write buffer, otherwise we favour the miss requests
2218 if (wq_entry && (writeBuffer.isFull() || !miss_mshr)) {
2219 // need to search MSHR queue for conflicting earlier miss.
2220 MSHR *conflict_mshr =
2221 mshrQueue.findPending(wq_entry->blkAddr,
2222 wq_entry->isSecure);
2223
2224 if (conflict_mshr && conflict_mshr->order < wq_entry->order) {
2225 // Service misses in order until conflict is cleared.
2226 return conflict_mshr;
2227
2228 // @todo Note that we ignore the ready time of the conflict here
2229 }
2230
2231 // No conflicts; issue write
2232 return wq_entry;
2233 } else if (miss_mshr) {
2234 // need to check for conflicting earlier writeback
2235 WriteQueueEntry *conflict_mshr =
2236 writeBuffer.findPending(miss_mshr->blkAddr,
2237 miss_mshr->isSecure);
2238 if (conflict_mshr) {
2239 // not sure why we don't check order here... it was in the
2240 // original code but commented out.
2241
2242 // The only way this happens is if we are
2243 // doing a write and we didn't have permissions
2244 // then subsequently saw a writeback (owned got evicted)
2245 // We need to make sure to perform the writeback first
2246 // To preserve the dirty data, then we can issue the write
2247
2248 // should we return wq_entry here instead? I.e. do we
2249 // have to flush writes in order? I don't think so... not
2250 // for Alpha anyway. Maybe for x86?
2251 return conflict_mshr;
2252
2253 // @todo Note that we ignore the ready time of the conflict here
2254 }
2255
2256 // No conflicts; issue read
2257 return miss_mshr;
2258 }
2259
2260 // fall through... no pending requests. Try a prefetch.
2261 assert(!miss_mshr && !wq_entry);
2262 if (prefetcher && mshrQueue.canPrefetch()) {
2263 // If we have a miss queue slot, we can try a prefetch
2264 PacketPtr pkt = prefetcher->getPacket();
2265 if (pkt) {
2266 Addr pf_addr = blockAlign(pkt->getAddr());
2267 if (!tags->findBlock(pf_addr, pkt->isSecure()) &&
2268 !mshrQueue.findMatch(pf_addr, pkt->isSecure()) &&
2269 !writeBuffer.findMatch(pf_addr, pkt->isSecure())) {
2270 // Update statistic on number of prefetches issued
2271 // (hwpf_mshr_misses)
2272 assert(pkt->req->masterId() < system->maxMasters());
2273 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++;
2274
2275 // allocate an MSHR and return it, note
2276 // that we send the packet straight away, so do not
2277 // schedule the send
2278 return allocateMissBuffer(pkt, curTick(), false);
2279 } else {
2280 // free the request and packet
2281 delete pkt->req;
2282 delete pkt;
2283 }
2284 }
2285 }
2286
2287 return nullptr;
2288}
2289
2290bool
2291Cache::isCachedAbove(PacketPtr pkt, bool is_timing) const
2292{
2293 if (!forwardSnoops)
2294 return false;
2295 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and
2296 // Writeback snoops into upper level caches to check for copies of the
2297 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict
2298 // packet, the cache can inform the crossbar below of presence or absence
2299 // of the block.
2300 if (is_timing) {
2301 Packet snoop_pkt(pkt, true, false);
2302 snoop_pkt.setExpressSnoop();
2303 // Assert that packet is either Writeback or CleanEvict and not a
2304 // prefetch request because prefetch requests need an MSHR and may
2305 // generate a snoop response.
2306 assert(pkt->isEviction());
2307 snoop_pkt.senderState = nullptr;
2308 cpuSidePort->sendTimingSnoopReq(&snoop_pkt);
2309 // Writeback/CleanEvict snoops do not generate a snoop response.
2310 assert(!(snoop_pkt.cacheResponding()));
2311 return snoop_pkt.isBlockCached();
2312 } else {
2313 cpuSidePort->sendAtomicSnoop(pkt);
2314 return pkt->isBlockCached();
2315 }
2316}
2317
2318Tick
2319Cache::nextQueueReadyTime() const
2320{
2321 Tick nextReady = std::min(mshrQueue.nextReadyTime(),
2322 writeBuffer.nextReadyTime());
2323
2324 // Don't signal prefetch ready time if no MSHRs available
2325 // Will signal once enoguh MSHRs are deallocated
2326 if (prefetcher && mshrQueue.canPrefetch()) {
2327 nextReady = std::min(nextReady,
2328 prefetcher->nextPrefetchReadyTime());
2329 }
2330
2331 return nextReady;
2332}
2333
2334bool
2335Cache::sendMSHRQueuePacket(MSHR* mshr)
2336{
2337 assert(mshr);
2338
2339 // use request from 1st target
2340 PacketPtr tgt_pkt = mshr->getTarget()->pkt;
2341
|
2373 DPRINTF(Cache, "%s MSHR %s for addr %#llx size %d\n", __func__,
2374 tgt_pkt->cmdString(), tgt_pkt->getAddr(),
2375 tgt_pkt->getSize());
| 2342 DPRINTF(Cache, "%s: MSHR %s\n", __func__, tgt_pkt->print());
|
2376
2377 CacheBlk *blk = tags->findBlock(mshr->blkAddr, mshr->isSecure);
2378
2379 if (tgt_pkt->cmd == MemCmd::HardPFReq && forwardSnoops) {
2380 // we should never have hardware prefetches to allocated
2381 // blocks
2382 assert(blk == nullptr);
2383
2384 // We need to check the caches above us to verify that
2385 // they don't have a copy of this block in the dirty state
2386 // at the moment. Without this check we could get a stale
2387 // copy from memory that might get used in place of the
2388 // dirty one.
2389 Packet snoop_pkt(tgt_pkt, true, false);
2390 snoop_pkt.setExpressSnoop();
2391 // We are sending this packet upwards, but if it hits we will
2392 // get a snoop response that we end up treating just like a
2393 // normal response, hence it needs the MSHR as its sender
2394 // state
2395 snoop_pkt.senderState = mshr;
2396 cpuSidePort->sendTimingSnoopReq(&snoop_pkt);
2397
2398 // Check to see if the prefetch was squashed by an upper cache (to
2399 // prevent us from grabbing the line) or if a Check to see if a
2400 // writeback arrived between the time the prefetch was placed in
2401 // the MSHRs and when it was selected to be sent or if the
2402 // prefetch was squashed by an upper cache.
2403
2404 // It is important to check cacheResponding before
2405 // prefetchSquashed. If another cache has committed to
2406 // responding, it will be sending a dirty response which will
2407 // arrive at the MSHR allocated for this request. Checking the
2408 // prefetchSquash first may result in the MSHR being
2409 // prematurely deallocated.
2410 if (snoop_pkt.cacheResponding()) {
2411 auto M5_VAR_USED r = outstandingSnoop.insert(snoop_pkt.req);
2412 assert(r.second);
2413
2414 // if we are getting a snoop response with no sharers it
2415 // will be allocated as Modified
2416 bool pending_modified_resp = !snoop_pkt.hasSharers();
2417 markInService(mshr, pending_modified_resp);
2418
2419 DPRINTF(Cache, "Upward snoop of prefetch for addr"
2420 " %#x (%s) hit\n",
2421 tgt_pkt->getAddr(), tgt_pkt->isSecure()? "s": "ns");
2422 return false;
2423 }
2424
2425 if (snoop_pkt.isBlockCached()) {
2426 DPRINTF(Cache, "Block present, prefetch squashed by cache. "
2427 "Deallocating mshr target %#x.\n",
2428 mshr->blkAddr);
2429
2430 // Deallocate the mshr target
2431 if (mshrQueue.forceDeallocateTarget(mshr)) {
2432 // Clear block if this deallocation resulted freed an
2433 // mshr when all had previously been utilized
2434 clearBlocked(Blocked_NoMSHRs);
2435 }
2436 return false;
2437 }
2438 }
2439
2440 // either a prefetch that is not present upstream, or a normal
2441 // MSHR request, proceed to get the packet to send downstream
2442 PacketPtr pkt = createMissPacket(tgt_pkt, blk, mshr->needsWritable());
2443
2444 mshr->isForward = (pkt == nullptr);
2445
2446 if (mshr->isForward) {
2447 // not a cache block request, but a response is expected
2448 // make copy of current packet to forward, keep current
2449 // copy for response handling
2450 pkt = new Packet(tgt_pkt, false, true);
2451 assert(!pkt->isWrite());
2452 }
2453
2454 // play it safe and append (rather than set) the sender state,
2455 // as forwarded packets may already have existing state
2456 pkt->pushSenderState(mshr);
2457
2458 if (!memSidePort->sendTimingReq(pkt)) {
2459 // we are awaiting a retry, but we
2460 // delete the packet and will be creating a new packet
2461 // when we get the opportunity
2462 delete pkt;
2463
2464 // note that we have now masked any requestBus and
2465 // schedSendEvent (we will wait for a retry before
2466 // doing anything), and this is so even if we do not
2467 // care about this packet and might override it before
2468 // it gets retried
2469 return true;
2470 } else {
2471 // As part of the call to sendTimingReq the packet is
2472 // forwarded to all neighbouring caches (and any caches
2473 // above them) as a snoop. Thus at this point we know if
2474 // any of the neighbouring caches are responding, and if
2475 // so, we know it is dirty, and we can determine if it is
2476 // being passed as Modified, making our MSHR the ordering
2477 // point
2478 bool pending_modified_resp = !pkt->hasSharers() &&
2479 pkt->cacheResponding();
2480 markInService(mshr, pending_modified_resp);
2481 return false;
2482 }
2483}
2484
2485bool
2486Cache::sendWriteQueuePacket(WriteQueueEntry* wq_entry)
2487{
2488 assert(wq_entry);
2489
2490 // always a single target for write queue entries
2491 PacketPtr tgt_pkt = wq_entry->getTarget()->pkt;
2492
| 2343
2344 CacheBlk *blk = tags->findBlock(mshr->blkAddr, mshr->isSecure);
2345
2346 if (tgt_pkt->cmd == MemCmd::HardPFReq && forwardSnoops) {
2347 // we should never have hardware prefetches to allocated
2348 // blocks
2349 assert(blk == nullptr);
2350
2351 // We need to check the caches above us to verify that
2352 // they don't have a copy of this block in the dirty state
2353 // at the moment. Without this check we could get a stale
2354 // copy from memory that might get used in place of the
2355 // dirty one.
2356 Packet snoop_pkt(tgt_pkt, true, false);
2357 snoop_pkt.setExpressSnoop();
2358 // We are sending this packet upwards, but if it hits we will
2359 // get a snoop response that we end up treating just like a
2360 // normal response, hence it needs the MSHR as its sender
2361 // state
2362 snoop_pkt.senderState = mshr;
2363 cpuSidePort->sendTimingSnoopReq(&snoop_pkt);
2364
2365 // Check to see if the prefetch was squashed by an upper cache (to
2366 // prevent us from grabbing the line) or if a Check to see if a
2367 // writeback arrived between the time the prefetch was placed in
2368 // the MSHRs and when it was selected to be sent or if the
2369 // prefetch was squashed by an upper cache.
2370
2371 // It is important to check cacheResponding before
2372 // prefetchSquashed. If another cache has committed to
2373 // responding, it will be sending a dirty response which will
2374 // arrive at the MSHR allocated for this request. Checking the
2375 // prefetchSquash first may result in the MSHR being
2376 // prematurely deallocated.
2377 if (snoop_pkt.cacheResponding()) {
2378 auto M5_VAR_USED r = outstandingSnoop.insert(snoop_pkt.req);
2379 assert(r.second);
2380
2381 // if we are getting a snoop response with no sharers it
2382 // will be allocated as Modified
2383 bool pending_modified_resp = !snoop_pkt.hasSharers();
2384 markInService(mshr, pending_modified_resp);
2385
2386 DPRINTF(Cache, "Upward snoop of prefetch for addr"
2387 " %#x (%s) hit\n",
2388 tgt_pkt->getAddr(), tgt_pkt->isSecure()? "s": "ns");
2389 return false;
2390 }
2391
2392 if (snoop_pkt.isBlockCached()) {
2393 DPRINTF(Cache, "Block present, prefetch squashed by cache. "
2394 "Deallocating mshr target %#x.\n",
2395 mshr->blkAddr);
2396
2397 // Deallocate the mshr target
2398 if (mshrQueue.forceDeallocateTarget(mshr)) {
2399 // Clear block if this deallocation resulted freed an
2400 // mshr when all had previously been utilized
2401 clearBlocked(Blocked_NoMSHRs);
2402 }
2403 return false;
2404 }
2405 }
2406
2407 // either a prefetch that is not present upstream, or a normal
2408 // MSHR request, proceed to get the packet to send downstream
2409 PacketPtr pkt = createMissPacket(tgt_pkt, blk, mshr->needsWritable());
2410
2411 mshr->isForward = (pkt == nullptr);
2412
2413 if (mshr->isForward) {
2414 // not a cache block request, but a response is expected
2415 // make copy of current packet to forward, keep current
2416 // copy for response handling
2417 pkt = new Packet(tgt_pkt, false, true);
2418 assert(!pkt->isWrite());
2419 }
2420
2421 // play it safe and append (rather than set) the sender state,
2422 // as forwarded packets may already have existing state
2423 pkt->pushSenderState(mshr);
2424
2425 if (!memSidePort->sendTimingReq(pkt)) {
2426 // we are awaiting a retry, but we
2427 // delete the packet and will be creating a new packet
2428 // when we get the opportunity
2429 delete pkt;
2430
2431 // note that we have now masked any requestBus and
2432 // schedSendEvent (we will wait for a retry before
2433 // doing anything), and this is so even if we do not
2434 // care about this packet and might override it before
2435 // it gets retried
2436 return true;
2437 } else {
2438 // As part of the call to sendTimingReq the packet is
2439 // forwarded to all neighbouring caches (and any caches
2440 // above them) as a snoop. Thus at this point we know if
2441 // any of the neighbouring caches are responding, and if
2442 // so, we know it is dirty, and we can determine if it is
2443 // being passed as Modified, making our MSHR the ordering
2444 // point
2445 bool pending_modified_resp = !pkt->hasSharers() &&
2446 pkt->cacheResponding();
2447 markInService(mshr, pending_modified_resp);
2448 return false;
2449 }
2450}
2451
2452bool
2453Cache::sendWriteQueuePacket(WriteQueueEntry* wq_entry)
2454{
2455 assert(wq_entry);
2456
2457 // always a single target for write queue entries
2458 PacketPtr tgt_pkt = wq_entry->getTarget()->pkt;
2459
|
2493 DPRINTF(Cache, "%s write %s for addr %#llx size %d\n", __func__,
2494 tgt_pkt->cmdString(), tgt_pkt->getAddr(),
2495 tgt_pkt->getSize());
| 2460 DPRINTF(Cache, "%s: write %s\n", __func__, tgt_pkt->print());
|
2496
2497 // forward as is, both for evictions and uncacheable writes
2498 if (!memSidePort->sendTimingReq(tgt_pkt)) {
2499 // note that we have now masked any requestBus and
2500 // schedSendEvent (we will wait for a retry before
2501 // doing anything), and this is so even if we do not
2502 // care about this packet and might override it before
2503 // it gets retried
2504 return true;
2505 } else {
2506 markInService(wq_entry);
2507 return false;
2508 }
2509}
2510
2511void
2512Cache::serialize(CheckpointOut &cp) const
2513{
2514 bool dirty(isDirty());
2515
2516 if (dirty) {
2517 warn("*** The cache still contains dirty data. ***\n");
2518 warn(" Make sure to drain the system using the correct flags.\n");
2519 warn(" This checkpoint will not restore correctly and dirty data "
2520 " in the cache will be lost!\n");
2521 }
2522
2523 // Since we don't checkpoint the data in the cache, any dirty data
2524 // will be lost when restoring from a checkpoint of a system that
2525 // wasn't drained properly. Flag the checkpoint as invalid if the
2526 // cache contains dirty data.
2527 bool bad_checkpoint(dirty);
2528 SERIALIZE_SCALAR(bad_checkpoint);
2529}
2530
2531void
2532Cache::unserialize(CheckpointIn &cp)
2533{
2534 bool bad_checkpoint;
2535 UNSERIALIZE_SCALAR(bad_checkpoint);
2536 if (bad_checkpoint) {
2537 fatal("Restoring from checkpoints with dirty caches is not supported "
2538 "in the classic memory system. Please remove any caches or "
2539 " drain them properly before taking checkpoints.\n");
2540 }
2541}
2542
2543///////////////
2544//
2545// CpuSidePort
2546//
2547///////////////
2548
2549AddrRangeList
2550Cache::CpuSidePort::getAddrRanges() const
2551{
2552 return cache->getAddrRanges();
2553}
2554
2555bool
2556Cache::CpuSidePort::recvTimingReq(PacketPtr pkt)
2557{
2558 assert(!cache->system->bypassCaches());
2559
2560 bool success = false;
2561
2562 // always let express snoop packets through if even if blocked
2563 if (pkt->isExpressSnoop()) {
2564 // do not change the current retry state
2565 bool M5_VAR_USED bypass_success = cache->recvTimingReq(pkt);
2566 assert(bypass_success);
2567 return true;
2568 } else if (blocked || mustSendRetry) {
2569 // either already committed to send a retry, or blocked
2570 success = false;
2571 } else {
2572 // pass it on to the cache, and let the cache decide if we
2573 // have to retry or not
2574 success = cache->recvTimingReq(pkt);
2575 }
2576
2577 // remember if we have to retry
2578 mustSendRetry = !success;
2579 return success;
2580}
2581
2582Tick
2583Cache::CpuSidePort::recvAtomic(PacketPtr pkt)
2584{
2585 return cache->recvAtomic(pkt);
2586}
2587
2588void
2589Cache::CpuSidePort::recvFunctional(PacketPtr pkt)
2590{
2591 // functional request
2592 cache->functionalAccess(pkt, true);
2593}
2594
2595Cache::
2596CpuSidePort::CpuSidePort(const std::string &_name, Cache *_cache,
2597 const std::string &_label)
2598 : BaseCache::CacheSlavePort(_name, _cache, _label), cache(_cache)
2599{
2600}
2601
2602Cache*
2603CacheParams::create()
2604{
2605 assert(tags);
2606
2607 return new Cache(this);
2608}
2609///////////////
2610//
2611// MemSidePort
2612//
2613///////////////
2614
2615bool
2616Cache::MemSidePort::recvTimingResp(PacketPtr pkt)
2617{
2618 cache->recvTimingResp(pkt);
2619 return true;
2620}
2621
2622// Express snooping requests to memside port
2623void
2624Cache::MemSidePort::recvTimingSnoopReq(PacketPtr pkt)
2625{
2626 // handle snooping requests
2627 cache->recvTimingSnoopReq(pkt);
2628}
2629
2630Tick
2631Cache::MemSidePort::recvAtomicSnoop(PacketPtr pkt)
2632{
2633 return cache->recvAtomicSnoop(pkt);
2634}
2635
2636void
2637Cache::MemSidePort::recvFunctionalSnoop(PacketPtr pkt)
2638{
2639 // functional snoop (note that in contrast to atomic we don't have
2640 // a specific functionalSnoop method, as they have the same
2641 // behaviour regardless)
2642 cache->functionalAccess(pkt, false);
2643}
2644
2645void
2646Cache::CacheReqPacketQueue::sendDeferredPacket()
2647{
2648 // sanity check
2649 assert(!waitingOnRetry);
2650
2651 // there should never be any deferred request packets in the
2652 // queue, instead we resly on the cache to provide the packets
2653 // from the MSHR queue or write queue
2654 assert(deferredPacketReadyTime() == MaxTick);
2655
2656 // check for request packets (requests & writebacks)
2657 QueueEntry* entry = cache.getNextQueueEntry();
2658
2659 if (!entry) {
2660 // can happen if e.g. we attempt a writeback and fail, but
2661 // before the retry, the writeback is eliminated because
2662 // we snoop another cache's ReadEx.
2663 } else {
2664 // let our snoop responses go first if there are responses to
2665 // the same addresses
2666 if (checkConflictingSnoop(entry->blkAddr)) {
2667 return;
2668 }
2669 waitingOnRetry = entry->sendPacket(cache);
2670 }
2671
2672 // if we succeeded and are not waiting for a retry, schedule the
2673 // next send considering when the next queue is ready, note that
2674 // snoop responses have their own packet queue and thus schedule
2675 // their own events
2676 if (!waitingOnRetry) {
2677 schedSendEvent(cache.nextQueueReadyTime());
2678 }
2679}
2680
2681Cache::
2682MemSidePort::MemSidePort(const std::string &_name, Cache *_cache,
2683 const std::string &_label)
2684 : BaseCache::CacheMasterPort(_name, _cache, _reqQueue, _snoopRespQueue),
2685 _reqQueue(*_cache, *this, _snoopRespQueue, _label),
2686 _snoopRespQueue(*_cache, *this, _label), cache(_cache)
2687{
2688}
| 2461
2462 // forward as is, both for evictions and uncacheable writes
2463 if (!memSidePort->sendTimingReq(tgt_pkt)) {
2464 // note that we have now masked any requestBus and
2465 // schedSendEvent (we will wait for a retry before
2466 // doing anything), and this is so even if we do not
2467 // care about this packet and might override it before
2468 // it gets retried
2469 return true;
2470 } else {
2471 markInService(wq_entry);
2472 return false;
2473 }
2474}
2475
2476void
2477Cache::serialize(CheckpointOut &cp) const
2478{
2479 bool dirty(isDirty());
2480
2481 if (dirty) {
2482 warn("*** The cache still contains dirty data. ***\n");
2483 warn(" Make sure to drain the system using the correct flags.\n");
2484 warn(" This checkpoint will not restore correctly and dirty data "
2485 " in the cache will be lost!\n");
2486 }
2487
2488 // Since we don't checkpoint the data in the cache, any dirty data
2489 // will be lost when restoring from a checkpoint of a system that
2490 // wasn't drained properly. Flag the checkpoint as invalid if the
2491 // cache contains dirty data.
2492 bool bad_checkpoint(dirty);
2493 SERIALIZE_SCALAR(bad_checkpoint);
2494}
2495
2496void
2497Cache::unserialize(CheckpointIn &cp)
2498{
2499 bool bad_checkpoint;
2500 UNSERIALIZE_SCALAR(bad_checkpoint);
2501 if (bad_checkpoint) {
2502 fatal("Restoring from checkpoints with dirty caches is not supported "
2503 "in the classic memory system. Please remove any caches or "
2504 " drain them properly before taking checkpoints.\n");
2505 }
2506}
2507
2508///////////////
2509//
2510// CpuSidePort
2511//
2512///////////////
2513
2514AddrRangeList
2515Cache::CpuSidePort::getAddrRanges() const
2516{
2517 return cache->getAddrRanges();
2518}
2519
2520bool
2521Cache::CpuSidePort::recvTimingReq(PacketPtr pkt)
2522{
2523 assert(!cache->system->bypassCaches());
2524
2525 bool success = false;
2526
2527 // always let express snoop packets through if even if blocked
2528 if (pkt->isExpressSnoop()) {
2529 // do not change the current retry state
2530 bool M5_VAR_USED bypass_success = cache->recvTimingReq(pkt);
2531 assert(bypass_success);
2532 return true;
2533 } else if (blocked || mustSendRetry) {
2534 // either already committed to send a retry, or blocked
2535 success = false;
2536 } else {
2537 // pass it on to the cache, and let the cache decide if we
2538 // have to retry or not
2539 success = cache->recvTimingReq(pkt);
2540 }
2541
2542 // remember if we have to retry
2543 mustSendRetry = !success;
2544 return success;
2545}
2546
2547Tick
2548Cache::CpuSidePort::recvAtomic(PacketPtr pkt)
2549{
2550 return cache->recvAtomic(pkt);
2551}
2552
2553void
2554Cache::CpuSidePort::recvFunctional(PacketPtr pkt)
2555{
2556 // functional request
2557 cache->functionalAccess(pkt, true);
2558}
2559
2560Cache::
2561CpuSidePort::CpuSidePort(const std::string &_name, Cache *_cache,
2562 const std::string &_label)
2563 : BaseCache::CacheSlavePort(_name, _cache, _label), cache(_cache)
2564{
2565}
2566
2567Cache*
2568CacheParams::create()
2569{
2570 assert(tags);
2571
2572 return new Cache(this);
2573}
2574///////////////
2575//
2576// MemSidePort
2577//
2578///////////////
2579
2580bool
2581Cache::MemSidePort::recvTimingResp(PacketPtr pkt)
2582{
2583 cache->recvTimingResp(pkt);
2584 return true;
2585}
2586
2587// Express snooping requests to memside port
2588void
2589Cache::MemSidePort::recvTimingSnoopReq(PacketPtr pkt)
2590{
2591 // handle snooping requests
2592 cache->recvTimingSnoopReq(pkt);
2593}
2594
2595Tick
2596Cache::MemSidePort::recvAtomicSnoop(PacketPtr pkt)
2597{
2598 return cache->recvAtomicSnoop(pkt);
2599}
2600
2601void
2602Cache::MemSidePort::recvFunctionalSnoop(PacketPtr pkt)
2603{
2604 // functional snoop (note that in contrast to atomic we don't have
2605 // a specific functionalSnoop method, as they have the same
2606 // behaviour regardless)
2607 cache->functionalAccess(pkt, false);
2608}
2609
2610void
2611Cache::CacheReqPacketQueue::sendDeferredPacket()
2612{
2613 // sanity check
2614 assert(!waitingOnRetry);
2615
2616 // there should never be any deferred request packets in the
2617 // queue, instead we resly on the cache to provide the packets
2618 // from the MSHR queue or write queue
2619 assert(deferredPacketReadyTime() == MaxTick);
2620
2621 // check for request packets (requests & writebacks)
2622 QueueEntry* entry = cache.getNextQueueEntry();
2623
2624 if (!entry) {
2625 // can happen if e.g. we attempt a writeback and fail, but
2626 // before the retry, the writeback is eliminated because
2627 // we snoop another cache's ReadEx.
2628 } else {
2629 // let our snoop responses go first if there are responses to
2630 // the same addresses
2631 if (checkConflictingSnoop(entry->blkAddr)) {
2632 return;
2633 }
2634 waitingOnRetry = entry->sendPacket(cache);
2635 }
2636
2637 // if we succeeded and are not waiting for a retry, schedule the
2638 // next send considering when the next queue is ready, note that
2639 // snoop responses have their own packet queue and thus schedule
2640 // their own events
2641 if (!waitingOnRetry) {
2642 schedSendEvent(cache.nextQueueReadyTime());
2643 }
2644}
2645
2646Cache::
2647MemSidePort::MemSidePort(const std::string &_name, Cache *_cache,
2648 const std::string &_label)
2649 : BaseCache::CacheMasterPort(_name, _cache, _reqQueue, _snoopRespQueue),
2650 _reqQueue(*_cache, *this, _snoopRespQueue, _label),
2651 _snoopRespQueue(*_cache, *this, _label), cache(_cache)
2652{
2653}
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