1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Erik Hallnor
42 * Dave Greene
43 * Nathan Binkert
44 * Steve Reinhardt
45 * Ron Dreslinski
46 * Andreas Sandberg
47 */
48
49/**
50 * @file
51 * Cache definitions.
52 */
53
54#include "mem/cache/cache.hh"
55
56#include "base/misc.hh"
57#include "base/types.hh"
58#include "debug/Cache.hh"
59#include "debug/CachePort.hh"
60#include "debug/CacheTags.hh"
61#include "debug/CacheVerbose.hh"
62#include "mem/cache/blk.hh"
63#include "mem/cache/mshr.hh"
64#include "mem/cache/prefetch/base.hh"
65#include "sim/sim_exit.hh"
66
67Cache::Cache(const CacheParams *p)
68 : BaseCache(p, p->system->cacheLineSize()),
69 tags(p->tags),
70 prefetcher(p->prefetcher),
71 doFastWrites(true),
72 prefetchOnAccess(p->prefetch_on_access),
73 clusivity(p->clusivity),
74 writebackClean(p->writeback_clean),
75 tempBlockWriteback(nullptr),
76 writebackTempBlockAtomicEvent(this, false,
77 EventBase::Delayed_Writeback_Pri)
78{
79 tempBlock = new CacheBlk();
80 tempBlock->data = new uint8_t[blkSize];
81
82 cpuSidePort = new CpuSidePort(p->name + ".cpu_side", this,
83 "CpuSidePort");
84 memSidePort = new MemSidePort(p->name + ".mem_side", this,
85 "MemSidePort");
86
87 tags->setCache(this);
88 if (prefetcher)
89 prefetcher->setCache(this);
90}
91
92Cache::~Cache()
93{
94 delete [] tempBlock->data;
95 delete tempBlock;
96
97 delete cpuSidePort;
98 delete memSidePort;
99}
100
101void
102Cache::regStats()
103{
104 BaseCache::regStats();
105}
106
107void
108Cache::cmpAndSwap(CacheBlk *blk, PacketPtr pkt)
109{
110 assert(pkt->isRequest());
111
112 uint64_t overwrite_val;
113 bool overwrite_mem;
114 uint64_t condition_val64;
115 uint32_t condition_val32;
116
117 int offset = tags->extractBlkOffset(pkt->getAddr());
118 uint8_t *blk_data = blk->data + offset;
119
120 assert(sizeof(uint64_t) >= pkt->getSize());
121
122 overwrite_mem = true;
123 // keep a copy of our possible write value, and copy what is at the
124 // memory address into the packet
125 pkt->writeData((uint8_t *)&overwrite_val);
126 pkt->setData(blk_data);
127
128 if (pkt->req->isCondSwap()) {
129 if (pkt->getSize() == sizeof(uint64_t)) {
130 condition_val64 = pkt->req->getExtraData();
131 overwrite_mem = !std::memcmp(&condition_val64, blk_data,
132 sizeof(uint64_t));
133 } else if (pkt->getSize() == sizeof(uint32_t)) {
134 condition_val32 = (uint32_t)pkt->req->getExtraData();
135 overwrite_mem = !std::memcmp(&condition_val32, blk_data,
136 sizeof(uint32_t));
137 } else
138 panic("Invalid size for conditional read/write\n");
139 }
140
141 if (overwrite_mem) {
142 std::memcpy(blk_data, &overwrite_val, pkt->getSize());
143 blk->status |= BlkDirty;
144 }
145}
146
147
148void
149Cache::satisfyRequest(PacketPtr pkt, CacheBlk *blk,
150 bool deferred_response, bool pending_downgrade)
151{
152 assert(pkt->isRequest());
153
154 assert(blk && blk->isValid());
155 // Occasionally this is not true... if we are a lower-level cache
156 // satisfying a string of Read and ReadEx requests from
157 // upper-level caches, a Read will mark the block as shared but we
158 // can satisfy a following ReadEx anyway since we can rely on the
159 // Read requester(s) to have buffered the ReadEx snoop and to
160 // invalidate their blocks after receiving them.
161 // assert(!pkt->needsWritable() || blk->isWritable());
162 assert(pkt->getOffset(blkSize) + pkt->getSize() <= blkSize);
163
164 // Check RMW operations first since both isRead() and
165 // isWrite() will be true for them
166 if (pkt->cmd == MemCmd::SwapReq) {
167 cmpAndSwap(blk, pkt);
168 } else if (pkt->isWrite()) {
169 // we have the block in a writable state and can go ahead,
170 // note that the line may be also be considered writable in
171 // downstream caches along the path to memory, but always
172 // Exclusive, and never Modified
173 assert(blk->isWritable());
174 // Write or WriteLine at the first cache with block in writable state
175 if (blk->checkWrite(pkt)) {
176 pkt->writeDataToBlock(blk->data, blkSize);
177 }
178 // Always mark the line as dirty (and thus transition to the
179 // Modified state) even if we are a failed StoreCond so we
180 // supply data to any snoops that have appended themselves to
181 // this cache before knowing the store will fail.
182 blk->status |= BlkDirty;
183 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d (write)\n",
184 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize());
185 } else if (pkt->isRead()) {
186 if (pkt->isLLSC()) {
187 blk->trackLoadLocked(pkt);
188 }
189
190 // all read responses have a data payload
191 assert(pkt->hasRespData());
192 pkt->setDataFromBlock(blk->data, blkSize);
193
194 // determine if this read is from a (coherent) cache or not
195 if (pkt->fromCache()) {
196 assert(pkt->getSize() == blkSize);
197 // special handling for coherent block requests from
198 // upper-level caches
199 if (pkt->needsWritable()) {
200 // sanity check
201 assert(pkt->cmd == MemCmd::ReadExReq ||
202 pkt->cmd == MemCmd::SCUpgradeFailReq);
203 assert(!pkt->hasSharers());
204
205 // if we have a dirty copy, make sure the recipient
206 // keeps it marked dirty (in the modified state)
207 if (blk->isDirty()) {
208 pkt->setCacheResponding();
209 blk->status &= ~BlkDirty;
210 }
211 } else if (blk->isWritable() && !pending_downgrade &&
212 !pkt->hasSharers() &&
213 pkt->cmd != MemCmd::ReadCleanReq) {
214 // we can give the requester a writable copy on a read
215 // request if:
216 // - we have a writable copy at this level (& below)
217 // - we don't have a pending snoop from below
218 // signaling another read request
219 // - no other cache above has a copy (otherwise it
220 // would have set hasSharers flag when
221 // snooping the packet)
222 // - the read has explicitly asked for a clean
223 // copy of the line
224 if (blk->isDirty()) {
225 // special considerations if we're owner:
226 if (!deferred_response) {
227 // respond with the line in Modified state
228 // (cacheResponding set, hasSharers not set)
229 pkt->setCacheResponding();
230
231 // if this cache is mostly inclusive, we
232 // keep the block in the Exclusive state,
233 // and pass it upwards as Modified
234 // (writable and dirty), hence we have
235 // multiple caches, all on the same path
236 // towards memory, all considering the
237 // same block writable, but only one
238 // considering it Modified
239
240 // we get away with multiple caches (on
241 // the same path to memory) considering
242 // the block writeable as we always enter
243 // the cache hierarchy through a cache,
244 // and first snoop upwards in all other
245 // branches
246 blk->status &= ~BlkDirty;
247 } else {
248 // if we're responding after our own miss,
249 // there's a window where the recipient didn't
250 // know it was getting ownership and may not
251 // have responded to snoops correctly, so we
252 // have to respond with a shared line
253 pkt->setHasSharers();
254 }
255 }
256 } else {
257 // otherwise only respond with a shared copy
258 pkt->setHasSharers();
259 }
260 }
261 } else if (pkt->isUpgrade()) {
262 // sanity check
263 assert(!pkt->hasSharers());
264
265 if (blk->isDirty()) {
266 // we were in the Owned state, and a cache above us that
267 // has the line in Shared state needs to be made aware
268 // that the data it already has is in fact dirty
269 pkt->setCacheResponding();
270 blk->status &= ~BlkDirty;
271 }
272 } else {
273 assert(pkt->isInvalidate());
274 invalidateBlock(blk);
275 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d (invalidation)\n",
276 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize());
277 }
278}
279
280/////////////////////////////////////////////////////
281//
282// Access path: requests coming in from the CPU side
283//
284/////////////////////////////////////////////////////
285
286bool
287Cache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat,
288 PacketList &writebacks)
289{
290 // sanity check
291 assert(pkt->isRequest());
292
293 chatty_assert(!(isReadOnly && pkt->isWrite()),
294 "Should never see a write in a read-only cache %s\n",
295 name());
296
297 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d\n", __func__,
298 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
299
300 if (pkt->req->isUncacheable()) {
301 DPRINTF(Cache, "%s%s addr %#llx uncacheable\n", pkt->cmdString(),
302 pkt->req->isInstFetch() ? " (ifetch)" : "",
303 pkt->getAddr());
304
305 // flush and invalidate any existing block
306 CacheBlk *old_blk(tags->findBlock(pkt->getAddr(), pkt->isSecure()));
307 if (old_blk && old_blk->isValid()) {
308 if (old_blk->isDirty() || writebackClean)
309 writebacks.push_back(writebackBlk(old_blk));
310 else
311 writebacks.push_back(cleanEvictBlk(old_blk));
312 tags->invalidate(old_blk);
313 old_blk->invalidate();
314 }
315
316 blk = nullptr;
317 // lookupLatency is the latency in case the request is uncacheable.
318 lat = lookupLatency;
319 return false;
320 }
321
322 ContextID id = pkt->req->hasContextId() ?
323 pkt->req->contextId() : InvalidContextID;
324 // Here lat is the value passed as parameter to accessBlock() function
325 // that can modify its value.
326 blk = tags->accessBlock(pkt->getAddr(), pkt->isSecure(), lat, id);
327
328 DPRINTF(Cache, "%s%s addr %#llx size %d (%s) %s\n", pkt->cmdString(),
329 pkt->req->isInstFetch() ? " (ifetch)" : "",
330 pkt->getAddr(), pkt->getSize(), pkt->isSecure() ? "s" : "ns",
331 blk ? "hit " + blk->print() : "miss");
332
333
334 if (pkt->isEviction()) {
335 // We check for presence of block in above caches before issuing
336 // Writeback or CleanEvict to write buffer. Therefore the only
337 // possible cases can be of a CleanEvict packet coming from above
338 // encountering a Writeback generated in this cache peer cache and
339 // waiting in the write buffer. Cases of upper level peer caches
340 // generating CleanEvict and Writeback or simply CleanEvict and
341 // CleanEvict almost simultaneously will be caught by snoops sent out
342 // by crossbar.
343 WriteQueueEntry *wb_entry = writeBuffer.findMatch(pkt->getAddr(),
344 pkt->isSecure());
345 if (wb_entry) {
346 assert(wb_entry->getNumTargets() == 1);
347 PacketPtr wbPkt = wb_entry->getTarget()->pkt;
348 assert(wbPkt->isWriteback());
349
350 if (pkt->isCleanEviction()) {
351 // The CleanEvict and WritebackClean snoops into other
352 // peer caches of the same level while traversing the
353 // crossbar. If a copy of the block is found, the
354 // packet is deleted in the crossbar. Hence, none of
355 // the other upper level caches connected to this
356 // cache have the block, so we can clear the
357 // BLOCK_CACHED flag in the Writeback if set and
358 // discard the CleanEvict by returning true.
359 wbPkt->clearBlockCached();
360 return true;
361 } else {
362 assert(pkt->cmd == MemCmd::WritebackDirty);
363 // Dirty writeback from above trumps our clean
364 // writeback... discard here
365 // Note: markInService will remove entry from writeback buffer.
366 markInService(wb_entry);
367 delete wbPkt;
368 }
369 }
370 }
371
372 // Writeback handling is special case. We can write the block into
373 // the cache without having a writeable copy (or any copy at all).
374 if (pkt->isWriteback()) {
375 assert(blkSize == pkt->getSize());
376
377 // we could get a clean writeback while we are having
378 // outstanding accesses to a block, do the simple thing for
379 // now and drop the clean writeback so that we do not upset
380 // any ordering/decisions about ownership already taken
381 if (pkt->cmd == MemCmd::WritebackClean &&
382 mshrQueue.findMatch(pkt->getAddr(), pkt->isSecure())) {
383 DPRINTF(Cache, "Clean writeback %#llx to block with MSHR, "
384 "dropping\n", pkt->getAddr());
385 return true;
386 }
387
388 if (blk == nullptr) {
389 // need to do a replacement
390 blk = allocateBlock(pkt->getAddr(), pkt->isSecure(), writebacks);
391 if (blk == nullptr) {
392 // no replaceable block available: give up, fwd to next level.
393 incMissCount(pkt);
394 return false;
395 }
396 tags->insertBlock(pkt, blk);
397
398 blk->status = (BlkValid | BlkReadable);
399 if (pkt->isSecure()) {
400 blk->status |= BlkSecure;
401 }
402 }
403 // only mark the block dirty if we got a writeback command,
404 // and leave it as is for a clean writeback
405 if (pkt->cmd == MemCmd::WritebackDirty) {
406 blk->status |= BlkDirty;
407 }
408 // if the packet does not have sharers, it is passing
409 // writable, and we got the writeback in Modified or Exclusive
410 // state, if not we are in the Owned or Shared state
411 if (!pkt->hasSharers()) {
412 blk->status |= BlkWritable;
413 }
414 // nothing else to do; writeback doesn't expect response
415 assert(!pkt->needsResponse());
416 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize);
417 DPRINTF(Cache, "%s new state is %s\n", __func__, blk->print());
418 incHitCount(pkt);
419 return true;
420 } else if (pkt->cmd == MemCmd::CleanEvict) {
421 if (blk != nullptr) {
422 // Found the block in the tags, need to stop CleanEvict from
423 // propagating further down the hierarchy. Returning true will
424 // treat the CleanEvict like a satisfied write request and delete
425 // it.
426 return true;
427 }
428 // We didn't find the block here, propagate the CleanEvict further
429 // down the memory hierarchy. Returning false will treat the CleanEvict
430 // like a Writeback which could not find a replaceable block so has to
431 // go to next level.
432 return false;
433 } else if (blk && (pkt->needsWritable() ? blk->isWritable() :
434 blk->isReadable())) {
435 // OK to satisfy access
436 incHitCount(pkt);
437 satisfyRequest(pkt, blk);
438 maintainClusivity(pkt->fromCache(), blk);
439
440 return true;
441 }
442
443 // Can't satisfy access normally... either no block (blk == nullptr)
444 // or have block but need writable
445
446 incMissCount(pkt);
447
448 if (blk == nullptr && pkt->isLLSC() && pkt->isWrite()) {
449 // complete miss on store conditional... just give up now
450 pkt->req->setExtraData(0);
451 return true;
452 }
453
454 return false;
455}
456
457void
458Cache::maintainClusivity(bool from_cache, CacheBlk *blk)
459{
460 if (from_cache && blk && blk->isValid() && !blk->isDirty() &&
461 clusivity == Enums::mostly_excl) {
462 // if we have responded to a cache, and our block is still
463 // valid, but not dirty, and this cache is mostly exclusive
464 // with respect to the cache above, drop the block
465 invalidateBlock(blk);
466 }
467}
468
469void
470Cache::doWritebacks(PacketList& writebacks, Tick forward_time)
471{
472 while (!writebacks.empty()) {
473 PacketPtr wbPkt = writebacks.front();
474 // We use forwardLatency here because we are copying writebacks to
475 // write buffer. Call isCachedAbove for both Writebacks and
476 // CleanEvicts. If isCachedAbove returns true we set BLOCK_CACHED flag
477 // in Writebacks and discard CleanEvicts.
478 if (isCachedAbove(wbPkt)) {
479 if (wbPkt->cmd == MemCmd::CleanEvict) {
480 // Delete CleanEvict because cached copies exist above. The
481 // packet destructor will delete the request object because
482 // this is a non-snoop request packet which does not require a
483 // response.
484 delete wbPkt;
485 } else if (wbPkt->cmd == MemCmd::WritebackClean) {
486 // clean writeback, do not send since the block is
487 // still cached above
488 assert(writebackClean);
489 delete wbPkt;
490 } else {
491 assert(wbPkt->cmd == MemCmd::WritebackDirty);
492 // Set BLOCK_CACHED flag in Writeback and send below, so that
493 // the Writeback does not reset the bit corresponding to this
494 // address in the snoop filter below.
495 wbPkt->setBlockCached();
496 allocateWriteBuffer(wbPkt, forward_time);
497 }
498 } else {
499 // If the block is not cached above, send packet below. Both
500 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
501 // reset the bit corresponding to this address in the snoop filter
502 // below.
503 allocateWriteBuffer(wbPkt, forward_time);
504 }
505 writebacks.pop_front();
506 }
507}
508
509void
510Cache::doWritebacksAtomic(PacketList& writebacks)
511{
512 while (!writebacks.empty()) {
513 PacketPtr wbPkt = writebacks.front();
514 // Call isCachedAbove for both Writebacks and CleanEvicts. If
515 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks
516 // and discard CleanEvicts.
517 if (isCachedAbove(wbPkt, false)) {
518 if (wbPkt->cmd == MemCmd::WritebackDirty) {
519 // Set BLOCK_CACHED flag in Writeback and send below,
520 // so that the Writeback does not reset the bit
521 // corresponding to this address in the snoop filter
522 // below. We can discard CleanEvicts because cached
523 // copies exist above. Atomic mode isCachedAbove
524 // modifies packet to set BLOCK_CACHED flag
525 memSidePort->sendAtomic(wbPkt);
526 }
527 } else {
528 // If the block is not cached above, send packet below. Both
529 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
530 // reset the bit corresponding to this address in the snoop filter
531 // below.
532 memSidePort->sendAtomic(wbPkt);
533 }
534 writebacks.pop_front();
535 // In case of CleanEvicts, the packet destructor will delete the
536 // request object because this is a non-snoop request packet which
537 // does not require a response.
538 delete wbPkt;
539 }
540}
541
542
543void
544Cache::recvTimingSnoopResp(PacketPtr pkt)
545{
546 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__,
547 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
548
549 assert(pkt->isResponse());
550 assert(!system->bypassCaches());
551
552 // determine if the response is from a snoop request we created
553 // (in which case it should be in the outstandingSnoop), or if we
554 // merely forwarded someone else's snoop request
555 const bool forwardAsSnoop = outstandingSnoop.find(pkt->req) ==
556 outstandingSnoop.end();
557
558 if (!forwardAsSnoop) {
559 // the packet came from this cache, so sink it here and do not
560 // forward it
561 assert(pkt->cmd == MemCmd::HardPFResp);
562
563 outstandingSnoop.erase(pkt->req);
564
565 DPRINTF(Cache, "Got prefetch response from above for addr "
566 "%#llx (%s)\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
567 recvTimingResp(pkt);
568 return;
569 }
570
571 // forwardLatency is set here because there is a response from an
572 // upper level cache.
573 // To pay the delay that occurs if the packet comes from the bus,
574 // we charge also headerDelay.
575 Tick snoop_resp_time = clockEdge(forwardLatency) + pkt->headerDelay;
576 // Reset the timing of the packet.
577 pkt->headerDelay = pkt->payloadDelay = 0;
578 memSidePort->schedTimingSnoopResp(pkt, snoop_resp_time);
579}
580
581void
582Cache::promoteWholeLineWrites(PacketPtr pkt)
583{
584 // Cache line clearing instructions
585 if (doFastWrites && (pkt->cmd == MemCmd::WriteReq) &&
586 (pkt->getSize() == blkSize) && (pkt->getOffset(blkSize) == 0)) {
587 pkt->cmd = MemCmd::WriteLineReq;
588 DPRINTF(Cache, "packet promoted from Write to WriteLineReq\n");
589 }
590}
591
592bool
593Cache::recvTimingReq(PacketPtr pkt)
594{
595 DPRINTF(CacheTags, "%s tags: %s\n", __func__, tags->print());
596
597 assert(pkt->isRequest());
598
599 // Just forward the packet if caches are disabled.
600 if (system->bypassCaches()) {
601 // @todo This should really enqueue the packet rather
602 bool M5_VAR_USED success = memSidePort->sendTimingReq(pkt);
603 assert(success);
604 return true;
605 }
606
607 promoteWholeLineWrites(pkt);
608
609 if (pkt->cacheResponding()) {
610 // a cache above us (but not where the packet came from) is
611 // responding to the request, in other words it has the line
612 // in Modified or Owned state
613 DPRINTF(Cache, "Cache above responding to %#llx (%s): "
614 "not responding\n",
615 pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
616
617 // if the packet needs the block to be writable, and the cache
618 // that has promised to respond (setting the cache responding
619 // flag) is not providing writable (it is in Owned rather than
620 // the Modified state), we know that there may be other Shared
621 // copies in the system; go out and invalidate them all
622 assert(pkt->needsWritable() && !pkt->responderHadWritable());
623
624 // an upstream cache that had the line in Owned state
625 // (dirty, but not writable), is responding and thus
626 // transferring the dirty line from one branch of the
627 // cache hierarchy to another
628
629 // send out an express snoop and invalidate all other
630 // copies (snooping a packet that needs writable is the
631 // same as an invalidation), thus turning the Owned line
632 // into a Modified line, note that we don't invalidate the
633 // block in the current cache or any other cache on the
634 // path to memory
635
636 // create a downstream express snoop with cleared packet
637 // flags, there is no need to allocate any data as the
638 // packet is merely used to co-ordinate state transitions
639 Packet *snoop_pkt = new Packet(pkt, true, false);
640
641 // also reset the bus time that the original packet has
642 // not yet paid for
643 snoop_pkt->headerDelay = snoop_pkt->payloadDelay = 0;
644
645 // make this an instantaneous express snoop, and let the
646 // other caches in the system know that the another cache
647 // is responding, because we have found the authorative
648 // copy (Modified or Owned) that will supply the right
649 // data
650 snoop_pkt->setExpressSnoop();
651 snoop_pkt->setCacheResponding();
652
653 // this express snoop travels towards the memory, and at
654 // every crossbar it is snooped upwards thus reaching
655 // every cache in the system
656 bool M5_VAR_USED success = memSidePort->sendTimingReq(snoop_pkt);
657 // express snoops always succeed
658 assert(success);
659
660 // main memory will delete the snoop packet
661
662 // queue for deletion, as opposed to immediate deletion, as
663 // the sending cache is still relying on the packet
664 pendingDelete.reset(pkt);
665
666 // no need to take any further action in this particular cache
667 // as an upstram cache has already committed to responding,
668 // and we have already sent out any express snoops in the
669 // section above to ensure all other copies in the system are
670 // invalidated
671 return true;
672 }
673
674 // anything that is merely forwarded pays for the forward latency and
675 // the delay provided by the crossbar
676 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
677
678 // We use lookupLatency here because it is used to specify the latency
679 // to access.
680 Cycles lat = lookupLatency;
681 CacheBlk *blk = nullptr;
682 bool satisfied = false;
683 {
684 PacketList writebacks;
685 // Note that lat is passed by reference here. The function
686 // access() calls accessBlock() which can modify lat value.
687 satisfied = access(pkt, blk, lat, writebacks);
688
689 // copy writebacks to write buffer here to ensure they logically
690 // proceed anything happening below
691 doWritebacks(writebacks, forward_time);
692 }
693
694 // Here we charge the headerDelay that takes into account the latencies
695 // of the bus, if the packet comes from it.
696 // The latency charged it is just lat that is the value of lookupLatency
697 // modified by access() function, or if not just lookupLatency.
698 // In case of a hit we are neglecting response latency.
699 // In case of a miss we are neglecting forward latency.
700 Tick request_time = clockEdge(lat) + pkt->headerDelay;
701 // Here we reset the timing of the packet.
702 pkt->headerDelay = pkt->payloadDelay = 0;
703
704 // track time of availability of next prefetch, if any
705 Tick next_pf_time = MaxTick;
706
707 bool needsResponse = pkt->needsResponse();
708
709 if (satisfied) {
710 // should never be satisfying an uncacheable access as we
711 // flush and invalidate any existing block as part of the
712 // lookup
713 assert(!pkt->req->isUncacheable());
714
715 // hit (for all other request types)
716
717 if (prefetcher && (prefetchOnAccess ||
718 (blk && blk->wasPrefetched()))) {
719 if (blk)
720 blk->status &= ~BlkHWPrefetched;
721
722 // Don't notify on SWPrefetch
723 if (!pkt->cmd.isSWPrefetch())
724 next_pf_time = prefetcher->notify(pkt);
725 }
726
727 if (needsResponse) {
728 pkt->makeTimingResponse();
729 // @todo: Make someone pay for this
730 pkt->headerDelay = pkt->payloadDelay = 0;
731
732 // In this case we are considering request_time that takes
733 // into account the delay of the xbar, if any, and just
734 // lat, neglecting responseLatency, modelling hit latency
735 // just as lookupLatency or or the value of lat overriden
736 // by access(), that calls accessBlock() function.
737 cpuSidePort->schedTimingResp(pkt, request_time, true);
738 } else {
739 DPRINTF(Cache, "%s satisfied %s addr %#llx, no response needed\n",
740 __func__, pkt->cmdString(), pkt->getAddr());
741
742 // queue the packet for deletion, as the sending cache is
743 // still relying on it; if the block is found in access(),
744 // CleanEvict and Writeback messages will be deleted
745 // here as well
746 pendingDelete.reset(pkt);
747 }
748 } else {
749 // miss
750
751 Addr blk_addr = blockAlign(pkt->getAddr());
752
753 // ignore any existing MSHR if we are dealing with an
754 // uncacheable request
755 MSHR *mshr = pkt->req->isUncacheable() ? nullptr :
756 mshrQueue.findMatch(blk_addr, pkt->isSecure());
757
758 // Software prefetch handling:
759 // To keep the core from waiting on data it won't look at
760 // anyway, send back a response with dummy data. Miss handling
761 // will continue asynchronously. Unfortunately, the core will
762 // insist upon freeing original Packet/Request, so we have to
763 // create a new pair with a different lifecycle. Note that this
764 // processing happens before any MSHR munging on the behalf of
765 // this request because this new Request will be the one stored
766 // into the MSHRs, not the original.
767 if (pkt->cmd.isSWPrefetch()) {
768 assert(needsResponse);
769 assert(pkt->req->hasPaddr());
770 assert(!pkt->req->isUncacheable());
771
772 // There's no reason to add a prefetch as an additional target
773 // to an existing MSHR. If an outstanding request is already
774 // in progress, there is nothing for the prefetch to do.
775 // If this is the case, we don't even create a request at all.
776 PacketPtr pf = nullptr;
777
778 if (!mshr) {
779 // copy the request and create a new SoftPFReq packet
780 RequestPtr req = new Request(pkt->req->getPaddr(),
781 pkt->req->getSize(),
782 pkt->req->getFlags(),
783 pkt->req->masterId());
784 pf = new Packet(req, pkt->cmd);
785 pf->allocate();
786 assert(pf->getAddr() == pkt->getAddr());
787 assert(pf->getSize() == pkt->getSize());
788 }
789
790 pkt->makeTimingResponse();
791
792 // request_time is used here, taking into account lat and the delay
793 // charged if the packet comes from the xbar.
794 cpuSidePort->schedTimingResp(pkt, request_time, true);
795
796 // If an outstanding request is in progress (we found an
797 // MSHR) this is set to null
798 pkt = pf;
799 }
800
801 if (mshr) {
802 /// MSHR hit
803 /// @note writebacks will be checked in getNextMSHR()
804 /// for any conflicting requests to the same block
805
806 //@todo remove hw_pf here
807
808 // Coalesce unless it was a software prefetch (see above).
809 if (pkt) {
810 assert(!pkt->isWriteback());
811 // CleanEvicts corresponding to blocks which have
812 // outstanding requests in MSHRs are simply sunk here
813 if (pkt->cmd == MemCmd::CleanEvict) {
814 pendingDelete.reset(pkt);
815 } else {
816 DPRINTF(Cache, "%s coalescing MSHR for %s addr %#llx "
817 "size %d\n", __func__, pkt->cmdString(),
818 pkt->getAddr(), pkt->getSize());
819
820 assert(pkt->req->masterId() < system->maxMasters());
821 mshr_hits[pkt->cmdToIndex()][pkt->req->masterId()]++;
822 // We use forward_time here because it is the same
823 // considering new targets. We have multiple
824 // requests for the same address here. It
825 // specifies the latency to allocate an internal
826 // buffer and to schedule an event to the queued
827 // port and also takes into account the additional
828 // delay of the xbar.
829 mshr->allocateTarget(pkt, forward_time, order++,
830 allocOnFill(pkt->cmd));
831 if (mshr->getNumTargets() == numTarget) {
832 noTargetMSHR = mshr;
833 setBlocked(Blocked_NoTargets);
834 // need to be careful with this... if this mshr isn't
835 // ready yet (i.e. time > curTick()), we don't want to
836 // move it ahead of mshrs that are ready
837 // mshrQueue.moveToFront(mshr);
838 }
839 }
840 // We should call the prefetcher reguardless if the request is
841 // satisfied or not, reguardless if the request is in the MSHR
842 // or not. The request could be a ReadReq hit, but still not
843 // satisfied (potentially because of a prior write to the same
844 // cache line. So, even when not satisfied, tehre is an MSHR
845 // already allocated for this, we need to let the prefetcher
846 // know about the request
847 if (prefetcher) {
848 // Don't notify on SWPrefetch
849 if (!pkt->cmd.isSWPrefetch())
850 next_pf_time = prefetcher->notify(pkt);
851 }
852 }
853 } else {
854 // no MSHR
855 assert(pkt->req->masterId() < system->maxMasters());
856 if (pkt->req->isUncacheable()) {
857 mshr_uncacheable[pkt->cmdToIndex()][pkt->req->masterId()]++;
858 } else {
859 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++;
860 }
861
862 if (pkt->isEviction() ||
863 (pkt->req->isUncacheable() && pkt->isWrite())) {
864 // We use forward_time here because there is an
865 // uncached memory write, forwarded to WriteBuffer.
866 allocateWriteBuffer(pkt, forward_time);
867 } else {
868 if (blk && blk->isValid()) {
869 // should have flushed and have no valid block
870 assert(!pkt->req->isUncacheable());
871
872 // If we have a write miss to a valid block, we
873 // need to mark the block non-readable. Otherwise
874 // if we allow reads while there's an outstanding
875 // write miss, the read could return stale data
876 // out of the cache block... a more aggressive
877 // system could detect the overlap (if any) and
878 // forward data out of the MSHRs, but we don't do
879 // that yet. Note that we do need to leave the
880 // block valid so that it stays in the cache, in
881 // case we get an upgrade response (and hence no
882 // new data) when the write miss completes.
883 // As long as CPUs do proper store/load forwarding
884 // internally, and have a sufficiently weak memory
885 // model, this is probably unnecessary, but at some
886 // point it must have seemed like we needed it...
887 assert(pkt->needsWritable());
888 assert(!blk->isWritable());
889 blk->status &= ~BlkReadable;
890 }
891 // Here we are using forward_time, modelling the latency of
892 // a miss (outbound) just as forwardLatency, neglecting the
893 // lookupLatency component.
894 allocateMissBuffer(pkt, forward_time);
895 }
896
897 if (prefetcher) {
898 // Don't notify on SWPrefetch
899 if (!pkt->cmd.isSWPrefetch())
900 next_pf_time = prefetcher->notify(pkt);
901 }
902 }
903 }
904
905 if (next_pf_time != MaxTick)
906 schedMemSideSendEvent(next_pf_time);
907
908 return true;
909}
910
911PacketPtr
912Cache::createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk,
913 bool needsWritable) const
914{
915 // should never see evictions here
916 assert(!cpu_pkt->isEviction());
917
918 bool blkValid = blk && blk->isValid();
919
920 if (cpu_pkt->req->isUncacheable() ||
921 (!blkValid && cpu_pkt->isUpgrade())) {
922 // uncacheable requests and upgrades from upper-level caches
923 // that missed completely just go through as is
924 return nullptr;
925 }
926
927 assert(cpu_pkt->needsResponse());
928
929 MemCmd cmd;
930 // @TODO make useUpgrades a parameter.
931 // Note that ownership protocols require upgrade, otherwise a
932 // write miss on a shared owned block will generate a ReadExcl,
933 // which will clobber the owned copy.
934 const bool useUpgrades = true;
935 if (blkValid && useUpgrades) {
936 // only reason to be here is that blk is read only and we need
937 // it to be writable
938 assert(needsWritable);
939 assert(!blk->isWritable());
940 cmd = cpu_pkt->isLLSC() ? MemCmd::SCUpgradeReq : MemCmd::UpgradeReq;
941 } else if (cpu_pkt->cmd == MemCmd::SCUpgradeFailReq ||
942 cpu_pkt->cmd == MemCmd::StoreCondFailReq) {
943 // Even though this SC will fail, we still need to send out the
944 // request and get the data to supply it to other snoopers in the case
945 // where the determination the StoreCond fails is delayed due to
946 // all caches not being on the same local bus.
947 cmd = MemCmd::SCUpgradeFailReq;
948 } else if (cpu_pkt->cmd == MemCmd::WriteLineReq ||
949 cpu_pkt->cmd == MemCmd::InvalidateReq) {
950 // forward as invalidate to all other caches, this gives us
951 // the line in Exclusive state, and invalidates all other
952 // copies
953 cmd = MemCmd::InvalidateReq;
954 } else {
955 // block is invalid
956 cmd = needsWritable ? MemCmd::ReadExReq :
957 (isReadOnly ? MemCmd::ReadCleanReq : MemCmd::ReadSharedReq);
958 }
959 PacketPtr pkt = new Packet(cpu_pkt->req, cmd, blkSize);
960
961 // if there are upstream caches that have already marked the
962 // packet as having sharers (not passing writable), pass that info
963 // downstream
964 if (cpu_pkt->hasSharers() && !needsWritable) {
965 // note that cpu_pkt may have spent a considerable time in the
966 // MSHR queue and that the information could possibly be out
967 // of date, however, there is no harm in conservatively
968 // assuming the block has sharers
969 pkt->setHasSharers();
970 DPRINTF(Cache, "%s passing hasSharers from %s to %s addr %#llx "
971 "size %d\n",
972 __func__, cpu_pkt->cmdString(), pkt->cmdString(),
973 pkt->getAddr(), pkt->getSize());
974 }
975
976 // the packet should be block aligned
977 assert(pkt->getAddr() == blockAlign(pkt->getAddr()));
978
979 pkt->allocate();
980 DPRINTF(Cache, "%s created %s from %s for addr %#llx size %d\n",
981 __func__, pkt->cmdString(), cpu_pkt->cmdString(), pkt->getAddr(),
982 pkt->getSize());
983 return pkt;
984}
985
986
987Tick
988Cache::recvAtomic(PacketPtr pkt)
989{
990 // We are in atomic mode so we pay just for lookupLatency here.
991 Cycles lat = lookupLatency;
992
993 // Forward the request if the system is in cache bypass mode.
994 if (system->bypassCaches())
995 return ticksToCycles(memSidePort->sendAtomic(pkt));
996
997 promoteWholeLineWrites(pkt);
998
999 // follow the same flow as in recvTimingReq, and check if a cache
1000 // above us is responding
1001 if (pkt->cacheResponding()) {
1002 DPRINTF(Cache, "Cache above responding to %#llx (%s): "
1003 "not responding\n",
1004 pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
1005
1006 // if a cache is responding, and it had the line in Owned
1007 // rather than Modified state, we need to invalidate any
1008 // copies that are not on the same path to memory
1009 assert(pkt->needsWritable() && !pkt->responderHadWritable());
1010 lat += ticksToCycles(memSidePort->sendAtomic(pkt));
1011
1012 return lat * clockPeriod();
1013 }
1014
1015 // should assert here that there are no outstanding MSHRs or
1016 // writebacks... that would mean that someone used an atomic
1017 // access in timing mode
1018
1019 CacheBlk *blk = nullptr;
1020 PacketList writebacks;
1021 bool satisfied = access(pkt, blk, lat, writebacks);
1022
1023 // handle writebacks resulting from the access here to ensure they
1024 // logically proceed anything happening below
1025 doWritebacksAtomic(writebacks);
1026
1027 if (!satisfied) {
1028 // MISS
1029
1030 // deal with the packets that go through the write path of
1031 // the cache, i.e. any evictions and uncacheable writes
1032 if (pkt->isEviction() ||
1033 (pkt->req->isUncacheable() && pkt->isWrite())) {
1034 lat += ticksToCycles(memSidePort->sendAtomic(pkt));
1035 return lat * clockPeriod();
1036 }
1037 // only misses left
1038
1039 PacketPtr bus_pkt = createMissPacket(pkt, blk, pkt->needsWritable());
1040
1041 bool is_forward = (bus_pkt == nullptr);
1042
1043 if (is_forward) {
1044 // just forwarding the same request to the next level
1045 // no local cache operation involved
1046 bus_pkt = pkt;
1047 }
1048
1049 DPRINTF(Cache, "Sending an atomic %s for %#llx (%s)\n",
1050 bus_pkt->cmdString(), bus_pkt->getAddr(),
1051 bus_pkt->isSecure() ? "s" : "ns");
1052
1053#if TRACING_ON
1054 CacheBlk::State old_state = blk ? blk->status : 0;
1055#endif
1056
1057 lat += ticksToCycles(memSidePort->sendAtomic(bus_pkt));
1058
1059 bool is_invalidate = bus_pkt->isInvalidate();
1060
1061 // We are now dealing with the response handling
1062 DPRINTF(Cache, "Receive response: %s for addr %#llx (%s) in "
1063 "state %i\n", bus_pkt->cmdString(), bus_pkt->getAddr(),
1064 bus_pkt->isSecure() ? "s" : "ns",
1065 old_state);
1066
1067 // If packet was a forward, the response (if any) is already
1068 // in place in the bus_pkt == pkt structure, so we don't need
1069 // to do anything. Otherwise, use the separate bus_pkt to
1070 // generate response to pkt and then delete it.
1071 if (!is_forward) {
1072 if (pkt->needsResponse()) {
1073 assert(bus_pkt->isResponse());
1074 if (bus_pkt->isError()) {
1075 pkt->makeAtomicResponse();
1076 pkt->copyError(bus_pkt);
1077 } else if (pkt->cmd == MemCmd::WriteLineReq) {
1078 // note the use of pkt, not bus_pkt here.
1079
1080 // write-line request to the cache that promoted
1081 // the write to a whole line
1082 blk = handleFill(pkt, blk, writebacks,
1083 allocOnFill(pkt->cmd));
1084 assert(blk != NULL);
1085 is_invalidate = false;
1086 satisfyRequest(pkt, blk);
1087 } else if (bus_pkt->isRead() ||
1088 bus_pkt->cmd == MemCmd::UpgradeResp) {
1089 // we're updating cache state to allow us to
1090 // satisfy the upstream request from the cache
1091 blk = handleFill(bus_pkt, blk, writebacks,
1092 allocOnFill(pkt->cmd));
1093 satisfyRequest(pkt, blk);
1094 maintainClusivity(pkt->fromCache(), blk);
1095 } else {
1096 // we're satisfying the upstream request without
1097 // modifying cache state, e.g., a write-through
1098 pkt->makeAtomicResponse();
1099 }
1100 }
1101 delete bus_pkt;
1102 }
1103
1104 if (is_invalidate && blk && blk->isValid()) {
1105 invalidateBlock(blk);
1106 }
1107 }
1108
1109 // Note that we don't invoke the prefetcher at all in atomic mode.
1110 // It's not clear how to do it properly, particularly for
1111 // prefetchers that aggressively generate prefetch candidates and
1112 // rely on bandwidth contention to throttle them; these will tend
1113 // to pollute the cache in atomic mode since there is no bandwidth
1114 // contention. If we ever do want to enable prefetching in atomic
1115 // mode, though, this is the place to do it... see timingAccess()
1116 // for an example (though we'd want to issue the prefetch(es)
1117 // immediately rather than calling requestMemSideBus() as we do
1118 // there).
1119
1120 // do any writebacks resulting from the response handling
1121 doWritebacksAtomic(writebacks);
1122
1123 // if we used temp block, check to see if its valid and if so
1124 // clear it out, but only do so after the call to recvAtomic is
1125 // finished so that any downstream observers (such as a snoop
1126 // filter), first see the fill, and only then see the eviction
1127 if (blk == tempBlock && tempBlock->isValid()) {
1128 // the atomic CPU calls recvAtomic for fetch and load/store
1129 // sequentuially, and we may already have a tempBlock
1130 // writeback from the fetch that we have not yet sent
1131 if (tempBlockWriteback) {
1132 // if that is the case, write the prevoius one back, and
1133 // do not schedule any new event
1134 writebackTempBlockAtomic();
1135 } else {
1136 // the writeback/clean eviction happens after the call to
1137 // recvAtomic has finished (but before any successive
1138 // calls), so that the response handling from the fill is
1139 // allowed to happen first
1140 schedule(writebackTempBlockAtomicEvent, curTick());
1141 }
1142
1143 tempBlockWriteback = (blk->isDirty() || writebackClean) ?
1144 writebackBlk(blk) : cleanEvictBlk(blk);
1145 blk->invalidate();
1146 }
1147
1148 if (pkt->needsResponse()) {
1149 pkt->makeAtomicResponse();
1150 }
1151
1152 return lat * clockPeriod();
1153}
1154
1155
1156void
1157Cache::functionalAccess(PacketPtr pkt, bool fromCpuSide)
1158{
1159 if (system->bypassCaches()) {
1160 // Packets from the memory side are snoop request and
1161 // shouldn't happen in bypass mode.
1162 assert(fromCpuSide);
1163
1164 // The cache should be flushed if we are in cache bypass mode,
1165 // so we don't need to check if we need to update anything.
1166 memSidePort->sendFunctional(pkt);
1167 return;
1168 }
1169
1170 Addr blk_addr = blockAlign(pkt->getAddr());
1171 bool is_secure = pkt->isSecure();
1172 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure);
1173 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure);
1174
1175 pkt->pushLabel(name());
1176
1177 CacheBlkPrintWrapper cbpw(blk);
1178
1179 // Note that just because an L2/L3 has valid data doesn't mean an
1180 // L1 doesn't have a more up-to-date modified copy that still
1181 // needs to be found. As a result we always update the request if
1182 // we have it, but only declare it satisfied if we are the owner.
1183
1184 // see if we have data at all (owned or otherwise)
1185 bool have_data = blk && blk->isValid()
1186 && pkt->checkFunctional(&cbpw, blk_addr, is_secure, blkSize,
1187 blk->data);
1188
1189 // data we have is dirty if marked as such or if we have an
1190 // in-service MSHR that is pending a modified line
1191 bool have_dirty =
1192 have_data && (blk->isDirty() ||
1193 (mshr && mshr->inService && mshr->isPendingModified()));
1194
1195 bool done = have_dirty
1196 || cpuSidePort->checkFunctional(pkt)
1197 || mshrQueue.checkFunctional(pkt, blk_addr)
1198 || writeBuffer.checkFunctional(pkt, blk_addr)
1199 || memSidePort->checkFunctional(pkt);
1200
1201 DPRINTF(CacheVerbose, "functional %s %#llx (%s) %s%s%s\n",
1202 pkt->cmdString(), pkt->getAddr(), is_secure ? "s" : "ns",
1203 (blk && blk->isValid()) ? "valid " : "",
1204 have_data ? "data " : "", done ? "done " : "");
1205
1206 // We're leaving the cache, so pop cache->name() label
1207 pkt->popLabel();
1208
1209 if (done) {
1210 pkt->makeResponse();
1211 } else {
1212 // if it came as a request from the CPU side then make sure it
1213 // continues towards the memory side
1214 if (fromCpuSide) {
1215 memSidePort->sendFunctional(pkt);
1216 } else if (cpuSidePort->isSnooping()) {
1217 // if it came from the memory side, it must be a snoop request
1218 // and we should only forward it if we are forwarding snoops
1219 cpuSidePort->sendFunctionalSnoop(pkt);
1220 }
1221 }
1222}
1223
1224
1225/////////////////////////////////////////////////////
1226//
1227// Response handling: responses from the memory side
1228//
1229/////////////////////////////////////////////////////
1230
1231
1232void
1233Cache::handleUncacheableWriteResp(PacketPtr pkt)
1234{
1235 Tick completion_time = clockEdge(responseLatency) +
1236 pkt->headerDelay + pkt->payloadDelay;
1237
1238 // Reset the bus additional time as it is now accounted for
1239 pkt->headerDelay = pkt->payloadDelay = 0;
1240
1241 cpuSidePort->schedTimingResp(pkt, completion_time, true);
1242}
1243
1244void
1245Cache::recvTimingResp(PacketPtr pkt)
1246{
1247 assert(pkt->isResponse());
1248
1249 // all header delay should be paid for by the crossbar, unless
1250 // this is a prefetch response from above
1251 panic_if(pkt->headerDelay != 0 && pkt->cmd != MemCmd::HardPFResp,
1252 "%s saw a non-zero packet delay\n", name());
1253
1254 bool is_error = pkt->isError();
1255
1256 if (is_error) {
1257 DPRINTF(Cache, "Cache received packet with error for addr %#llx (%s), "
1258 "cmd: %s\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns",
1259 pkt->cmdString());
1260 }
1261
1262 DPRINTF(Cache, "Handling response %s for addr %#llx size %d (%s)\n",
1263 pkt->cmdString(), pkt->getAddr(), pkt->getSize(),
1264 pkt->isSecure() ? "s" : "ns");
1265
1266 // if this is a write, we should be looking at an uncacheable
1267 // write
1268 if (pkt->isWrite()) {
1269 assert(pkt->req->isUncacheable());
1270 handleUncacheableWriteResp(pkt);
1271 return;
1272 }
1273
1274 // we have dealt with any (uncacheable) writes above, from here on
1275 // we know we are dealing with an MSHR due to a miss or a prefetch
1276 MSHR *mshr = dynamic_cast<MSHR*>(pkt->popSenderState());
1277 assert(mshr);
1278
1279 if (mshr == noTargetMSHR) {
1280 // we always clear at least one target
1281 clearBlocked(Blocked_NoTargets);
1282 noTargetMSHR = nullptr;
1283 }
1284
1285 // Initial target is used just for stats
1286 MSHR::Target *initial_tgt = mshr->getTarget();
1287 int stats_cmd_idx = initial_tgt->pkt->cmdToIndex();
1288 Tick miss_latency = curTick() - initial_tgt->recvTime;
1289
1290 if (pkt->req->isUncacheable()) {
1291 assert(pkt->req->masterId() < system->maxMasters());
1292 mshr_uncacheable_lat[stats_cmd_idx][pkt->req->masterId()] +=
1293 miss_latency;
1294 } else {
1295 assert(pkt->req->masterId() < system->maxMasters());
1296 mshr_miss_latency[stats_cmd_idx][pkt->req->masterId()] +=
1297 miss_latency;
1298 }
1299
1300 bool wasFull = mshrQueue.isFull();
1301
1302 PacketList writebacks;
1303
1304 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
1305
1306 // upgrade deferred targets if the response has no sharers, and is
1307 // thus passing writable
1308 if (!pkt->hasSharers()) {
1309 mshr->promoteWritable();
1310 }
1311
1312 bool is_fill = !mshr->isForward &&
1313 (pkt->isRead() || pkt->cmd == MemCmd::UpgradeResp);
1314
1315 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
1316
1317 if (is_fill && !is_error) {
1318 DPRINTF(Cache, "Block for addr %#llx being updated in Cache\n",
1319 pkt->getAddr());
1320
| 1/*
2 * Copyright (c) 2010-2016 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Erik Hallnor
42 * Dave Greene
43 * Nathan Binkert
44 * Steve Reinhardt
45 * Ron Dreslinski
46 * Andreas Sandberg
47 */
48
49/**
50 * @file
51 * Cache definitions.
52 */
53
54#include "mem/cache/cache.hh"
55
56#include "base/misc.hh"
57#include "base/types.hh"
58#include "debug/Cache.hh"
59#include "debug/CachePort.hh"
60#include "debug/CacheTags.hh"
61#include "debug/CacheVerbose.hh"
62#include "mem/cache/blk.hh"
63#include "mem/cache/mshr.hh"
64#include "mem/cache/prefetch/base.hh"
65#include "sim/sim_exit.hh"
66
67Cache::Cache(const CacheParams *p)
68 : BaseCache(p, p->system->cacheLineSize()),
69 tags(p->tags),
70 prefetcher(p->prefetcher),
71 doFastWrites(true),
72 prefetchOnAccess(p->prefetch_on_access),
73 clusivity(p->clusivity),
74 writebackClean(p->writeback_clean),
75 tempBlockWriteback(nullptr),
76 writebackTempBlockAtomicEvent(this, false,
77 EventBase::Delayed_Writeback_Pri)
78{
79 tempBlock = new CacheBlk();
80 tempBlock->data = new uint8_t[blkSize];
81
82 cpuSidePort = new CpuSidePort(p->name + ".cpu_side", this,
83 "CpuSidePort");
84 memSidePort = new MemSidePort(p->name + ".mem_side", this,
85 "MemSidePort");
86
87 tags->setCache(this);
88 if (prefetcher)
89 prefetcher->setCache(this);
90}
91
92Cache::~Cache()
93{
94 delete [] tempBlock->data;
95 delete tempBlock;
96
97 delete cpuSidePort;
98 delete memSidePort;
99}
100
101void
102Cache::regStats()
103{
104 BaseCache::regStats();
105}
106
107void
108Cache::cmpAndSwap(CacheBlk *blk, PacketPtr pkt)
109{
110 assert(pkt->isRequest());
111
112 uint64_t overwrite_val;
113 bool overwrite_mem;
114 uint64_t condition_val64;
115 uint32_t condition_val32;
116
117 int offset = tags->extractBlkOffset(pkt->getAddr());
118 uint8_t *blk_data = blk->data + offset;
119
120 assert(sizeof(uint64_t) >= pkt->getSize());
121
122 overwrite_mem = true;
123 // keep a copy of our possible write value, and copy what is at the
124 // memory address into the packet
125 pkt->writeData((uint8_t *)&overwrite_val);
126 pkt->setData(blk_data);
127
128 if (pkt->req->isCondSwap()) {
129 if (pkt->getSize() == sizeof(uint64_t)) {
130 condition_val64 = pkt->req->getExtraData();
131 overwrite_mem = !std::memcmp(&condition_val64, blk_data,
132 sizeof(uint64_t));
133 } else if (pkt->getSize() == sizeof(uint32_t)) {
134 condition_val32 = (uint32_t)pkt->req->getExtraData();
135 overwrite_mem = !std::memcmp(&condition_val32, blk_data,
136 sizeof(uint32_t));
137 } else
138 panic("Invalid size for conditional read/write\n");
139 }
140
141 if (overwrite_mem) {
142 std::memcpy(blk_data, &overwrite_val, pkt->getSize());
143 blk->status |= BlkDirty;
144 }
145}
146
147
148void
149Cache::satisfyRequest(PacketPtr pkt, CacheBlk *blk,
150 bool deferred_response, bool pending_downgrade)
151{
152 assert(pkt->isRequest());
153
154 assert(blk && blk->isValid());
155 // Occasionally this is not true... if we are a lower-level cache
156 // satisfying a string of Read and ReadEx requests from
157 // upper-level caches, a Read will mark the block as shared but we
158 // can satisfy a following ReadEx anyway since we can rely on the
159 // Read requester(s) to have buffered the ReadEx snoop and to
160 // invalidate their blocks after receiving them.
161 // assert(!pkt->needsWritable() || blk->isWritable());
162 assert(pkt->getOffset(blkSize) + pkt->getSize() <= blkSize);
163
164 // Check RMW operations first since both isRead() and
165 // isWrite() will be true for them
166 if (pkt->cmd == MemCmd::SwapReq) {
167 cmpAndSwap(blk, pkt);
168 } else if (pkt->isWrite()) {
169 // we have the block in a writable state and can go ahead,
170 // note that the line may be also be considered writable in
171 // downstream caches along the path to memory, but always
172 // Exclusive, and never Modified
173 assert(blk->isWritable());
174 // Write or WriteLine at the first cache with block in writable state
175 if (blk->checkWrite(pkt)) {
176 pkt->writeDataToBlock(blk->data, blkSize);
177 }
178 // Always mark the line as dirty (and thus transition to the
179 // Modified state) even if we are a failed StoreCond so we
180 // supply data to any snoops that have appended themselves to
181 // this cache before knowing the store will fail.
182 blk->status |= BlkDirty;
183 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d (write)\n",
184 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize());
185 } else if (pkt->isRead()) {
186 if (pkt->isLLSC()) {
187 blk->trackLoadLocked(pkt);
188 }
189
190 // all read responses have a data payload
191 assert(pkt->hasRespData());
192 pkt->setDataFromBlock(blk->data, blkSize);
193
194 // determine if this read is from a (coherent) cache or not
195 if (pkt->fromCache()) {
196 assert(pkt->getSize() == blkSize);
197 // special handling for coherent block requests from
198 // upper-level caches
199 if (pkt->needsWritable()) {
200 // sanity check
201 assert(pkt->cmd == MemCmd::ReadExReq ||
202 pkt->cmd == MemCmd::SCUpgradeFailReq);
203 assert(!pkt->hasSharers());
204
205 // if we have a dirty copy, make sure the recipient
206 // keeps it marked dirty (in the modified state)
207 if (blk->isDirty()) {
208 pkt->setCacheResponding();
209 blk->status &= ~BlkDirty;
210 }
211 } else if (blk->isWritable() && !pending_downgrade &&
212 !pkt->hasSharers() &&
213 pkt->cmd != MemCmd::ReadCleanReq) {
214 // we can give the requester a writable copy on a read
215 // request if:
216 // - we have a writable copy at this level (& below)
217 // - we don't have a pending snoop from below
218 // signaling another read request
219 // - no other cache above has a copy (otherwise it
220 // would have set hasSharers flag when
221 // snooping the packet)
222 // - the read has explicitly asked for a clean
223 // copy of the line
224 if (blk->isDirty()) {
225 // special considerations if we're owner:
226 if (!deferred_response) {
227 // respond with the line in Modified state
228 // (cacheResponding set, hasSharers not set)
229 pkt->setCacheResponding();
230
231 // if this cache is mostly inclusive, we
232 // keep the block in the Exclusive state,
233 // and pass it upwards as Modified
234 // (writable and dirty), hence we have
235 // multiple caches, all on the same path
236 // towards memory, all considering the
237 // same block writable, but only one
238 // considering it Modified
239
240 // we get away with multiple caches (on
241 // the same path to memory) considering
242 // the block writeable as we always enter
243 // the cache hierarchy through a cache,
244 // and first snoop upwards in all other
245 // branches
246 blk->status &= ~BlkDirty;
247 } else {
248 // if we're responding after our own miss,
249 // there's a window where the recipient didn't
250 // know it was getting ownership and may not
251 // have responded to snoops correctly, so we
252 // have to respond with a shared line
253 pkt->setHasSharers();
254 }
255 }
256 } else {
257 // otherwise only respond with a shared copy
258 pkt->setHasSharers();
259 }
260 }
261 } else if (pkt->isUpgrade()) {
262 // sanity check
263 assert(!pkt->hasSharers());
264
265 if (blk->isDirty()) {
266 // we were in the Owned state, and a cache above us that
267 // has the line in Shared state needs to be made aware
268 // that the data it already has is in fact dirty
269 pkt->setCacheResponding();
270 blk->status &= ~BlkDirty;
271 }
272 } else {
273 assert(pkt->isInvalidate());
274 invalidateBlock(blk);
275 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d (invalidation)\n",
276 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize());
277 }
278}
279
280/////////////////////////////////////////////////////
281//
282// Access path: requests coming in from the CPU side
283//
284/////////////////////////////////////////////////////
285
286bool
287Cache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat,
288 PacketList &writebacks)
289{
290 // sanity check
291 assert(pkt->isRequest());
292
293 chatty_assert(!(isReadOnly && pkt->isWrite()),
294 "Should never see a write in a read-only cache %s\n",
295 name());
296
297 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d\n", __func__,
298 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
299
300 if (pkt->req->isUncacheable()) {
301 DPRINTF(Cache, "%s%s addr %#llx uncacheable\n", pkt->cmdString(),
302 pkt->req->isInstFetch() ? " (ifetch)" : "",
303 pkt->getAddr());
304
305 // flush and invalidate any existing block
306 CacheBlk *old_blk(tags->findBlock(pkt->getAddr(), pkt->isSecure()));
307 if (old_blk && old_blk->isValid()) {
308 if (old_blk->isDirty() || writebackClean)
309 writebacks.push_back(writebackBlk(old_blk));
310 else
311 writebacks.push_back(cleanEvictBlk(old_blk));
312 tags->invalidate(old_blk);
313 old_blk->invalidate();
314 }
315
316 blk = nullptr;
317 // lookupLatency is the latency in case the request is uncacheable.
318 lat = lookupLatency;
319 return false;
320 }
321
322 ContextID id = pkt->req->hasContextId() ?
323 pkt->req->contextId() : InvalidContextID;
324 // Here lat is the value passed as parameter to accessBlock() function
325 // that can modify its value.
326 blk = tags->accessBlock(pkt->getAddr(), pkt->isSecure(), lat, id);
327
328 DPRINTF(Cache, "%s%s addr %#llx size %d (%s) %s\n", pkt->cmdString(),
329 pkt->req->isInstFetch() ? " (ifetch)" : "",
330 pkt->getAddr(), pkt->getSize(), pkt->isSecure() ? "s" : "ns",
331 blk ? "hit " + blk->print() : "miss");
332
333
334 if (pkt->isEviction()) {
335 // We check for presence of block in above caches before issuing
336 // Writeback or CleanEvict to write buffer. Therefore the only
337 // possible cases can be of a CleanEvict packet coming from above
338 // encountering a Writeback generated in this cache peer cache and
339 // waiting in the write buffer. Cases of upper level peer caches
340 // generating CleanEvict and Writeback or simply CleanEvict and
341 // CleanEvict almost simultaneously will be caught by snoops sent out
342 // by crossbar.
343 WriteQueueEntry *wb_entry = writeBuffer.findMatch(pkt->getAddr(),
344 pkt->isSecure());
345 if (wb_entry) {
346 assert(wb_entry->getNumTargets() == 1);
347 PacketPtr wbPkt = wb_entry->getTarget()->pkt;
348 assert(wbPkt->isWriteback());
349
350 if (pkt->isCleanEviction()) {
351 // The CleanEvict and WritebackClean snoops into other
352 // peer caches of the same level while traversing the
353 // crossbar. If a copy of the block is found, the
354 // packet is deleted in the crossbar. Hence, none of
355 // the other upper level caches connected to this
356 // cache have the block, so we can clear the
357 // BLOCK_CACHED flag in the Writeback if set and
358 // discard the CleanEvict by returning true.
359 wbPkt->clearBlockCached();
360 return true;
361 } else {
362 assert(pkt->cmd == MemCmd::WritebackDirty);
363 // Dirty writeback from above trumps our clean
364 // writeback... discard here
365 // Note: markInService will remove entry from writeback buffer.
366 markInService(wb_entry);
367 delete wbPkt;
368 }
369 }
370 }
371
372 // Writeback handling is special case. We can write the block into
373 // the cache without having a writeable copy (or any copy at all).
374 if (pkt->isWriteback()) {
375 assert(blkSize == pkt->getSize());
376
377 // we could get a clean writeback while we are having
378 // outstanding accesses to a block, do the simple thing for
379 // now and drop the clean writeback so that we do not upset
380 // any ordering/decisions about ownership already taken
381 if (pkt->cmd == MemCmd::WritebackClean &&
382 mshrQueue.findMatch(pkt->getAddr(), pkt->isSecure())) {
383 DPRINTF(Cache, "Clean writeback %#llx to block with MSHR, "
384 "dropping\n", pkt->getAddr());
385 return true;
386 }
387
388 if (blk == nullptr) {
389 // need to do a replacement
390 blk = allocateBlock(pkt->getAddr(), pkt->isSecure(), writebacks);
391 if (blk == nullptr) {
392 // no replaceable block available: give up, fwd to next level.
393 incMissCount(pkt);
394 return false;
395 }
396 tags->insertBlock(pkt, blk);
397
398 blk->status = (BlkValid | BlkReadable);
399 if (pkt->isSecure()) {
400 blk->status |= BlkSecure;
401 }
402 }
403 // only mark the block dirty if we got a writeback command,
404 // and leave it as is for a clean writeback
405 if (pkt->cmd == MemCmd::WritebackDirty) {
406 blk->status |= BlkDirty;
407 }
408 // if the packet does not have sharers, it is passing
409 // writable, and we got the writeback in Modified or Exclusive
410 // state, if not we are in the Owned or Shared state
411 if (!pkt->hasSharers()) {
412 blk->status |= BlkWritable;
413 }
414 // nothing else to do; writeback doesn't expect response
415 assert(!pkt->needsResponse());
416 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize);
417 DPRINTF(Cache, "%s new state is %s\n", __func__, blk->print());
418 incHitCount(pkt);
419 return true;
420 } else if (pkt->cmd == MemCmd::CleanEvict) {
421 if (blk != nullptr) {
422 // Found the block in the tags, need to stop CleanEvict from
423 // propagating further down the hierarchy. Returning true will
424 // treat the CleanEvict like a satisfied write request and delete
425 // it.
426 return true;
427 }
428 // We didn't find the block here, propagate the CleanEvict further
429 // down the memory hierarchy. Returning false will treat the CleanEvict
430 // like a Writeback which could not find a replaceable block so has to
431 // go to next level.
432 return false;
433 } else if (blk && (pkt->needsWritable() ? blk->isWritable() :
434 blk->isReadable())) {
435 // OK to satisfy access
436 incHitCount(pkt);
437 satisfyRequest(pkt, blk);
438 maintainClusivity(pkt->fromCache(), blk);
439
440 return true;
441 }
442
443 // Can't satisfy access normally... either no block (blk == nullptr)
444 // or have block but need writable
445
446 incMissCount(pkt);
447
448 if (blk == nullptr && pkt->isLLSC() && pkt->isWrite()) {
449 // complete miss on store conditional... just give up now
450 pkt->req->setExtraData(0);
451 return true;
452 }
453
454 return false;
455}
456
457void
458Cache::maintainClusivity(bool from_cache, CacheBlk *blk)
459{
460 if (from_cache && blk && blk->isValid() && !blk->isDirty() &&
461 clusivity == Enums::mostly_excl) {
462 // if we have responded to a cache, and our block is still
463 // valid, but not dirty, and this cache is mostly exclusive
464 // with respect to the cache above, drop the block
465 invalidateBlock(blk);
466 }
467}
468
469void
470Cache::doWritebacks(PacketList& writebacks, Tick forward_time)
471{
472 while (!writebacks.empty()) {
473 PacketPtr wbPkt = writebacks.front();
474 // We use forwardLatency here because we are copying writebacks to
475 // write buffer. Call isCachedAbove for both Writebacks and
476 // CleanEvicts. If isCachedAbove returns true we set BLOCK_CACHED flag
477 // in Writebacks and discard CleanEvicts.
478 if (isCachedAbove(wbPkt)) {
479 if (wbPkt->cmd == MemCmd::CleanEvict) {
480 // Delete CleanEvict because cached copies exist above. The
481 // packet destructor will delete the request object because
482 // this is a non-snoop request packet which does not require a
483 // response.
484 delete wbPkt;
485 } else if (wbPkt->cmd == MemCmd::WritebackClean) {
486 // clean writeback, do not send since the block is
487 // still cached above
488 assert(writebackClean);
489 delete wbPkt;
490 } else {
491 assert(wbPkt->cmd == MemCmd::WritebackDirty);
492 // Set BLOCK_CACHED flag in Writeback and send below, so that
493 // the Writeback does not reset the bit corresponding to this
494 // address in the snoop filter below.
495 wbPkt->setBlockCached();
496 allocateWriteBuffer(wbPkt, forward_time);
497 }
498 } else {
499 // If the block is not cached above, send packet below. Both
500 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
501 // reset the bit corresponding to this address in the snoop filter
502 // below.
503 allocateWriteBuffer(wbPkt, forward_time);
504 }
505 writebacks.pop_front();
506 }
507}
508
509void
510Cache::doWritebacksAtomic(PacketList& writebacks)
511{
512 while (!writebacks.empty()) {
513 PacketPtr wbPkt = writebacks.front();
514 // Call isCachedAbove for both Writebacks and CleanEvicts. If
515 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks
516 // and discard CleanEvicts.
517 if (isCachedAbove(wbPkt, false)) {
518 if (wbPkt->cmd == MemCmd::WritebackDirty) {
519 // Set BLOCK_CACHED flag in Writeback and send below,
520 // so that the Writeback does not reset the bit
521 // corresponding to this address in the snoop filter
522 // below. We can discard CleanEvicts because cached
523 // copies exist above. Atomic mode isCachedAbove
524 // modifies packet to set BLOCK_CACHED flag
525 memSidePort->sendAtomic(wbPkt);
526 }
527 } else {
528 // If the block is not cached above, send packet below. Both
529 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
530 // reset the bit corresponding to this address in the snoop filter
531 // below.
532 memSidePort->sendAtomic(wbPkt);
533 }
534 writebacks.pop_front();
535 // In case of CleanEvicts, the packet destructor will delete the
536 // request object because this is a non-snoop request packet which
537 // does not require a response.
538 delete wbPkt;
539 }
540}
541
542
543void
544Cache::recvTimingSnoopResp(PacketPtr pkt)
545{
546 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__,
547 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
548
549 assert(pkt->isResponse());
550 assert(!system->bypassCaches());
551
552 // determine if the response is from a snoop request we created
553 // (in which case it should be in the outstandingSnoop), or if we
554 // merely forwarded someone else's snoop request
555 const bool forwardAsSnoop = outstandingSnoop.find(pkt->req) ==
556 outstandingSnoop.end();
557
558 if (!forwardAsSnoop) {
559 // the packet came from this cache, so sink it here and do not
560 // forward it
561 assert(pkt->cmd == MemCmd::HardPFResp);
562
563 outstandingSnoop.erase(pkt->req);
564
565 DPRINTF(Cache, "Got prefetch response from above for addr "
566 "%#llx (%s)\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
567 recvTimingResp(pkt);
568 return;
569 }
570
571 // forwardLatency is set here because there is a response from an
572 // upper level cache.
573 // To pay the delay that occurs if the packet comes from the bus,
574 // we charge also headerDelay.
575 Tick snoop_resp_time = clockEdge(forwardLatency) + pkt->headerDelay;
576 // Reset the timing of the packet.
577 pkt->headerDelay = pkt->payloadDelay = 0;
578 memSidePort->schedTimingSnoopResp(pkt, snoop_resp_time);
579}
580
581void
582Cache::promoteWholeLineWrites(PacketPtr pkt)
583{
584 // Cache line clearing instructions
585 if (doFastWrites && (pkt->cmd == MemCmd::WriteReq) &&
586 (pkt->getSize() == blkSize) && (pkt->getOffset(blkSize) == 0)) {
587 pkt->cmd = MemCmd::WriteLineReq;
588 DPRINTF(Cache, "packet promoted from Write to WriteLineReq\n");
589 }
590}
591
592bool
593Cache::recvTimingReq(PacketPtr pkt)
594{
595 DPRINTF(CacheTags, "%s tags: %s\n", __func__, tags->print());
596
597 assert(pkt->isRequest());
598
599 // Just forward the packet if caches are disabled.
600 if (system->bypassCaches()) {
601 // @todo This should really enqueue the packet rather
602 bool M5_VAR_USED success = memSidePort->sendTimingReq(pkt);
603 assert(success);
604 return true;
605 }
606
607 promoteWholeLineWrites(pkt);
608
609 if (pkt->cacheResponding()) {
610 // a cache above us (but not where the packet came from) is
611 // responding to the request, in other words it has the line
612 // in Modified or Owned state
613 DPRINTF(Cache, "Cache above responding to %#llx (%s): "
614 "not responding\n",
615 pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
616
617 // if the packet needs the block to be writable, and the cache
618 // that has promised to respond (setting the cache responding
619 // flag) is not providing writable (it is in Owned rather than
620 // the Modified state), we know that there may be other Shared
621 // copies in the system; go out and invalidate them all
622 assert(pkt->needsWritable() && !pkt->responderHadWritable());
623
624 // an upstream cache that had the line in Owned state
625 // (dirty, but not writable), is responding and thus
626 // transferring the dirty line from one branch of the
627 // cache hierarchy to another
628
629 // send out an express snoop and invalidate all other
630 // copies (snooping a packet that needs writable is the
631 // same as an invalidation), thus turning the Owned line
632 // into a Modified line, note that we don't invalidate the
633 // block in the current cache or any other cache on the
634 // path to memory
635
636 // create a downstream express snoop with cleared packet
637 // flags, there is no need to allocate any data as the
638 // packet is merely used to co-ordinate state transitions
639 Packet *snoop_pkt = new Packet(pkt, true, false);
640
641 // also reset the bus time that the original packet has
642 // not yet paid for
643 snoop_pkt->headerDelay = snoop_pkt->payloadDelay = 0;
644
645 // make this an instantaneous express snoop, and let the
646 // other caches in the system know that the another cache
647 // is responding, because we have found the authorative
648 // copy (Modified or Owned) that will supply the right
649 // data
650 snoop_pkt->setExpressSnoop();
651 snoop_pkt->setCacheResponding();
652
653 // this express snoop travels towards the memory, and at
654 // every crossbar it is snooped upwards thus reaching
655 // every cache in the system
656 bool M5_VAR_USED success = memSidePort->sendTimingReq(snoop_pkt);
657 // express snoops always succeed
658 assert(success);
659
660 // main memory will delete the snoop packet
661
662 // queue for deletion, as opposed to immediate deletion, as
663 // the sending cache is still relying on the packet
664 pendingDelete.reset(pkt);
665
666 // no need to take any further action in this particular cache
667 // as an upstram cache has already committed to responding,
668 // and we have already sent out any express snoops in the
669 // section above to ensure all other copies in the system are
670 // invalidated
671 return true;
672 }
673
674 // anything that is merely forwarded pays for the forward latency and
675 // the delay provided by the crossbar
676 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
677
678 // We use lookupLatency here because it is used to specify the latency
679 // to access.
680 Cycles lat = lookupLatency;
681 CacheBlk *blk = nullptr;
682 bool satisfied = false;
683 {
684 PacketList writebacks;
685 // Note that lat is passed by reference here. The function
686 // access() calls accessBlock() which can modify lat value.
687 satisfied = access(pkt, blk, lat, writebacks);
688
689 // copy writebacks to write buffer here to ensure they logically
690 // proceed anything happening below
691 doWritebacks(writebacks, forward_time);
692 }
693
694 // Here we charge the headerDelay that takes into account the latencies
695 // of the bus, if the packet comes from it.
696 // The latency charged it is just lat that is the value of lookupLatency
697 // modified by access() function, or if not just lookupLatency.
698 // In case of a hit we are neglecting response latency.
699 // In case of a miss we are neglecting forward latency.
700 Tick request_time = clockEdge(lat) + pkt->headerDelay;
701 // Here we reset the timing of the packet.
702 pkt->headerDelay = pkt->payloadDelay = 0;
703
704 // track time of availability of next prefetch, if any
705 Tick next_pf_time = MaxTick;
706
707 bool needsResponse = pkt->needsResponse();
708
709 if (satisfied) {
710 // should never be satisfying an uncacheable access as we
711 // flush and invalidate any existing block as part of the
712 // lookup
713 assert(!pkt->req->isUncacheable());
714
715 // hit (for all other request types)
716
717 if (prefetcher && (prefetchOnAccess ||
718 (blk && blk->wasPrefetched()))) {
719 if (blk)
720 blk->status &= ~BlkHWPrefetched;
721
722 // Don't notify on SWPrefetch
723 if (!pkt->cmd.isSWPrefetch())
724 next_pf_time = prefetcher->notify(pkt);
725 }
726
727 if (needsResponse) {
728 pkt->makeTimingResponse();
729 // @todo: Make someone pay for this
730 pkt->headerDelay = pkt->payloadDelay = 0;
731
732 // In this case we are considering request_time that takes
733 // into account the delay of the xbar, if any, and just
734 // lat, neglecting responseLatency, modelling hit latency
735 // just as lookupLatency or or the value of lat overriden
736 // by access(), that calls accessBlock() function.
737 cpuSidePort->schedTimingResp(pkt, request_time, true);
738 } else {
739 DPRINTF(Cache, "%s satisfied %s addr %#llx, no response needed\n",
740 __func__, pkt->cmdString(), pkt->getAddr());
741
742 // queue the packet for deletion, as the sending cache is
743 // still relying on it; if the block is found in access(),
744 // CleanEvict and Writeback messages will be deleted
745 // here as well
746 pendingDelete.reset(pkt);
747 }
748 } else {
749 // miss
750
751 Addr blk_addr = blockAlign(pkt->getAddr());
752
753 // ignore any existing MSHR if we are dealing with an
754 // uncacheable request
755 MSHR *mshr = pkt->req->isUncacheable() ? nullptr :
756 mshrQueue.findMatch(blk_addr, pkt->isSecure());
757
758 // Software prefetch handling:
759 // To keep the core from waiting on data it won't look at
760 // anyway, send back a response with dummy data. Miss handling
761 // will continue asynchronously. Unfortunately, the core will
762 // insist upon freeing original Packet/Request, so we have to
763 // create a new pair with a different lifecycle. Note that this
764 // processing happens before any MSHR munging on the behalf of
765 // this request because this new Request will be the one stored
766 // into the MSHRs, not the original.
767 if (pkt->cmd.isSWPrefetch()) {
768 assert(needsResponse);
769 assert(pkt->req->hasPaddr());
770 assert(!pkt->req->isUncacheable());
771
772 // There's no reason to add a prefetch as an additional target
773 // to an existing MSHR. If an outstanding request is already
774 // in progress, there is nothing for the prefetch to do.
775 // If this is the case, we don't even create a request at all.
776 PacketPtr pf = nullptr;
777
778 if (!mshr) {
779 // copy the request and create a new SoftPFReq packet
780 RequestPtr req = new Request(pkt->req->getPaddr(),
781 pkt->req->getSize(),
782 pkt->req->getFlags(),
783 pkt->req->masterId());
784 pf = new Packet(req, pkt->cmd);
785 pf->allocate();
786 assert(pf->getAddr() == pkt->getAddr());
787 assert(pf->getSize() == pkt->getSize());
788 }
789
790 pkt->makeTimingResponse();
791
792 // request_time is used here, taking into account lat and the delay
793 // charged if the packet comes from the xbar.
794 cpuSidePort->schedTimingResp(pkt, request_time, true);
795
796 // If an outstanding request is in progress (we found an
797 // MSHR) this is set to null
798 pkt = pf;
799 }
800
801 if (mshr) {
802 /// MSHR hit
803 /// @note writebacks will be checked in getNextMSHR()
804 /// for any conflicting requests to the same block
805
806 //@todo remove hw_pf here
807
808 // Coalesce unless it was a software prefetch (see above).
809 if (pkt) {
810 assert(!pkt->isWriteback());
811 // CleanEvicts corresponding to blocks which have
812 // outstanding requests in MSHRs are simply sunk here
813 if (pkt->cmd == MemCmd::CleanEvict) {
814 pendingDelete.reset(pkt);
815 } else {
816 DPRINTF(Cache, "%s coalescing MSHR for %s addr %#llx "
817 "size %d\n", __func__, pkt->cmdString(),
818 pkt->getAddr(), pkt->getSize());
819
820 assert(pkt->req->masterId() < system->maxMasters());
821 mshr_hits[pkt->cmdToIndex()][pkt->req->masterId()]++;
822 // We use forward_time here because it is the same
823 // considering new targets. We have multiple
824 // requests for the same address here. It
825 // specifies the latency to allocate an internal
826 // buffer and to schedule an event to the queued
827 // port and also takes into account the additional
828 // delay of the xbar.
829 mshr->allocateTarget(pkt, forward_time, order++,
830 allocOnFill(pkt->cmd));
831 if (mshr->getNumTargets() == numTarget) {
832 noTargetMSHR = mshr;
833 setBlocked(Blocked_NoTargets);
834 // need to be careful with this... if this mshr isn't
835 // ready yet (i.e. time > curTick()), we don't want to
836 // move it ahead of mshrs that are ready
837 // mshrQueue.moveToFront(mshr);
838 }
839 }
840 // We should call the prefetcher reguardless if the request is
841 // satisfied or not, reguardless if the request is in the MSHR
842 // or not. The request could be a ReadReq hit, but still not
843 // satisfied (potentially because of a prior write to the same
844 // cache line. So, even when not satisfied, tehre is an MSHR
845 // already allocated for this, we need to let the prefetcher
846 // know about the request
847 if (prefetcher) {
848 // Don't notify on SWPrefetch
849 if (!pkt->cmd.isSWPrefetch())
850 next_pf_time = prefetcher->notify(pkt);
851 }
852 }
853 } else {
854 // no MSHR
855 assert(pkt->req->masterId() < system->maxMasters());
856 if (pkt->req->isUncacheable()) {
857 mshr_uncacheable[pkt->cmdToIndex()][pkt->req->masterId()]++;
858 } else {
859 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++;
860 }
861
862 if (pkt->isEviction() ||
863 (pkt->req->isUncacheable() && pkt->isWrite())) {
864 // We use forward_time here because there is an
865 // uncached memory write, forwarded to WriteBuffer.
866 allocateWriteBuffer(pkt, forward_time);
867 } else {
868 if (blk && blk->isValid()) {
869 // should have flushed and have no valid block
870 assert(!pkt->req->isUncacheable());
871
872 // If we have a write miss to a valid block, we
873 // need to mark the block non-readable. Otherwise
874 // if we allow reads while there's an outstanding
875 // write miss, the read could return stale data
876 // out of the cache block... a more aggressive
877 // system could detect the overlap (if any) and
878 // forward data out of the MSHRs, but we don't do
879 // that yet. Note that we do need to leave the
880 // block valid so that it stays in the cache, in
881 // case we get an upgrade response (and hence no
882 // new data) when the write miss completes.
883 // As long as CPUs do proper store/load forwarding
884 // internally, and have a sufficiently weak memory
885 // model, this is probably unnecessary, but at some
886 // point it must have seemed like we needed it...
887 assert(pkt->needsWritable());
888 assert(!blk->isWritable());
889 blk->status &= ~BlkReadable;
890 }
891 // Here we are using forward_time, modelling the latency of
892 // a miss (outbound) just as forwardLatency, neglecting the
893 // lookupLatency component.
894 allocateMissBuffer(pkt, forward_time);
895 }
896
897 if (prefetcher) {
898 // Don't notify on SWPrefetch
899 if (!pkt->cmd.isSWPrefetch())
900 next_pf_time = prefetcher->notify(pkt);
901 }
902 }
903 }
904
905 if (next_pf_time != MaxTick)
906 schedMemSideSendEvent(next_pf_time);
907
908 return true;
909}
910
911PacketPtr
912Cache::createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk,
913 bool needsWritable) const
914{
915 // should never see evictions here
916 assert(!cpu_pkt->isEviction());
917
918 bool blkValid = blk && blk->isValid();
919
920 if (cpu_pkt->req->isUncacheable() ||
921 (!blkValid && cpu_pkt->isUpgrade())) {
922 // uncacheable requests and upgrades from upper-level caches
923 // that missed completely just go through as is
924 return nullptr;
925 }
926
927 assert(cpu_pkt->needsResponse());
928
929 MemCmd cmd;
930 // @TODO make useUpgrades a parameter.
931 // Note that ownership protocols require upgrade, otherwise a
932 // write miss on a shared owned block will generate a ReadExcl,
933 // which will clobber the owned copy.
934 const bool useUpgrades = true;
935 if (blkValid && useUpgrades) {
936 // only reason to be here is that blk is read only and we need
937 // it to be writable
938 assert(needsWritable);
939 assert(!blk->isWritable());
940 cmd = cpu_pkt->isLLSC() ? MemCmd::SCUpgradeReq : MemCmd::UpgradeReq;
941 } else if (cpu_pkt->cmd == MemCmd::SCUpgradeFailReq ||
942 cpu_pkt->cmd == MemCmd::StoreCondFailReq) {
943 // Even though this SC will fail, we still need to send out the
944 // request and get the data to supply it to other snoopers in the case
945 // where the determination the StoreCond fails is delayed due to
946 // all caches not being on the same local bus.
947 cmd = MemCmd::SCUpgradeFailReq;
948 } else if (cpu_pkt->cmd == MemCmd::WriteLineReq ||
949 cpu_pkt->cmd == MemCmd::InvalidateReq) {
950 // forward as invalidate to all other caches, this gives us
951 // the line in Exclusive state, and invalidates all other
952 // copies
953 cmd = MemCmd::InvalidateReq;
954 } else {
955 // block is invalid
956 cmd = needsWritable ? MemCmd::ReadExReq :
957 (isReadOnly ? MemCmd::ReadCleanReq : MemCmd::ReadSharedReq);
958 }
959 PacketPtr pkt = new Packet(cpu_pkt->req, cmd, blkSize);
960
961 // if there are upstream caches that have already marked the
962 // packet as having sharers (not passing writable), pass that info
963 // downstream
964 if (cpu_pkt->hasSharers() && !needsWritable) {
965 // note that cpu_pkt may have spent a considerable time in the
966 // MSHR queue and that the information could possibly be out
967 // of date, however, there is no harm in conservatively
968 // assuming the block has sharers
969 pkt->setHasSharers();
970 DPRINTF(Cache, "%s passing hasSharers from %s to %s addr %#llx "
971 "size %d\n",
972 __func__, cpu_pkt->cmdString(), pkt->cmdString(),
973 pkt->getAddr(), pkt->getSize());
974 }
975
976 // the packet should be block aligned
977 assert(pkt->getAddr() == blockAlign(pkt->getAddr()));
978
979 pkt->allocate();
980 DPRINTF(Cache, "%s created %s from %s for addr %#llx size %d\n",
981 __func__, pkt->cmdString(), cpu_pkt->cmdString(), pkt->getAddr(),
982 pkt->getSize());
983 return pkt;
984}
985
986
987Tick
988Cache::recvAtomic(PacketPtr pkt)
989{
990 // We are in atomic mode so we pay just for lookupLatency here.
991 Cycles lat = lookupLatency;
992
993 // Forward the request if the system is in cache bypass mode.
994 if (system->bypassCaches())
995 return ticksToCycles(memSidePort->sendAtomic(pkt));
996
997 promoteWholeLineWrites(pkt);
998
999 // follow the same flow as in recvTimingReq, and check if a cache
1000 // above us is responding
1001 if (pkt->cacheResponding()) {
1002 DPRINTF(Cache, "Cache above responding to %#llx (%s): "
1003 "not responding\n",
1004 pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
1005
1006 // if a cache is responding, and it had the line in Owned
1007 // rather than Modified state, we need to invalidate any
1008 // copies that are not on the same path to memory
1009 assert(pkt->needsWritable() && !pkt->responderHadWritable());
1010 lat += ticksToCycles(memSidePort->sendAtomic(pkt));
1011
1012 return lat * clockPeriod();
1013 }
1014
1015 // should assert here that there are no outstanding MSHRs or
1016 // writebacks... that would mean that someone used an atomic
1017 // access in timing mode
1018
1019 CacheBlk *blk = nullptr;
1020 PacketList writebacks;
1021 bool satisfied = access(pkt, blk, lat, writebacks);
1022
1023 // handle writebacks resulting from the access here to ensure they
1024 // logically proceed anything happening below
1025 doWritebacksAtomic(writebacks);
1026
1027 if (!satisfied) {
1028 // MISS
1029
1030 // deal with the packets that go through the write path of
1031 // the cache, i.e. any evictions and uncacheable writes
1032 if (pkt->isEviction() ||
1033 (pkt->req->isUncacheable() && pkt->isWrite())) {
1034 lat += ticksToCycles(memSidePort->sendAtomic(pkt));
1035 return lat * clockPeriod();
1036 }
1037 // only misses left
1038
1039 PacketPtr bus_pkt = createMissPacket(pkt, blk, pkt->needsWritable());
1040
1041 bool is_forward = (bus_pkt == nullptr);
1042
1043 if (is_forward) {
1044 // just forwarding the same request to the next level
1045 // no local cache operation involved
1046 bus_pkt = pkt;
1047 }
1048
1049 DPRINTF(Cache, "Sending an atomic %s for %#llx (%s)\n",
1050 bus_pkt->cmdString(), bus_pkt->getAddr(),
1051 bus_pkt->isSecure() ? "s" : "ns");
1052
1053#if TRACING_ON
1054 CacheBlk::State old_state = blk ? blk->status : 0;
1055#endif
1056
1057 lat += ticksToCycles(memSidePort->sendAtomic(bus_pkt));
1058
1059 bool is_invalidate = bus_pkt->isInvalidate();
1060
1061 // We are now dealing with the response handling
1062 DPRINTF(Cache, "Receive response: %s for addr %#llx (%s) in "
1063 "state %i\n", bus_pkt->cmdString(), bus_pkt->getAddr(),
1064 bus_pkt->isSecure() ? "s" : "ns",
1065 old_state);
1066
1067 // If packet was a forward, the response (if any) is already
1068 // in place in the bus_pkt == pkt structure, so we don't need
1069 // to do anything. Otherwise, use the separate bus_pkt to
1070 // generate response to pkt and then delete it.
1071 if (!is_forward) {
1072 if (pkt->needsResponse()) {
1073 assert(bus_pkt->isResponse());
1074 if (bus_pkt->isError()) {
1075 pkt->makeAtomicResponse();
1076 pkt->copyError(bus_pkt);
1077 } else if (pkt->cmd == MemCmd::WriteLineReq) {
1078 // note the use of pkt, not bus_pkt here.
1079
1080 // write-line request to the cache that promoted
1081 // the write to a whole line
1082 blk = handleFill(pkt, blk, writebacks,
1083 allocOnFill(pkt->cmd));
1084 assert(blk != NULL);
1085 is_invalidate = false;
1086 satisfyRequest(pkt, blk);
1087 } else if (bus_pkt->isRead() ||
1088 bus_pkt->cmd == MemCmd::UpgradeResp) {
1089 // we're updating cache state to allow us to
1090 // satisfy the upstream request from the cache
1091 blk = handleFill(bus_pkt, blk, writebacks,
1092 allocOnFill(pkt->cmd));
1093 satisfyRequest(pkt, blk);
1094 maintainClusivity(pkt->fromCache(), blk);
1095 } else {
1096 // we're satisfying the upstream request without
1097 // modifying cache state, e.g., a write-through
1098 pkt->makeAtomicResponse();
1099 }
1100 }
1101 delete bus_pkt;
1102 }
1103
1104 if (is_invalidate && blk && blk->isValid()) {
1105 invalidateBlock(blk);
1106 }
1107 }
1108
1109 // Note that we don't invoke the prefetcher at all in atomic mode.
1110 // It's not clear how to do it properly, particularly for
1111 // prefetchers that aggressively generate prefetch candidates and
1112 // rely on bandwidth contention to throttle them; these will tend
1113 // to pollute the cache in atomic mode since there is no bandwidth
1114 // contention. If we ever do want to enable prefetching in atomic
1115 // mode, though, this is the place to do it... see timingAccess()
1116 // for an example (though we'd want to issue the prefetch(es)
1117 // immediately rather than calling requestMemSideBus() as we do
1118 // there).
1119
1120 // do any writebacks resulting from the response handling
1121 doWritebacksAtomic(writebacks);
1122
1123 // if we used temp block, check to see if its valid and if so
1124 // clear it out, but only do so after the call to recvAtomic is
1125 // finished so that any downstream observers (such as a snoop
1126 // filter), first see the fill, and only then see the eviction
1127 if (blk == tempBlock && tempBlock->isValid()) {
1128 // the atomic CPU calls recvAtomic for fetch and load/store
1129 // sequentuially, and we may already have a tempBlock
1130 // writeback from the fetch that we have not yet sent
1131 if (tempBlockWriteback) {
1132 // if that is the case, write the prevoius one back, and
1133 // do not schedule any new event
1134 writebackTempBlockAtomic();
1135 } else {
1136 // the writeback/clean eviction happens after the call to
1137 // recvAtomic has finished (but before any successive
1138 // calls), so that the response handling from the fill is
1139 // allowed to happen first
1140 schedule(writebackTempBlockAtomicEvent, curTick());
1141 }
1142
1143 tempBlockWriteback = (blk->isDirty() || writebackClean) ?
1144 writebackBlk(blk) : cleanEvictBlk(blk);
1145 blk->invalidate();
1146 }
1147
1148 if (pkt->needsResponse()) {
1149 pkt->makeAtomicResponse();
1150 }
1151
1152 return lat * clockPeriod();
1153}
1154
1155
1156void
1157Cache::functionalAccess(PacketPtr pkt, bool fromCpuSide)
1158{
1159 if (system->bypassCaches()) {
1160 // Packets from the memory side are snoop request and
1161 // shouldn't happen in bypass mode.
1162 assert(fromCpuSide);
1163
1164 // The cache should be flushed if we are in cache bypass mode,
1165 // so we don't need to check if we need to update anything.
1166 memSidePort->sendFunctional(pkt);
1167 return;
1168 }
1169
1170 Addr blk_addr = blockAlign(pkt->getAddr());
1171 bool is_secure = pkt->isSecure();
1172 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure);
1173 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure);
1174
1175 pkt->pushLabel(name());
1176
1177 CacheBlkPrintWrapper cbpw(blk);
1178
1179 // Note that just because an L2/L3 has valid data doesn't mean an
1180 // L1 doesn't have a more up-to-date modified copy that still
1181 // needs to be found. As a result we always update the request if
1182 // we have it, but only declare it satisfied if we are the owner.
1183
1184 // see if we have data at all (owned or otherwise)
1185 bool have_data = blk && blk->isValid()
1186 && pkt->checkFunctional(&cbpw, blk_addr, is_secure, blkSize,
1187 blk->data);
1188
1189 // data we have is dirty if marked as such or if we have an
1190 // in-service MSHR that is pending a modified line
1191 bool have_dirty =
1192 have_data && (blk->isDirty() ||
1193 (mshr && mshr->inService && mshr->isPendingModified()));
1194
1195 bool done = have_dirty
1196 || cpuSidePort->checkFunctional(pkt)
1197 || mshrQueue.checkFunctional(pkt, blk_addr)
1198 || writeBuffer.checkFunctional(pkt, blk_addr)
1199 || memSidePort->checkFunctional(pkt);
1200
1201 DPRINTF(CacheVerbose, "functional %s %#llx (%s) %s%s%s\n",
1202 pkt->cmdString(), pkt->getAddr(), is_secure ? "s" : "ns",
1203 (blk && blk->isValid()) ? "valid " : "",
1204 have_data ? "data " : "", done ? "done " : "");
1205
1206 // We're leaving the cache, so pop cache->name() label
1207 pkt->popLabel();
1208
1209 if (done) {
1210 pkt->makeResponse();
1211 } else {
1212 // if it came as a request from the CPU side then make sure it
1213 // continues towards the memory side
1214 if (fromCpuSide) {
1215 memSidePort->sendFunctional(pkt);
1216 } else if (cpuSidePort->isSnooping()) {
1217 // if it came from the memory side, it must be a snoop request
1218 // and we should only forward it if we are forwarding snoops
1219 cpuSidePort->sendFunctionalSnoop(pkt);
1220 }
1221 }
1222}
1223
1224
1225/////////////////////////////////////////////////////
1226//
1227// Response handling: responses from the memory side
1228//
1229/////////////////////////////////////////////////////
1230
1231
1232void
1233Cache::handleUncacheableWriteResp(PacketPtr pkt)
1234{
1235 Tick completion_time = clockEdge(responseLatency) +
1236 pkt->headerDelay + pkt->payloadDelay;
1237
1238 // Reset the bus additional time as it is now accounted for
1239 pkt->headerDelay = pkt->payloadDelay = 0;
1240
1241 cpuSidePort->schedTimingResp(pkt, completion_time, true);
1242}
1243
1244void
1245Cache::recvTimingResp(PacketPtr pkt)
1246{
1247 assert(pkt->isResponse());
1248
1249 // all header delay should be paid for by the crossbar, unless
1250 // this is a prefetch response from above
1251 panic_if(pkt->headerDelay != 0 && pkt->cmd != MemCmd::HardPFResp,
1252 "%s saw a non-zero packet delay\n", name());
1253
1254 bool is_error = pkt->isError();
1255
1256 if (is_error) {
1257 DPRINTF(Cache, "Cache received packet with error for addr %#llx (%s), "
1258 "cmd: %s\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns",
1259 pkt->cmdString());
1260 }
1261
1262 DPRINTF(Cache, "Handling response %s for addr %#llx size %d (%s)\n",
1263 pkt->cmdString(), pkt->getAddr(), pkt->getSize(),
1264 pkt->isSecure() ? "s" : "ns");
1265
1266 // if this is a write, we should be looking at an uncacheable
1267 // write
1268 if (pkt->isWrite()) {
1269 assert(pkt->req->isUncacheable());
1270 handleUncacheableWriteResp(pkt);
1271 return;
1272 }
1273
1274 // we have dealt with any (uncacheable) writes above, from here on
1275 // we know we are dealing with an MSHR due to a miss or a prefetch
1276 MSHR *mshr = dynamic_cast<MSHR*>(pkt->popSenderState());
1277 assert(mshr);
1278
1279 if (mshr == noTargetMSHR) {
1280 // we always clear at least one target
1281 clearBlocked(Blocked_NoTargets);
1282 noTargetMSHR = nullptr;
1283 }
1284
1285 // Initial target is used just for stats
1286 MSHR::Target *initial_tgt = mshr->getTarget();
1287 int stats_cmd_idx = initial_tgt->pkt->cmdToIndex();
1288 Tick miss_latency = curTick() - initial_tgt->recvTime;
1289
1290 if (pkt->req->isUncacheable()) {
1291 assert(pkt->req->masterId() < system->maxMasters());
1292 mshr_uncacheable_lat[stats_cmd_idx][pkt->req->masterId()] +=
1293 miss_latency;
1294 } else {
1295 assert(pkt->req->masterId() < system->maxMasters());
1296 mshr_miss_latency[stats_cmd_idx][pkt->req->masterId()] +=
1297 miss_latency;
1298 }
1299
1300 bool wasFull = mshrQueue.isFull();
1301
1302 PacketList writebacks;
1303
1304 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
1305
1306 // upgrade deferred targets if the response has no sharers, and is
1307 // thus passing writable
1308 if (!pkt->hasSharers()) {
1309 mshr->promoteWritable();
1310 }
1311
1312 bool is_fill = !mshr->isForward &&
1313 (pkt->isRead() || pkt->cmd == MemCmd::UpgradeResp);
1314
1315 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
1316
1317 if (is_fill && !is_error) {
1318 DPRINTF(Cache, "Block for addr %#llx being updated in Cache\n",
1319 pkt->getAddr());
1320
|
1321 blk = handleFill(pkt, blk, writebacks, mshr->allocOnFill);
| 1321 blk = handleFill(pkt, blk, writebacks, mshr->allocOnFill());
|
1322 assert(blk != nullptr);
1323 }
1324
1325 // allow invalidation responses originating from write-line
1326 // requests to be discarded
1327 bool is_invalidate = pkt->isInvalidate();
1328
1329 // First offset for critical word first calculations
1330 int initial_offset = initial_tgt->pkt->getOffset(blkSize);
1331
1332 bool from_cache = false;
1333
1334 while (mshr->hasTargets()) {
1335 MSHR::Target *target = mshr->getTarget();
1336 Packet *tgt_pkt = target->pkt;
1337
1338 switch (target->source) {
1339 case MSHR::Target::FromCPU:
1340 Tick completion_time;
1341 // Here we charge on completion_time the delay of the xbar if the
1342 // packet comes from it, charged on headerDelay.
1343 completion_time = pkt->headerDelay;
1344
1345 // Software prefetch handling for cache closest to core
1346 if (tgt_pkt->cmd.isSWPrefetch()) {
1347 // a software prefetch would have already been ack'd
1348 // immediately with dummy data so the core would be able to
1349 // retire it. This request completes right here, so we
1350 // deallocate it.
1351 delete tgt_pkt->req;
1352 delete tgt_pkt;
1353 break; // skip response
1354 }
1355
1356 // keep track of whether we have responded to another
1357 // cache
1358 from_cache = from_cache || tgt_pkt->fromCache();
1359
1360 // unlike the other packet flows, where data is found in other
1361 // caches or memory and brought back, write-line requests always
1362 // have the data right away, so the above check for "is fill?"
1363 // cannot actually be determined until examining the stored MSHR
1364 // state. We "catch up" with that logic here, which is duplicated
1365 // from above.
1366 if (tgt_pkt->cmd == MemCmd::WriteLineReq) {
1367 assert(!is_error);
1368 // we got the block in a writable state, so promote
1369 // any deferred targets if possible
1370 mshr->promoteWritable();
1371 // NB: we use the original packet here and not the response!
| 1322 assert(blk != nullptr);
1323 }
1324
1325 // allow invalidation responses originating from write-line
1326 // requests to be discarded
1327 bool is_invalidate = pkt->isInvalidate();
1328
1329 // First offset for critical word first calculations
1330 int initial_offset = initial_tgt->pkt->getOffset(blkSize);
1331
1332 bool from_cache = false;
1333
1334 while (mshr->hasTargets()) {
1335 MSHR::Target *target = mshr->getTarget();
1336 Packet *tgt_pkt = target->pkt;
1337
1338 switch (target->source) {
1339 case MSHR::Target::FromCPU:
1340 Tick completion_time;
1341 // Here we charge on completion_time the delay of the xbar if the
1342 // packet comes from it, charged on headerDelay.
1343 completion_time = pkt->headerDelay;
1344
1345 // Software prefetch handling for cache closest to core
1346 if (tgt_pkt->cmd.isSWPrefetch()) {
1347 // a software prefetch would have already been ack'd
1348 // immediately with dummy data so the core would be able to
1349 // retire it. This request completes right here, so we
1350 // deallocate it.
1351 delete tgt_pkt->req;
1352 delete tgt_pkt;
1353 break; // skip response
1354 }
1355
1356 // keep track of whether we have responded to another
1357 // cache
1358 from_cache = from_cache || tgt_pkt->fromCache();
1359
1360 // unlike the other packet flows, where data is found in other
1361 // caches or memory and brought back, write-line requests always
1362 // have the data right away, so the above check for "is fill?"
1363 // cannot actually be determined until examining the stored MSHR
1364 // state. We "catch up" with that logic here, which is duplicated
1365 // from above.
1366 if (tgt_pkt->cmd == MemCmd::WriteLineReq) {
1367 assert(!is_error);
1368 // we got the block in a writable state, so promote
1369 // any deferred targets if possible
1370 mshr->promoteWritable();
1371 // NB: we use the original packet here and not the response!
|
1372 blk = handleFill(tgt_pkt, blk, writebacks, mshr->allocOnFill);
| 1372 blk = handleFill(tgt_pkt, blk, writebacks,
1373 mshr->allocOnFill());
|
1373 assert(blk != nullptr);
1374
1375 // treat as a fill, and discard the invalidation
1376 // response
1377 is_fill = true;
1378 is_invalidate = false;
1379 }
1380
1381 if (is_fill) {
1382 satisfyRequest(tgt_pkt, blk, true, mshr->hasPostDowngrade());
1383
1384 // How many bytes past the first request is this one
1385 int transfer_offset =
1386 tgt_pkt->getOffset(blkSize) - initial_offset;
1387 if (transfer_offset < 0) {
1388 transfer_offset += blkSize;
1389 }
1390
1391 // If not critical word (offset) return payloadDelay.
1392 // responseLatency is the latency of the return path
1393 // from lower level caches/memory to an upper level cache or
1394 // the core.
1395 completion_time += clockEdge(responseLatency) +
1396 (transfer_offset ? pkt->payloadDelay : 0);
1397
1398 assert(!tgt_pkt->req->isUncacheable());
1399
1400 assert(tgt_pkt->req->masterId() < system->maxMasters());
1401 missLatency[tgt_pkt->cmdToIndex()][tgt_pkt->req->masterId()] +=
1402 completion_time - target->recvTime;
1403 } else if (pkt->cmd == MemCmd::UpgradeFailResp) {
1404 // failed StoreCond upgrade
1405 assert(tgt_pkt->cmd == MemCmd::StoreCondReq ||
1406 tgt_pkt->cmd == MemCmd::StoreCondFailReq ||
1407 tgt_pkt->cmd == MemCmd::SCUpgradeFailReq);
1408 // responseLatency is the latency of the return path
1409 // from lower level caches/memory to an upper level cache or
1410 // the core.
1411 completion_time += clockEdge(responseLatency) +
1412 pkt->payloadDelay;
1413 tgt_pkt->req->setExtraData(0);
1414 } else {
1415 // not a cache fill, just forwarding response
1416 // responseLatency is the latency of the return path
1417 // from lower level cahces/memory to the core.
1418 completion_time += clockEdge(responseLatency) +
1419 pkt->payloadDelay;
1420 if (pkt->isRead() && !is_error) {
1421 // sanity check
1422 assert(pkt->getAddr() == tgt_pkt->getAddr());
1423 assert(pkt->getSize() >= tgt_pkt->getSize());
1424
1425 tgt_pkt->setData(pkt->getConstPtr<uint8_t>());
1426 }
1427 }
1428 tgt_pkt->makeTimingResponse();
1429 // if this packet is an error copy that to the new packet
1430 if (is_error)
1431 tgt_pkt->copyError(pkt);
1432 if (tgt_pkt->cmd == MemCmd::ReadResp &&
1433 (is_invalidate || mshr->hasPostInvalidate())) {
1434 // If intermediate cache got ReadRespWithInvalidate,
1435 // propagate that. Response should not have
1436 // isInvalidate() set otherwise.
1437 tgt_pkt->cmd = MemCmd::ReadRespWithInvalidate;
1438 DPRINTF(Cache, "%s updated cmd to %s for addr %#llx\n",
1439 __func__, tgt_pkt->cmdString(), tgt_pkt->getAddr());
1440 }
1441 // Reset the bus additional time as it is now accounted for
1442 tgt_pkt->headerDelay = tgt_pkt->payloadDelay = 0;
1443 cpuSidePort->schedTimingResp(tgt_pkt, completion_time, true);
1444 break;
1445
1446 case MSHR::Target::FromPrefetcher:
1447 assert(tgt_pkt->cmd == MemCmd::HardPFReq);
1448 if (blk)
1449 blk->status |= BlkHWPrefetched;
1450 delete tgt_pkt->req;
1451 delete tgt_pkt;
1452 break;
1453
1454 case MSHR::Target::FromSnoop:
1455 // I don't believe that a snoop can be in an error state
1456 assert(!is_error);
1457 // response to snoop request
1458 DPRINTF(Cache, "processing deferred snoop...\n");
1459 assert(!(is_invalidate && !mshr->hasPostInvalidate()));
1460 handleSnoop(tgt_pkt, blk, true, true, mshr->hasPostInvalidate());
1461 break;
1462
1463 default:
1464 panic("Illegal target->source enum %d\n", target->source);
1465 }
1466
1467 mshr->popTarget();
1468 }
1469
1470 maintainClusivity(from_cache, blk);
1471
1472 if (blk && blk->isValid()) {
1473 // an invalidate response stemming from a write line request
1474 // should not invalidate the block, so check if the
1475 // invalidation should be discarded
1476 if (is_invalidate || mshr->hasPostInvalidate()) {
1477 invalidateBlock(blk);
1478 } else if (mshr->hasPostDowngrade()) {
1479 blk->status &= ~BlkWritable;
1480 }
1481 }
1482
1483 if (mshr->promoteDeferredTargets()) {
1484 // avoid later read getting stale data while write miss is
1485 // outstanding.. see comment in timingAccess()
1486 if (blk) {
1487 blk->status &= ~BlkReadable;
1488 }
1489 mshrQueue.markPending(mshr);
1490 schedMemSideSendEvent(clockEdge() + pkt->payloadDelay);
1491 } else {
1492 mshrQueue.deallocate(mshr);
1493 if (wasFull && !mshrQueue.isFull()) {
1494 clearBlocked(Blocked_NoMSHRs);
1495 }
1496
1497 // Request the bus for a prefetch if this deallocation freed enough
1498 // MSHRs for a prefetch to take place
1499 if (prefetcher && mshrQueue.canPrefetch()) {
1500 Tick next_pf_time = std::max(prefetcher->nextPrefetchReadyTime(),
1501 clockEdge());
1502 if (next_pf_time != MaxTick)
1503 schedMemSideSendEvent(next_pf_time);
1504 }
1505 }
1506 // reset the xbar additional timinig as it is now accounted for
1507 pkt->headerDelay = pkt->payloadDelay = 0;
1508
1509 // copy writebacks to write buffer
1510 doWritebacks(writebacks, forward_time);
1511
1512 // if we used temp block, check to see if its valid and then clear it out
1513 if (blk == tempBlock && tempBlock->isValid()) {
1514 // We use forwardLatency here because we are copying
1515 // Writebacks/CleanEvicts to write buffer. It specifies the latency to
1516 // allocate an internal buffer and to schedule an event to the
1517 // queued port.
1518 if (blk->isDirty() || writebackClean) {
1519 PacketPtr wbPkt = writebackBlk(blk);
1520 allocateWriteBuffer(wbPkt, forward_time);
1521 // Set BLOCK_CACHED flag if cached above.
1522 if (isCachedAbove(wbPkt))
1523 wbPkt->setBlockCached();
1524 } else {
1525 PacketPtr wcPkt = cleanEvictBlk(blk);
1526 // Check to see if block is cached above. If not allocate
1527 // write buffer
1528 if (isCachedAbove(wcPkt))
1529 delete wcPkt;
1530 else
1531 allocateWriteBuffer(wcPkt, forward_time);
1532 }
1533 blk->invalidate();
1534 }
1535
1536 DPRINTF(CacheVerbose, "Leaving %s with %s for addr %#llx\n", __func__,
1537 pkt->cmdString(), pkt->getAddr());
1538 delete pkt;
1539}
1540
1541PacketPtr
1542Cache::writebackBlk(CacheBlk *blk)
1543{
1544 chatty_assert(!isReadOnly || writebackClean,
1545 "Writeback from read-only cache");
1546 assert(blk && blk->isValid() && (blk->isDirty() || writebackClean));
1547
1548 writebacks[Request::wbMasterId]++;
1549
1550 Request *req = new Request(tags->regenerateBlkAddr(blk->tag, blk->set),
1551 blkSize, 0, Request::wbMasterId);
1552 if (blk->isSecure())
1553 req->setFlags(Request::SECURE);
1554
1555 req->taskId(blk->task_id);
1556 blk->task_id= ContextSwitchTaskId::Unknown;
1557 blk->tickInserted = curTick();
1558
1559 PacketPtr pkt =
1560 new Packet(req, blk->isDirty() ?
1561 MemCmd::WritebackDirty : MemCmd::WritebackClean);
1562
1563 DPRINTF(Cache, "Create Writeback %#llx writable: %d, dirty: %d\n",
1564 pkt->getAddr(), blk->isWritable(), blk->isDirty());
1565
1566 if (blk->isWritable()) {
1567 // not asserting shared means we pass the block in modified
1568 // state, mark our own block non-writeable
1569 blk->status &= ~BlkWritable;
1570 } else {
1571 // we are in the Owned state, tell the receiver
1572 pkt->setHasSharers();
1573 }
1574
1575 // make sure the block is not marked dirty
1576 blk->status &= ~BlkDirty;
1577
1578 pkt->allocate();
1579 std::memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize);
1580
1581 return pkt;
1582}
1583
1584PacketPtr
1585Cache::cleanEvictBlk(CacheBlk *blk)
1586{
1587 assert(!writebackClean);
1588 assert(blk && blk->isValid() && !blk->isDirty());
1589 // Creating a zero sized write, a message to the snoop filter
1590 Request *req =
1591 new Request(tags->regenerateBlkAddr(blk->tag, blk->set), blkSize, 0,
1592 Request::wbMasterId);
1593 if (blk->isSecure())
1594 req->setFlags(Request::SECURE);
1595
1596 req->taskId(blk->task_id);
1597 blk->task_id = ContextSwitchTaskId::Unknown;
1598 blk->tickInserted = curTick();
1599
1600 PacketPtr pkt = new Packet(req, MemCmd::CleanEvict);
1601 pkt->allocate();
1602 DPRINTF(Cache, "%s%s %x Create CleanEvict\n", pkt->cmdString(),
1603 pkt->req->isInstFetch() ? " (ifetch)" : "",
1604 pkt->getAddr());
1605
1606 return pkt;
1607}
1608
1609void
1610Cache::memWriteback()
1611{
1612 CacheBlkVisitorWrapper visitor(*this, &Cache::writebackVisitor);
1613 tags->forEachBlk(visitor);
1614}
1615
1616void
1617Cache::memInvalidate()
1618{
1619 CacheBlkVisitorWrapper visitor(*this, &Cache::invalidateVisitor);
1620 tags->forEachBlk(visitor);
1621}
1622
1623bool
1624Cache::isDirty() const
1625{
1626 CacheBlkIsDirtyVisitor visitor;
1627 tags->forEachBlk(visitor);
1628
1629 return visitor.isDirty();
1630}
1631
1632bool
1633Cache::writebackVisitor(CacheBlk &blk)
1634{
1635 if (blk.isDirty()) {
1636 assert(blk.isValid());
1637
1638 Request request(tags->regenerateBlkAddr(blk.tag, blk.set),
1639 blkSize, 0, Request::funcMasterId);
1640 request.taskId(blk.task_id);
1641
1642 Packet packet(&request, MemCmd::WriteReq);
1643 packet.dataStatic(blk.data);
1644
1645 memSidePort->sendFunctional(&packet);
1646
1647 blk.status &= ~BlkDirty;
1648 }
1649
1650 return true;
1651}
1652
1653bool
1654Cache::invalidateVisitor(CacheBlk &blk)
1655{
1656
1657 if (blk.isDirty())
1658 warn_once("Invalidating dirty cache lines. Expect things to break.\n");
1659
1660 if (blk.isValid()) {
1661 assert(!blk.isDirty());
1662 tags->invalidate(&blk);
1663 blk.invalidate();
1664 }
1665
1666 return true;
1667}
1668
1669CacheBlk*
1670Cache::allocateBlock(Addr addr, bool is_secure, PacketList &writebacks)
1671{
1672 CacheBlk *blk = tags->findVictim(addr);
1673
1674 // It is valid to return nullptr if there is no victim
1675 if (!blk)
1676 return nullptr;
1677
1678 if (blk->isValid()) {
1679 Addr repl_addr = tags->regenerateBlkAddr(blk->tag, blk->set);
1680 MSHR *repl_mshr = mshrQueue.findMatch(repl_addr, blk->isSecure());
1681 if (repl_mshr) {
1682 // must be an outstanding upgrade request
1683 // on a block we're about to replace...
1684 assert(!blk->isWritable() || blk->isDirty());
1685 assert(repl_mshr->needsWritable());
1686 // too hard to replace block with transient state
1687 // allocation failed, block not inserted
1688 return nullptr;
1689 } else {
1690 DPRINTF(Cache, "replacement: replacing %#llx (%s) with %#llx "
1691 "(%s): %s\n", repl_addr, blk->isSecure() ? "s" : "ns",
1692 addr, is_secure ? "s" : "ns",
1693 blk->isDirty() ? "writeback" : "clean");
1694
1695 if (blk->wasPrefetched()) {
1696 unusedPrefetches++;
1697 }
1698 // Will send up Writeback/CleanEvict snoops via isCachedAbove
1699 // when pushing this writeback list into the write buffer.
1700 if (blk->isDirty() || writebackClean) {
1701 // Save writeback packet for handling by caller
1702 writebacks.push_back(writebackBlk(blk));
1703 } else {
1704 writebacks.push_back(cleanEvictBlk(blk));
1705 }
1706 }
1707 }
1708
1709 return blk;
1710}
1711
1712void
1713Cache::invalidateBlock(CacheBlk *blk)
1714{
1715 if (blk != tempBlock)
1716 tags->invalidate(blk);
1717 blk->invalidate();
1718}
1719
1720// Note that the reason we return a list of writebacks rather than
1721// inserting them directly in the write buffer is that this function
1722// is called by both atomic and timing-mode accesses, and in atomic
1723// mode we don't mess with the write buffer (we just perform the
1724// writebacks atomically once the original request is complete).
1725CacheBlk*
1726Cache::handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks,
1727 bool allocate)
1728{
1729 assert(pkt->isResponse() || pkt->cmd == MemCmd::WriteLineReq);
1730 Addr addr = pkt->getAddr();
1731 bool is_secure = pkt->isSecure();
1732#if TRACING_ON
1733 CacheBlk::State old_state = blk ? blk->status : 0;
1734#endif
1735
1736 // When handling a fill, we should have no writes to this line.
1737 assert(addr == blockAlign(addr));
1738 assert(!writeBuffer.findMatch(addr, is_secure));
1739
1740 if (blk == nullptr) {
1741 // better have read new data...
1742 assert(pkt->hasData());
1743
1744 // only read responses and write-line requests have data;
1745 // note that we don't write the data here for write-line - that
1746 // happens in the subsequent call to satisfyRequest
1747 assert(pkt->isRead() || pkt->cmd == MemCmd::WriteLineReq);
1748
1749 // need to do a replacement if allocating, otherwise we stick
1750 // with the temporary storage
1751 blk = allocate ? allocateBlock(addr, is_secure, writebacks) : nullptr;
1752
1753 if (blk == nullptr) {
1754 // No replaceable block or a mostly exclusive
1755 // cache... just use temporary storage to complete the
1756 // current request and then get rid of it
1757 assert(!tempBlock->isValid());
1758 blk = tempBlock;
1759 tempBlock->set = tags->extractSet(addr);
1760 tempBlock->tag = tags->extractTag(addr);
1761 // @todo: set security state as well...
1762 DPRINTF(Cache, "using temp block for %#llx (%s)\n", addr,
1763 is_secure ? "s" : "ns");
1764 } else {
1765 tags->insertBlock(pkt, blk);
1766 }
1767
1768 // we should never be overwriting a valid block
1769 assert(!blk->isValid());
1770 } else {
1771 // existing block... probably an upgrade
1772 assert(blk->tag == tags->extractTag(addr));
1773 // either we're getting new data or the block should already be valid
1774 assert(pkt->hasData() || blk->isValid());
1775 // don't clear block status... if block is already dirty we
1776 // don't want to lose that
1777 }
1778
1779 if (is_secure)
1780 blk->status |= BlkSecure;
1781 blk->status |= BlkValid | BlkReadable;
1782
1783 // sanity check for whole-line writes, which should always be
1784 // marked as writable as part of the fill, and then later marked
1785 // dirty as part of satisfyRequest
1786 if (pkt->cmd == MemCmd::WriteLineReq) {
1787 assert(!pkt->hasSharers());
1788 // at the moment other caches do not respond to the
1789 // invalidation requests corresponding to a whole-line write
1790 assert(!pkt->cacheResponding());
1791 }
1792
1793 // here we deal with setting the appropriate state of the line,
1794 // and we start by looking at the hasSharers flag, and ignore the
1795 // cacheResponding flag (normally signalling dirty data) if the
1796 // packet has sharers, thus the line is never allocated as Owned
1797 // (dirty but not writable), and always ends up being either
1798 // Shared, Exclusive or Modified, see Packet::setCacheResponding
1799 // for more details
1800 if (!pkt->hasSharers()) {
1801 // we could get a writable line from memory (rather than a
1802 // cache) even in a read-only cache, note that we set this bit
1803 // even for a read-only cache, possibly revisit this decision
1804 blk->status |= BlkWritable;
1805
1806 // check if we got this via cache-to-cache transfer (i.e., from a
1807 // cache that had the block in Modified or Owned state)
1808 if (pkt->cacheResponding()) {
1809 // we got the block in Modified state, and invalidated the
1810 // owners copy
1811 blk->status |= BlkDirty;
1812
1813 chatty_assert(!isReadOnly, "Should never see dirty snoop response "
1814 "in read-only cache %s\n", name());
1815 }
1816 }
1817
1818 DPRINTF(Cache, "Block addr %#llx (%s) moving from state %x to %s\n",
1819 addr, is_secure ? "s" : "ns", old_state, blk->print());
1820
1821 // if we got new data, copy it in (checking for a read response
1822 // and a response that has data is the same in the end)
1823 if (pkt->isRead()) {
1824 // sanity checks
1825 assert(pkt->hasData());
1826 assert(pkt->getSize() == blkSize);
1827
1828 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize);
1829 }
1830 // We pay for fillLatency here.
1831 blk->whenReady = clockEdge() + fillLatency * clockPeriod() +
1832 pkt->payloadDelay;
1833
1834 return blk;
1835}
1836
1837
1838/////////////////////////////////////////////////////
1839//
1840// Snoop path: requests coming in from the memory side
1841//
1842/////////////////////////////////////////////////////
1843
1844void
1845Cache::doTimingSupplyResponse(PacketPtr req_pkt, const uint8_t *blk_data,
1846 bool already_copied, bool pending_inval)
1847{
1848 // sanity check
1849 assert(req_pkt->isRequest());
1850 assert(req_pkt->needsResponse());
1851
1852 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__,
1853 req_pkt->cmdString(), req_pkt->getAddr(), req_pkt->getSize());
1854 // timing-mode snoop responses require a new packet, unless we
1855 // already made a copy...
1856 PacketPtr pkt = req_pkt;
1857 if (!already_copied)
1858 // do not clear flags, and allocate space for data if the
1859 // packet needs it (the only packets that carry data are read
1860 // responses)
1861 pkt = new Packet(req_pkt, false, req_pkt->isRead());
1862
1863 assert(req_pkt->req->isUncacheable() || req_pkt->isInvalidate() ||
1864 pkt->hasSharers());
1865 pkt->makeTimingResponse();
1866 if (pkt->isRead()) {
1867 pkt->setDataFromBlock(blk_data, blkSize);
1868 }
1869 if (pkt->cmd == MemCmd::ReadResp && pending_inval) {
1870 // Assume we defer a response to a read from a far-away cache
1871 // A, then later defer a ReadExcl from a cache B on the same
1872 // bus as us. We'll assert cacheResponding in both cases, but
1873 // in the latter case cacheResponding will keep the
1874 // invalidation from reaching cache A. This special response
1875 // tells cache A that it gets the block to satisfy its read,
1876 // but must immediately invalidate it.
1877 pkt->cmd = MemCmd::ReadRespWithInvalidate;
1878 }
1879 // Here we consider forward_time, paying for just forward latency and
1880 // also charging the delay provided by the xbar.
1881 // forward_time is used as send_time in next allocateWriteBuffer().
1882 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
1883 // Here we reset the timing of the packet.
1884 pkt->headerDelay = pkt->payloadDelay = 0;
1885 DPRINTF(CacheVerbose,
1886 "%s created response: %s addr %#llx size %d tick: %lu\n",
1887 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize(),
1888 forward_time);
1889 memSidePort->schedTimingSnoopResp(pkt, forward_time, true);
1890}
1891
1892uint32_t
1893Cache::handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing,
1894 bool is_deferred, bool pending_inval)
1895{
1896 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d\n", __func__,
1897 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
1898 // deferred snoops can only happen in timing mode
1899 assert(!(is_deferred && !is_timing));
1900 // pending_inval only makes sense on deferred snoops
1901 assert(!(pending_inval && !is_deferred));
1902 assert(pkt->isRequest());
1903
1904 // the packet may get modified if we or a forwarded snooper
1905 // responds in atomic mode, so remember a few things about the
1906 // original packet up front
1907 bool invalidate = pkt->isInvalidate();
1908 bool M5_VAR_USED needs_writable = pkt->needsWritable();
1909
1910 // at the moment we could get an uncacheable write which does not
1911 // have the invalidate flag, and we need a suitable way of dealing
1912 // with this case
1913 panic_if(invalidate && pkt->req->isUncacheable(),
1914 "%s got an invalidating uncacheable snoop request %s to %#llx",
1915 name(), pkt->cmdString(), pkt->getAddr());
1916
1917 uint32_t snoop_delay = 0;
1918
1919 if (forwardSnoops) {
1920 // first propagate snoop upward to see if anyone above us wants to
1921 // handle it. save & restore packet src since it will get
1922 // rewritten to be relative to cpu-side bus (if any)
1923 bool alreadyResponded = pkt->cacheResponding();
1924 if (is_timing) {
1925 // copy the packet so that we can clear any flags before
1926 // forwarding it upwards, we also allocate data (passing
1927 // the pointer along in case of static data), in case
1928 // there is a snoop hit in upper levels
1929 Packet snoopPkt(pkt, true, true);
1930 snoopPkt.setExpressSnoop();
1931 // the snoop packet does not need to wait any additional
1932 // time
1933 snoopPkt.headerDelay = snoopPkt.payloadDelay = 0;
1934 cpuSidePort->sendTimingSnoopReq(&snoopPkt);
1935
1936 // add the header delay (including crossbar and snoop
1937 // delays) of the upward snoop to the snoop delay for this
1938 // cache
1939 snoop_delay += snoopPkt.headerDelay;
1940
1941 if (snoopPkt.cacheResponding()) {
1942 // cache-to-cache response from some upper cache
1943 assert(!alreadyResponded);
1944 pkt->setCacheResponding();
1945 }
1946 // upstream cache has the block, or has an outstanding
1947 // MSHR, pass the flag on
1948 if (snoopPkt.hasSharers()) {
1949 pkt->setHasSharers();
1950 }
1951 // If this request is a prefetch or clean evict and an upper level
1952 // signals block present, make sure to propagate the block
1953 // presence to the requester.
1954 if (snoopPkt.isBlockCached()) {
1955 pkt->setBlockCached();
1956 }
1957 } else {
1958 cpuSidePort->sendAtomicSnoop(pkt);
1959 if (!alreadyResponded && pkt->cacheResponding()) {
1960 // cache-to-cache response from some upper cache:
1961 // forward response to original requester
1962 assert(pkt->isResponse());
1963 }
1964 }
1965 }
1966
1967 if (!blk || !blk->isValid()) {
1968 if (is_deferred) {
1969 // we no longer have the block, and will not respond, but a
1970 // packet was allocated in MSHR::handleSnoop and we have
1971 // to delete it
1972 assert(pkt->needsResponse());
1973
1974 // we have passed the block to a cache upstream, that
1975 // cache should be responding
1976 assert(pkt->cacheResponding());
1977
1978 delete pkt;
1979 }
1980
1981 DPRINTF(CacheVerbose, "%s snoop miss for %s addr %#llx size %d\n",
1982 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize());
1983 return snoop_delay;
1984 } else {
1985 DPRINTF(Cache, "%s snoop hit for %s addr %#llx size %d, "
1986 "old state is %s\n", __func__, pkt->cmdString(),
1987 pkt->getAddr(), pkt->getSize(), blk->print());
1988 }
1989
1990 chatty_assert(!(isReadOnly && blk->isDirty()),
1991 "Should never have a dirty block in a read-only cache %s\n",
1992 name());
1993
1994 // We may end up modifying both the block state and the packet (if
1995 // we respond in atomic mode), so just figure out what to do now
1996 // and then do it later. If we find dirty data while snooping for
1997 // an invalidate, we don't need to send a response. The
1998 // invalidation itself is taken care of below.
1999 bool respond = blk->isDirty() && pkt->needsResponse() &&
2000 pkt->cmd != MemCmd::InvalidateReq;
2001 bool have_writable = blk->isWritable();
2002
2003 // Invalidate any prefetch's from below that would strip write permissions
2004 // MemCmd::HardPFReq is only observed by upstream caches. After missing
2005 // above and in it's own cache, a new MemCmd::ReadReq is created that
2006 // downstream caches observe.
2007 if (pkt->mustCheckAbove()) {
2008 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s "
2009 "from lower cache\n", pkt->getAddr(), pkt->cmdString());
2010 pkt->setBlockCached();
2011 return snoop_delay;
2012 }
2013
2014 if (pkt->isRead() && !invalidate) {
2015 // reading without requiring the line in a writable state
2016 assert(!needs_writable);
2017 pkt->setHasSharers();
2018
2019 // if the requesting packet is uncacheable, retain the line in
2020 // the current state, otherwhise unset the writable flag,
2021 // which means we go from Modified to Owned (and will respond
2022 // below), remain in Owned (and will respond below), from
2023 // Exclusive to Shared, or remain in Shared
2024 if (!pkt->req->isUncacheable())
2025 blk->status &= ~BlkWritable;
2026 }
2027
2028 if (respond) {
2029 // prevent anyone else from responding, cache as well as
2030 // memory, and also prevent any memory from even seeing the
2031 // request
2032 pkt->setCacheResponding();
2033 if (have_writable) {
2034 // inform the cache hierarchy that this cache had the line
2035 // in the Modified state so that we avoid unnecessary
2036 // invalidations (see Packet::setResponderHadWritable)
2037 pkt->setResponderHadWritable();
2038
2039 // in the case of an uncacheable request there is no point
2040 // in setting the responderHadWritable flag, but since the
2041 // recipient does not care there is no harm in doing so
2042 } else {
2043 // if the packet has needsWritable set we invalidate our
2044 // copy below and all other copies will be invalidates
2045 // through express snoops, and if needsWritable is not set
2046 // we already called setHasSharers above
2047 }
2048
2049 // if we are returning a writable and dirty (Modified) line,
2050 // we should be invalidating the line
2051 panic_if(!invalidate && !pkt->hasSharers(),
2052 "%s is passing a Modified line through %s to %#llx, "
2053 "but keeping the block",
2054 name(), pkt->cmdString(), pkt->getAddr());
2055
2056 if (is_timing) {
2057 doTimingSupplyResponse(pkt, blk->data, is_deferred, pending_inval);
2058 } else {
2059 pkt->makeAtomicResponse();
2060 // packets such as upgrades do not actually have any data
2061 // payload
2062 if (pkt->hasData())
2063 pkt->setDataFromBlock(blk->data, blkSize);
2064 }
2065 }
2066
2067 if (!respond && is_deferred) {
2068 assert(pkt->needsResponse());
2069
2070 // if we copied the deferred packet with the intention to
2071 // respond, but are not responding, then a cache above us must
2072 // be, and we can use this as the indication of whether this
2073 // is a packet where we created a copy of the request or not
2074 if (!pkt->cacheResponding()) {
2075 delete pkt->req;
2076 }
2077
2078 delete pkt;
2079 }
2080
2081 // Do this last in case it deallocates block data or something
2082 // like that
2083 if (invalidate) {
2084 invalidateBlock(blk);
2085 }
2086
2087 DPRINTF(Cache, "new state is %s\n", blk->print());
2088
2089 return snoop_delay;
2090}
2091
2092
2093void
2094Cache::recvTimingSnoopReq(PacketPtr pkt)
2095{
2096 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d\n", __func__,
2097 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
2098
2099 // Snoops shouldn't happen when bypassing caches
2100 assert(!system->bypassCaches());
2101
2102 // no need to snoop requests that are not in range
2103 if (!inRange(pkt->getAddr())) {
2104 return;
2105 }
2106
2107 bool is_secure = pkt->isSecure();
2108 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure);
2109
2110 Addr blk_addr = blockAlign(pkt->getAddr());
2111 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure);
2112
2113 // Update the latency cost of the snoop so that the crossbar can
2114 // account for it. Do not overwrite what other neighbouring caches
2115 // have already done, rather take the maximum. The update is
2116 // tentative, for cases where we return before an upward snoop
2117 // happens below.
2118 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay,
2119 lookupLatency * clockPeriod());
2120
2121 // Inform request(Prefetch, CleanEvict or Writeback) from below of
2122 // MSHR hit, set setBlockCached.
2123 if (mshr && pkt->mustCheckAbove()) {
2124 DPRINTF(Cache, "Setting block cached for %s from"
2125 "lower cache on mshr hit %#x\n",
2126 pkt->cmdString(), pkt->getAddr());
2127 pkt->setBlockCached();
2128 return;
2129 }
2130
2131 // Let the MSHR itself track the snoop and decide whether we want
2132 // to go ahead and do the regular cache snoop
2133 if (mshr && mshr->handleSnoop(pkt, order++)) {
2134 DPRINTF(Cache, "Deferring snoop on in-service MSHR to blk %#llx (%s)."
2135 "mshrs: %s\n", blk_addr, is_secure ? "s" : "ns",
2136 mshr->print());
2137
2138 if (mshr->getNumTargets() > numTarget)
2139 warn("allocating bonus target for snoop"); //handle later
2140 return;
2141 }
2142
2143 //We also need to check the writeback buffers and handle those
2144 WriteQueueEntry *wb_entry = writeBuffer.findMatch(blk_addr, is_secure);
2145 if (wb_entry) {
2146 DPRINTF(Cache, "Snoop hit in writeback to addr %#llx (%s)\n",
2147 pkt->getAddr(), is_secure ? "s" : "ns");
2148 // Expect to see only Writebacks and/or CleanEvicts here, both of
2149 // which should not be generated for uncacheable data.
2150 assert(!wb_entry->isUncacheable());
2151 // There should only be a single request responsible for generating
2152 // Writebacks/CleanEvicts.
2153 assert(wb_entry->getNumTargets() == 1);
2154 PacketPtr wb_pkt = wb_entry->getTarget()->pkt;
2155 assert(wb_pkt->isEviction());
2156
2157 if (pkt->isEviction()) {
2158 // if the block is found in the write queue, set the BLOCK_CACHED
2159 // flag for Writeback/CleanEvict snoop. On return the snoop will
2160 // propagate the BLOCK_CACHED flag in Writeback packets and prevent
2161 // any CleanEvicts from travelling down the memory hierarchy.
2162 pkt->setBlockCached();
2163 DPRINTF(Cache, "Squashing %s from lower cache on writequeue hit"
2164 " %#x\n", pkt->cmdString(), pkt->getAddr());
2165 return;
2166 }
2167
2168 // conceptually writebacks are no different to other blocks in
2169 // this cache, so the behaviour is modelled after handleSnoop,
2170 // the difference being that instead of querying the block
2171 // state to determine if it is dirty and writable, we use the
2172 // command and fields of the writeback packet
2173 bool respond = wb_pkt->cmd == MemCmd::WritebackDirty &&
2174 pkt->needsResponse() && pkt->cmd != MemCmd::InvalidateReq;
2175 bool have_writable = !wb_pkt->hasSharers();
2176 bool invalidate = pkt->isInvalidate();
2177
2178 if (!pkt->req->isUncacheable() && pkt->isRead() && !invalidate) {
2179 assert(!pkt->needsWritable());
2180 pkt->setHasSharers();
2181 wb_pkt->setHasSharers();
2182 }
2183
2184 if (respond) {
2185 pkt->setCacheResponding();
2186
2187 if (have_writable) {
2188 pkt->setResponderHadWritable();
2189 }
2190
2191 doTimingSupplyResponse(pkt, wb_pkt->getConstPtr<uint8_t>(),
2192 false, false);
2193 }
2194
2195 if (invalidate) {
2196 // Invalidation trumps our writeback... discard here
2197 // Note: markInService will remove entry from writeback buffer.
2198 markInService(wb_entry);
2199 delete wb_pkt;
2200 }
2201 }
2202
2203 // If this was a shared writeback, there may still be
2204 // other shared copies above that require invalidation.
2205 // We could be more selective and return here if the
2206 // request is non-exclusive or if the writeback is
2207 // exclusive.
2208 uint32_t snoop_delay = handleSnoop(pkt, blk, true, false, false);
2209
2210 // Override what we did when we first saw the snoop, as we now
2211 // also have the cost of the upwards snoops to account for
2212 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay, snoop_delay +
2213 lookupLatency * clockPeriod());
2214}
2215
2216bool
2217Cache::CpuSidePort::recvTimingSnoopResp(PacketPtr pkt)
2218{
2219 // Express snoop responses from master to slave, e.g., from L1 to L2
2220 cache->recvTimingSnoopResp(pkt);
2221 return true;
2222}
2223
2224Tick
2225Cache::recvAtomicSnoop(PacketPtr pkt)
2226{
2227 // Snoops shouldn't happen when bypassing caches
2228 assert(!system->bypassCaches());
2229
2230 // no need to snoop requests that are not in range.
2231 if (!inRange(pkt->getAddr())) {
2232 return 0;
2233 }
2234
2235 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
2236 uint32_t snoop_delay = handleSnoop(pkt, blk, false, false, false);
2237 return snoop_delay + lookupLatency * clockPeriod();
2238}
2239
2240
2241QueueEntry*
2242Cache::getNextQueueEntry()
2243{
2244 // Check both MSHR queue and write buffer for potential requests,
2245 // note that null does not mean there is no request, it could
2246 // simply be that it is not ready
2247 MSHR *miss_mshr = mshrQueue.getNext();
2248 WriteQueueEntry *wq_entry = writeBuffer.getNext();
2249
2250 // If we got a write buffer request ready, first priority is a
2251 // full write buffer, otherwise we favour the miss requests
2252 if (wq_entry && (writeBuffer.isFull() || !miss_mshr)) {
2253 // need to search MSHR queue for conflicting earlier miss.
2254 MSHR *conflict_mshr =
2255 mshrQueue.findPending(wq_entry->blkAddr,
2256 wq_entry->isSecure);
2257
2258 if (conflict_mshr && conflict_mshr->order < wq_entry->order) {
2259 // Service misses in order until conflict is cleared.
2260 return conflict_mshr;
2261
2262 // @todo Note that we ignore the ready time of the conflict here
2263 }
2264
2265 // No conflicts; issue write
2266 return wq_entry;
2267 } else if (miss_mshr) {
2268 // need to check for conflicting earlier writeback
2269 WriteQueueEntry *conflict_mshr =
2270 writeBuffer.findPending(miss_mshr->blkAddr,
2271 miss_mshr->isSecure);
2272 if (conflict_mshr) {
2273 // not sure why we don't check order here... it was in the
2274 // original code but commented out.
2275
2276 // The only way this happens is if we are
2277 // doing a write and we didn't have permissions
2278 // then subsequently saw a writeback (owned got evicted)
2279 // We need to make sure to perform the writeback first
2280 // To preserve the dirty data, then we can issue the write
2281
2282 // should we return wq_entry here instead? I.e. do we
2283 // have to flush writes in order? I don't think so... not
2284 // for Alpha anyway. Maybe for x86?
2285 return conflict_mshr;
2286
2287 // @todo Note that we ignore the ready time of the conflict here
2288 }
2289
2290 // No conflicts; issue read
2291 return miss_mshr;
2292 }
2293
2294 // fall through... no pending requests. Try a prefetch.
2295 assert(!miss_mshr && !wq_entry);
2296 if (prefetcher && mshrQueue.canPrefetch()) {
2297 // If we have a miss queue slot, we can try a prefetch
2298 PacketPtr pkt = prefetcher->getPacket();
2299 if (pkt) {
2300 Addr pf_addr = blockAlign(pkt->getAddr());
2301 if (!tags->findBlock(pf_addr, pkt->isSecure()) &&
2302 !mshrQueue.findMatch(pf_addr, pkt->isSecure()) &&
2303 !writeBuffer.findMatch(pf_addr, pkt->isSecure())) {
2304 // Update statistic on number of prefetches issued
2305 // (hwpf_mshr_misses)
2306 assert(pkt->req->masterId() < system->maxMasters());
2307 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++;
2308
2309 // allocate an MSHR and return it, note
2310 // that we send the packet straight away, so do not
2311 // schedule the send
2312 return allocateMissBuffer(pkt, curTick(), false);
2313 } else {
2314 // free the request and packet
2315 delete pkt->req;
2316 delete pkt;
2317 }
2318 }
2319 }
2320
2321 return nullptr;
2322}
2323
2324bool
2325Cache::isCachedAbove(PacketPtr pkt, bool is_timing) const
2326{
2327 if (!forwardSnoops)
2328 return false;
2329 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and
2330 // Writeback snoops into upper level caches to check for copies of the
2331 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict
2332 // packet, the cache can inform the crossbar below of presence or absence
2333 // of the block.
2334 if (is_timing) {
2335 Packet snoop_pkt(pkt, true, false);
2336 snoop_pkt.setExpressSnoop();
2337 // Assert that packet is either Writeback or CleanEvict and not a
2338 // prefetch request because prefetch requests need an MSHR and may
2339 // generate a snoop response.
2340 assert(pkt->isEviction());
2341 snoop_pkt.senderState = nullptr;
2342 cpuSidePort->sendTimingSnoopReq(&snoop_pkt);
2343 // Writeback/CleanEvict snoops do not generate a snoop response.
2344 assert(!(snoop_pkt.cacheResponding()));
2345 return snoop_pkt.isBlockCached();
2346 } else {
2347 cpuSidePort->sendAtomicSnoop(pkt);
2348 return pkt->isBlockCached();
2349 }
2350}
2351
2352Tick
2353Cache::nextQueueReadyTime() const
2354{
2355 Tick nextReady = std::min(mshrQueue.nextReadyTime(),
2356 writeBuffer.nextReadyTime());
2357
2358 // Don't signal prefetch ready time if no MSHRs available
2359 // Will signal once enoguh MSHRs are deallocated
2360 if (prefetcher && mshrQueue.canPrefetch()) {
2361 nextReady = std::min(nextReady,
2362 prefetcher->nextPrefetchReadyTime());
2363 }
2364
2365 return nextReady;
2366}
2367
2368bool
2369Cache::sendMSHRQueuePacket(MSHR* mshr)
2370{
2371 assert(mshr);
2372
2373 // use request from 1st target
2374 PacketPtr tgt_pkt = mshr->getTarget()->pkt;
2375
2376 DPRINTF(Cache, "%s MSHR %s for addr %#llx size %d\n", __func__,
2377 tgt_pkt->cmdString(), tgt_pkt->getAddr(),
2378 tgt_pkt->getSize());
2379
2380 CacheBlk *blk = tags->findBlock(mshr->blkAddr, mshr->isSecure);
2381
2382 if (tgt_pkt->cmd == MemCmd::HardPFReq && forwardSnoops) {
2383 // we should never have hardware prefetches to allocated
2384 // blocks
2385 assert(blk == nullptr);
2386
2387 // We need to check the caches above us to verify that
2388 // they don't have a copy of this block in the dirty state
2389 // at the moment. Without this check we could get a stale
2390 // copy from memory that might get used in place of the
2391 // dirty one.
2392 Packet snoop_pkt(tgt_pkt, true, false);
2393 snoop_pkt.setExpressSnoop();
2394 // We are sending this packet upwards, but if it hits we will
2395 // get a snoop response that we end up treating just like a
2396 // normal response, hence it needs the MSHR as its sender
2397 // state
2398 snoop_pkt.senderState = mshr;
2399 cpuSidePort->sendTimingSnoopReq(&snoop_pkt);
2400
2401 // Check to see if the prefetch was squashed by an upper cache (to
2402 // prevent us from grabbing the line) or if a Check to see if a
2403 // writeback arrived between the time the prefetch was placed in
2404 // the MSHRs and when it was selected to be sent or if the
2405 // prefetch was squashed by an upper cache.
2406
2407 // It is important to check cacheResponding before
2408 // prefetchSquashed. If another cache has committed to
2409 // responding, it will be sending a dirty response which will
2410 // arrive at the MSHR allocated for this request. Checking the
2411 // prefetchSquash first may result in the MSHR being
2412 // prematurely deallocated.
2413 if (snoop_pkt.cacheResponding()) {
2414 auto M5_VAR_USED r = outstandingSnoop.insert(snoop_pkt.req);
2415 assert(r.second);
2416
2417 // if we are getting a snoop response with no sharers it
2418 // will be allocated as Modified
2419 bool pending_modified_resp = !snoop_pkt.hasSharers();
2420 markInService(mshr, pending_modified_resp);
2421
2422 DPRINTF(Cache, "Upward snoop of prefetch for addr"
2423 " %#x (%s) hit\n",
2424 tgt_pkt->getAddr(), tgt_pkt->isSecure()? "s": "ns");
2425 return false;
2426 }
2427
2428 if (snoop_pkt.isBlockCached()) {
2429 DPRINTF(Cache, "Block present, prefetch squashed by cache. "
2430 "Deallocating mshr target %#x.\n",
2431 mshr->blkAddr);
2432
2433 // Deallocate the mshr target
2434 if (mshrQueue.forceDeallocateTarget(mshr)) {
2435 // Clear block if this deallocation resulted freed an
2436 // mshr when all had previously been utilized
2437 clearBlocked(Blocked_NoMSHRs);
2438 }
2439 return false;
2440 }
2441 }
2442
2443 // either a prefetch that is not present upstream, or a normal
2444 // MSHR request, proceed to get the packet to send downstream
2445 PacketPtr pkt = createMissPacket(tgt_pkt, blk, mshr->needsWritable());
2446
2447 mshr->isForward = (pkt == nullptr);
2448
2449 if (mshr->isForward) {
2450 // not a cache block request, but a response is expected
2451 // make copy of current packet to forward, keep current
2452 // copy for response handling
2453 pkt = new Packet(tgt_pkt, false, true);
2454 assert(!pkt->isWrite());
2455 }
2456
2457 // play it safe and append (rather than set) the sender state,
2458 // as forwarded packets may already have existing state
2459 pkt->pushSenderState(mshr);
2460
2461 if (!memSidePort->sendTimingReq(pkt)) {
2462 // we are awaiting a retry, but we
2463 // delete the packet and will be creating a new packet
2464 // when we get the opportunity
2465 delete pkt;
2466
2467 // note that we have now masked any requestBus and
2468 // schedSendEvent (we will wait for a retry before
2469 // doing anything), and this is so even if we do not
2470 // care about this packet and might override it before
2471 // it gets retried
2472 return true;
2473 } else {
2474 // As part of the call to sendTimingReq the packet is
2475 // forwarded to all neighbouring caches (and any caches
2476 // above them) as a snoop. Thus at this point we know if
2477 // any of the neighbouring caches are responding, and if
2478 // so, we know it is dirty, and we can determine if it is
2479 // being passed as Modified, making our MSHR the ordering
2480 // point
2481 bool pending_modified_resp = !pkt->hasSharers() &&
2482 pkt->cacheResponding();
2483 markInService(mshr, pending_modified_resp);
2484 return false;
2485 }
2486}
2487
2488bool
2489Cache::sendWriteQueuePacket(WriteQueueEntry* wq_entry)
2490{
2491 assert(wq_entry);
2492
2493 // always a single target for write queue entries
2494 PacketPtr tgt_pkt = wq_entry->getTarget()->pkt;
2495
2496 DPRINTF(Cache, "%s write %s for addr %#llx size %d\n", __func__,
2497 tgt_pkt->cmdString(), tgt_pkt->getAddr(),
2498 tgt_pkt->getSize());
2499
2500 // forward as is, both for evictions and uncacheable writes
2501 if (!memSidePort->sendTimingReq(tgt_pkt)) {
2502 // note that we have now masked any requestBus and
2503 // schedSendEvent (we will wait for a retry before
2504 // doing anything), and this is so even if we do not
2505 // care about this packet and might override it before
2506 // it gets retried
2507 return true;
2508 } else {
2509 markInService(wq_entry);
2510 return false;
2511 }
2512}
2513
2514void
2515Cache::serialize(CheckpointOut &cp) const
2516{
2517 bool dirty(isDirty());
2518
2519 if (dirty) {
2520 warn("*** The cache still contains dirty data. ***\n");
2521 warn(" Make sure to drain the system using the correct flags.\n");
2522 warn(" This checkpoint will not restore correctly and dirty data "
2523 " in the cache will be lost!\n");
2524 }
2525
2526 // Since we don't checkpoint the data in the cache, any dirty data
2527 // will be lost when restoring from a checkpoint of a system that
2528 // wasn't drained properly. Flag the checkpoint as invalid if the
2529 // cache contains dirty data.
2530 bool bad_checkpoint(dirty);
2531 SERIALIZE_SCALAR(bad_checkpoint);
2532}
2533
2534void
2535Cache::unserialize(CheckpointIn &cp)
2536{
2537 bool bad_checkpoint;
2538 UNSERIALIZE_SCALAR(bad_checkpoint);
2539 if (bad_checkpoint) {
2540 fatal("Restoring from checkpoints with dirty caches is not supported "
2541 "in the classic memory system. Please remove any caches or "
2542 " drain them properly before taking checkpoints.\n");
2543 }
2544}
2545
2546///////////////
2547//
2548// CpuSidePort
2549//
2550///////////////
2551
2552AddrRangeList
2553Cache::CpuSidePort::getAddrRanges() const
2554{
2555 return cache->getAddrRanges();
2556}
2557
2558bool
2559Cache::CpuSidePort::recvTimingReq(PacketPtr pkt)
2560{
2561 assert(!cache->system->bypassCaches());
2562
2563 bool success = false;
2564
2565 // always let express snoop packets through if even if blocked
2566 if (pkt->isExpressSnoop()) {
2567 // do not change the current retry state
2568 bool M5_VAR_USED bypass_success = cache->recvTimingReq(pkt);
2569 assert(bypass_success);
2570 return true;
2571 } else if (blocked || mustSendRetry) {
2572 // either already committed to send a retry, or blocked
2573 success = false;
2574 } else {
2575 // pass it on to the cache, and let the cache decide if we
2576 // have to retry or not
2577 success = cache->recvTimingReq(pkt);
2578 }
2579
2580 // remember if we have to retry
2581 mustSendRetry = !success;
2582 return success;
2583}
2584
2585Tick
2586Cache::CpuSidePort::recvAtomic(PacketPtr pkt)
2587{
2588 return cache->recvAtomic(pkt);
2589}
2590
2591void
2592Cache::CpuSidePort::recvFunctional(PacketPtr pkt)
2593{
2594 // functional request
2595 cache->functionalAccess(pkt, true);
2596}
2597
2598Cache::
2599CpuSidePort::CpuSidePort(const std::string &_name, Cache *_cache,
2600 const std::string &_label)
2601 : BaseCache::CacheSlavePort(_name, _cache, _label), cache(_cache)
2602{
2603}
2604
2605Cache*
2606CacheParams::create()
2607{
2608 assert(tags);
2609
2610 return new Cache(this);
2611}
2612///////////////
2613//
2614// MemSidePort
2615//
2616///////////////
2617
2618bool
2619Cache::MemSidePort::recvTimingResp(PacketPtr pkt)
2620{
2621 cache->recvTimingResp(pkt);
2622 return true;
2623}
2624
2625// Express snooping requests to memside port
2626void
2627Cache::MemSidePort::recvTimingSnoopReq(PacketPtr pkt)
2628{
2629 // handle snooping requests
2630 cache->recvTimingSnoopReq(pkt);
2631}
2632
2633Tick
2634Cache::MemSidePort::recvAtomicSnoop(PacketPtr pkt)
2635{
2636 return cache->recvAtomicSnoop(pkt);
2637}
2638
2639void
2640Cache::MemSidePort::recvFunctionalSnoop(PacketPtr pkt)
2641{
2642 // functional snoop (note that in contrast to atomic we don't have
2643 // a specific functionalSnoop method, as they have the same
2644 // behaviour regardless)
2645 cache->functionalAccess(pkt, false);
2646}
2647
2648void
2649Cache::CacheReqPacketQueue::sendDeferredPacket()
2650{
2651 // sanity check
2652 assert(!waitingOnRetry);
2653
2654 // there should never be any deferred request packets in the
2655 // queue, instead we resly on the cache to provide the packets
2656 // from the MSHR queue or write queue
2657 assert(deferredPacketReadyTime() == MaxTick);
2658
2659 // check for request packets (requests & writebacks)
2660 QueueEntry* entry = cache.getNextQueueEntry();
2661
2662 if (!entry) {
2663 // can happen if e.g. we attempt a writeback and fail, but
2664 // before the retry, the writeback is eliminated because
2665 // we snoop another cache's ReadEx.
2666 } else {
2667 // let our snoop responses go first if there are responses to
2668 // the same addresses
2669 if (checkConflictingSnoop(entry->blkAddr)) {
2670 return;
2671 }
2672 waitingOnRetry = entry->sendPacket(cache);
2673 }
2674
2675 // if we succeeded and are not waiting for a retry, schedule the
2676 // next send considering when the next queue is ready, note that
2677 // snoop responses have their own packet queue and thus schedule
2678 // their own events
2679 if (!waitingOnRetry) {
2680 schedSendEvent(cache.nextQueueReadyTime());
2681 }
2682}
2683
2684Cache::
2685MemSidePort::MemSidePort(const std::string &_name, Cache *_cache,
2686 const std::string &_label)
2687 : BaseCache::CacheMasterPort(_name, _cache, _reqQueue, _snoopRespQueue),
2688 _reqQueue(*_cache, *this, _snoopRespQueue, _label),
2689 _snoopRespQueue(*_cache, *this, _label), cache(_cache)
2690{
2691}
| 1374 assert(blk != nullptr);
1375
1376 // treat as a fill, and discard the invalidation
1377 // response
1378 is_fill = true;
1379 is_invalidate = false;
1380 }
1381
1382 if (is_fill) {
1383 satisfyRequest(tgt_pkt, blk, true, mshr->hasPostDowngrade());
1384
1385 // How many bytes past the first request is this one
1386 int transfer_offset =
1387 tgt_pkt->getOffset(blkSize) - initial_offset;
1388 if (transfer_offset < 0) {
1389 transfer_offset += blkSize;
1390 }
1391
1392 // If not critical word (offset) return payloadDelay.
1393 // responseLatency is the latency of the return path
1394 // from lower level caches/memory to an upper level cache or
1395 // the core.
1396 completion_time += clockEdge(responseLatency) +
1397 (transfer_offset ? pkt->payloadDelay : 0);
1398
1399 assert(!tgt_pkt->req->isUncacheable());
1400
1401 assert(tgt_pkt->req->masterId() < system->maxMasters());
1402 missLatency[tgt_pkt->cmdToIndex()][tgt_pkt->req->masterId()] +=
1403 completion_time - target->recvTime;
1404 } else if (pkt->cmd == MemCmd::UpgradeFailResp) {
1405 // failed StoreCond upgrade
1406 assert(tgt_pkt->cmd == MemCmd::StoreCondReq ||
1407 tgt_pkt->cmd == MemCmd::StoreCondFailReq ||
1408 tgt_pkt->cmd == MemCmd::SCUpgradeFailReq);
1409 // responseLatency is the latency of the return path
1410 // from lower level caches/memory to an upper level cache or
1411 // the core.
1412 completion_time += clockEdge(responseLatency) +
1413 pkt->payloadDelay;
1414 tgt_pkt->req->setExtraData(0);
1415 } else {
1416 // not a cache fill, just forwarding response
1417 // responseLatency is the latency of the return path
1418 // from lower level cahces/memory to the core.
1419 completion_time += clockEdge(responseLatency) +
1420 pkt->payloadDelay;
1421 if (pkt->isRead() && !is_error) {
1422 // sanity check
1423 assert(pkt->getAddr() == tgt_pkt->getAddr());
1424 assert(pkt->getSize() >= tgt_pkt->getSize());
1425
1426 tgt_pkt->setData(pkt->getConstPtr<uint8_t>());
1427 }
1428 }
1429 tgt_pkt->makeTimingResponse();
1430 // if this packet is an error copy that to the new packet
1431 if (is_error)
1432 tgt_pkt->copyError(pkt);
1433 if (tgt_pkt->cmd == MemCmd::ReadResp &&
1434 (is_invalidate || mshr->hasPostInvalidate())) {
1435 // If intermediate cache got ReadRespWithInvalidate,
1436 // propagate that. Response should not have
1437 // isInvalidate() set otherwise.
1438 tgt_pkt->cmd = MemCmd::ReadRespWithInvalidate;
1439 DPRINTF(Cache, "%s updated cmd to %s for addr %#llx\n",
1440 __func__, tgt_pkt->cmdString(), tgt_pkt->getAddr());
1441 }
1442 // Reset the bus additional time as it is now accounted for
1443 tgt_pkt->headerDelay = tgt_pkt->payloadDelay = 0;
1444 cpuSidePort->schedTimingResp(tgt_pkt, completion_time, true);
1445 break;
1446
1447 case MSHR::Target::FromPrefetcher:
1448 assert(tgt_pkt->cmd == MemCmd::HardPFReq);
1449 if (blk)
1450 blk->status |= BlkHWPrefetched;
1451 delete tgt_pkt->req;
1452 delete tgt_pkt;
1453 break;
1454
1455 case MSHR::Target::FromSnoop:
1456 // I don't believe that a snoop can be in an error state
1457 assert(!is_error);
1458 // response to snoop request
1459 DPRINTF(Cache, "processing deferred snoop...\n");
1460 assert(!(is_invalidate && !mshr->hasPostInvalidate()));
1461 handleSnoop(tgt_pkt, blk, true, true, mshr->hasPostInvalidate());
1462 break;
1463
1464 default:
1465 panic("Illegal target->source enum %d\n", target->source);
1466 }
1467
1468 mshr->popTarget();
1469 }
1470
1471 maintainClusivity(from_cache, blk);
1472
1473 if (blk && blk->isValid()) {
1474 // an invalidate response stemming from a write line request
1475 // should not invalidate the block, so check if the
1476 // invalidation should be discarded
1477 if (is_invalidate || mshr->hasPostInvalidate()) {
1478 invalidateBlock(blk);
1479 } else if (mshr->hasPostDowngrade()) {
1480 blk->status &= ~BlkWritable;
1481 }
1482 }
1483
1484 if (mshr->promoteDeferredTargets()) {
1485 // avoid later read getting stale data while write miss is
1486 // outstanding.. see comment in timingAccess()
1487 if (blk) {
1488 blk->status &= ~BlkReadable;
1489 }
1490 mshrQueue.markPending(mshr);
1491 schedMemSideSendEvent(clockEdge() + pkt->payloadDelay);
1492 } else {
1493 mshrQueue.deallocate(mshr);
1494 if (wasFull && !mshrQueue.isFull()) {
1495 clearBlocked(Blocked_NoMSHRs);
1496 }
1497
1498 // Request the bus for a prefetch if this deallocation freed enough
1499 // MSHRs for a prefetch to take place
1500 if (prefetcher && mshrQueue.canPrefetch()) {
1501 Tick next_pf_time = std::max(prefetcher->nextPrefetchReadyTime(),
1502 clockEdge());
1503 if (next_pf_time != MaxTick)
1504 schedMemSideSendEvent(next_pf_time);
1505 }
1506 }
1507 // reset the xbar additional timinig as it is now accounted for
1508 pkt->headerDelay = pkt->payloadDelay = 0;
1509
1510 // copy writebacks to write buffer
1511 doWritebacks(writebacks, forward_time);
1512
1513 // if we used temp block, check to see if its valid and then clear it out
1514 if (blk == tempBlock && tempBlock->isValid()) {
1515 // We use forwardLatency here because we are copying
1516 // Writebacks/CleanEvicts to write buffer. It specifies the latency to
1517 // allocate an internal buffer and to schedule an event to the
1518 // queued port.
1519 if (blk->isDirty() || writebackClean) {
1520 PacketPtr wbPkt = writebackBlk(blk);
1521 allocateWriteBuffer(wbPkt, forward_time);
1522 // Set BLOCK_CACHED flag if cached above.
1523 if (isCachedAbove(wbPkt))
1524 wbPkt->setBlockCached();
1525 } else {
1526 PacketPtr wcPkt = cleanEvictBlk(blk);
1527 // Check to see if block is cached above. If not allocate
1528 // write buffer
1529 if (isCachedAbove(wcPkt))
1530 delete wcPkt;
1531 else
1532 allocateWriteBuffer(wcPkt, forward_time);
1533 }
1534 blk->invalidate();
1535 }
1536
1537 DPRINTF(CacheVerbose, "Leaving %s with %s for addr %#llx\n", __func__,
1538 pkt->cmdString(), pkt->getAddr());
1539 delete pkt;
1540}
1541
1542PacketPtr
1543Cache::writebackBlk(CacheBlk *blk)
1544{
1545 chatty_assert(!isReadOnly || writebackClean,
1546 "Writeback from read-only cache");
1547 assert(blk && blk->isValid() && (blk->isDirty() || writebackClean));
1548
1549 writebacks[Request::wbMasterId]++;
1550
1551 Request *req = new Request(tags->regenerateBlkAddr(blk->tag, blk->set),
1552 blkSize, 0, Request::wbMasterId);
1553 if (blk->isSecure())
1554 req->setFlags(Request::SECURE);
1555
1556 req->taskId(blk->task_id);
1557 blk->task_id= ContextSwitchTaskId::Unknown;
1558 blk->tickInserted = curTick();
1559
1560 PacketPtr pkt =
1561 new Packet(req, blk->isDirty() ?
1562 MemCmd::WritebackDirty : MemCmd::WritebackClean);
1563
1564 DPRINTF(Cache, "Create Writeback %#llx writable: %d, dirty: %d\n",
1565 pkt->getAddr(), blk->isWritable(), blk->isDirty());
1566
1567 if (blk->isWritable()) {
1568 // not asserting shared means we pass the block in modified
1569 // state, mark our own block non-writeable
1570 blk->status &= ~BlkWritable;
1571 } else {
1572 // we are in the Owned state, tell the receiver
1573 pkt->setHasSharers();
1574 }
1575
1576 // make sure the block is not marked dirty
1577 blk->status &= ~BlkDirty;
1578
1579 pkt->allocate();
1580 std::memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize);
1581
1582 return pkt;
1583}
1584
1585PacketPtr
1586Cache::cleanEvictBlk(CacheBlk *blk)
1587{
1588 assert(!writebackClean);
1589 assert(blk && blk->isValid() && !blk->isDirty());
1590 // Creating a zero sized write, a message to the snoop filter
1591 Request *req =
1592 new Request(tags->regenerateBlkAddr(blk->tag, blk->set), blkSize, 0,
1593 Request::wbMasterId);
1594 if (blk->isSecure())
1595 req->setFlags(Request::SECURE);
1596
1597 req->taskId(blk->task_id);
1598 blk->task_id = ContextSwitchTaskId::Unknown;
1599 blk->tickInserted = curTick();
1600
1601 PacketPtr pkt = new Packet(req, MemCmd::CleanEvict);
1602 pkt->allocate();
1603 DPRINTF(Cache, "%s%s %x Create CleanEvict\n", pkt->cmdString(),
1604 pkt->req->isInstFetch() ? " (ifetch)" : "",
1605 pkt->getAddr());
1606
1607 return pkt;
1608}
1609
1610void
1611Cache::memWriteback()
1612{
1613 CacheBlkVisitorWrapper visitor(*this, &Cache::writebackVisitor);
1614 tags->forEachBlk(visitor);
1615}
1616
1617void
1618Cache::memInvalidate()
1619{
1620 CacheBlkVisitorWrapper visitor(*this, &Cache::invalidateVisitor);
1621 tags->forEachBlk(visitor);
1622}
1623
1624bool
1625Cache::isDirty() const
1626{
1627 CacheBlkIsDirtyVisitor visitor;
1628 tags->forEachBlk(visitor);
1629
1630 return visitor.isDirty();
1631}
1632
1633bool
1634Cache::writebackVisitor(CacheBlk &blk)
1635{
1636 if (blk.isDirty()) {
1637 assert(blk.isValid());
1638
1639 Request request(tags->regenerateBlkAddr(blk.tag, blk.set),
1640 blkSize, 0, Request::funcMasterId);
1641 request.taskId(blk.task_id);
1642
1643 Packet packet(&request, MemCmd::WriteReq);
1644 packet.dataStatic(blk.data);
1645
1646 memSidePort->sendFunctional(&packet);
1647
1648 blk.status &= ~BlkDirty;
1649 }
1650
1651 return true;
1652}
1653
1654bool
1655Cache::invalidateVisitor(CacheBlk &blk)
1656{
1657
1658 if (blk.isDirty())
1659 warn_once("Invalidating dirty cache lines. Expect things to break.\n");
1660
1661 if (blk.isValid()) {
1662 assert(!blk.isDirty());
1663 tags->invalidate(&blk);
1664 blk.invalidate();
1665 }
1666
1667 return true;
1668}
1669
1670CacheBlk*
1671Cache::allocateBlock(Addr addr, bool is_secure, PacketList &writebacks)
1672{
1673 CacheBlk *blk = tags->findVictim(addr);
1674
1675 // It is valid to return nullptr if there is no victim
1676 if (!blk)
1677 return nullptr;
1678
1679 if (blk->isValid()) {
1680 Addr repl_addr = tags->regenerateBlkAddr(blk->tag, blk->set);
1681 MSHR *repl_mshr = mshrQueue.findMatch(repl_addr, blk->isSecure());
1682 if (repl_mshr) {
1683 // must be an outstanding upgrade request
1684 // on a block we're about to replace...
1685 assert(!blk->isWritable() || blk->isDirty());
1686 assert(repl_mshr->needsWritable());
1687 // too hard to replace block with transient state
1688 // allocation failed, block not inserted
1689 return nullptr;
1690 } else {
1691 DPRINTF(Cache, "replacement: replacing %#llx (%s) with %#llx "
1692 "(%s): %s\n", repl_addr, blk->isSecure() ? "s" : "ns",
1693 addr, is_secure ? "s" : "ns",
1694 blk->isDirty() ? "writeback" : "clean");
1695
1696 if (blk->wasPrefetched()) {
1697 unusedPrefetches++;
1698 }
1699 // Will send up Writeback/CleanEvict snoops via isCachedAbove
1700 // when pushing this writeback list into the write buffer.
1701 if (blk->isDirty() || writebackClean) {
1702 // Save writeback packet for handling by caller
1703 writebacks.push_back(writebackBlk(blk));
1704 } else {
1705 writebacks.push_back(cleanEvictBlk(blk));
1706 }
1707 }
1708 }
1709
1710 return blk;
1711}
1712
1713void
1714Cache::invalidateBlock(CacheBlk *blk)
1715{
1716 if (blk != tempBlock)
1717 tags->invalidate(blk);
1718 blk->invalidate();
1719}
1720
1721// Note that the reason we return a list of writebacks rather than
1722// inserting them directly in the write buffer is that this function
1723// is called by both atomic and timing-mode accesses, and in atomic
1724// mode we don't mess with the write buffer (we just perform the
1725// writebacks atomically once the original request is complete).
1726CacheBlk*
1727Cache::handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks,
1728 bool allocate)
1729{
1730 assert(pkt->isResponse() || pkt->cmd == MemCmd::WriteLineReq);
1731 Addr addr = pkt->getAddr();
1732 bool is_secure = pkt->isSecure();
1733#if TRACING_ON
1734 CacheBlk::State old_state = blk ? blk->status : 0;
1735#endif
1736
1737 // When handling a fill, we should have no writes to this line.
1738 assert(addr == blockAlign(addr));
1739 assert(!writeBuffer.findMatch(addr, is_secure));
1740
1741 if (blk == nullptr) {
1742 // better have read new data...
1743 assert(pkt->hasData());
1744
1745 // only read responses and write-line requests have data;
1746 // note that we don't write the data here for write-line - that
1747 // happens in the subsequent call to satisfyRequest
1748 assert(pkt->isRead() || pkt->cmd == MemCmd::WriteLineReq);
1749
1750 // need to do a replacement if allocating, otherwise we stick
1751 // with the temporary storage
1752 blk = allocate ? allocateBlock(addr, is_secure, writebacks) : nullptr;
1753
1754 if (blk == nullptr) {
1755 // No replaceable block or a mostly exclusive
1756 // cache... just use temporary storage to complete the
1757 // current request and then get rid of it
1758 assert(!tempBlock->isValid());
1759 blk = tempBlock;
1760 tempBlock->set = tags->extractSet(addr);
1761 tempBlock->tag = tags->extractTag(addr);
1762 // @todo: set security state as well...
1763 DPRINTF(Cache, "using temp block for %#llx (%s)\n", addr,
1764 is_secure ? "s" : "ns");
1765 } else {
1766 tags->insertBlock(pkt, blk);
1767 }
1768
1769 // we should never be overwriting a valid block
1770 assert(!blk->isValid());
1771 } else {
1772 // existing block... probably an upgrade
1773 assert(blk->tag == tags->extractTag(addr));
1774 // either we're getting new data or the block should already be valid
1775 assert(pkt->hasData() || blk->isValid());
1776 // don't clear block status... if block is already dirty we
1777 // don't want to lose that
1778 }
1779
1780 if (is_secure)
1781 blk->status |= BlkSecure;
1782 blk->status |= BlkValid | BlkReadable;
1783
1784 // sanity check for whole-line writes, which should always be
1785 // marked as writable as part of the fill, and then later marked
1786 // dirty as part of satisfyRequest
1787 if (pkt->cmd == MemCmd::WriteLineReq) {
1788 assert(!pkt->hasSharers());
1789 // at the moment other caches do not respond to the
1790 // invalidation requests corresponding to a whole-line write
1791 assert(!pkt->cacheResponding());
1792 }
1793
1794 // here we deal with setting the appropriate state of the line,
1795 // and we start by looking at the hasSharers flag, and ignore the
1796 // cacheResponding flag (normally signalling dirty data) if the
1797 // packet has sharers, thus the line is never allocated as Owned
1798 // (dirty but not writable), and always ends up being either
1799 // Shared, Exclusive or Modified, see Packet::setCacheResponding
1800 // for more details
1801 if (!pkt->hasSharers()) {
1802 // we could get a writable line from memory (rather than a
1803 // cache) even in a read-only cache, note that we set this bit
1804 // even for a read-only cache, possibly revisit this decision
1805 blk->status |= BlkWritable;
1806
1807 // check if we got this via cache-to-cache transfer (i.e., from a
1808 // cache that had the block in Modified or Owned state)
1809 if (pkt->cacheResponding()) {
1810 // we got the block in Modified state, and invalidated the
1811 // owners copy
1812 blk->status |= BlkDirty;
1813
1814 chatty_assert(!isReadOnly, "Should never see dirty snoop response "
1815 "in read-only cache %s\n", name());
1816 }
1817 }
1818
1819 DPRINTF(Cache, "Block addr %#llx (%s) moving from state %x to %s\n",
1820 addr, is_secure ? "s" : "ns", old_state, blk->print());
1821
1822 // if we got new data, copy it in (checking for a read response
1823 // and a response that has data is the same in the end)
1824 if (pkt->isRead()) {
1825 // sanity checks
1826 assert(pkt->hasData());
1827 assert(pkt->getSize() == blkSize);
1828
1829 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize);
1830 }
1831 // We pay for fillLatency here.
1832 blk->whenReady = clockEdge() + fillLatency * clockPeriod() +
1833 pkt->payloadDelay;
1834
1835 return blk;
1836}
1837
1838
1839/////////////////////////////////////////////////////
1840//
1841// Snoop path: requests coming in from the memory side
1842//
1843/////////////////////////////////////////////////////
1844
1845void
1846Cache::doTimingSupplyResponse(PacketPtr req_pkt, const uint8_t *blk_data,
1847 bool already_copied, bool pending_inval)
1848{
1849 // sanity check
1850 assert(req_pkt->isRequest());
1851 assert(req_pkt->needsResponse());
1852
1853 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__,
1854 req_pkt->cmdString(), req_pkt->getAddr(), req_pkt->getSize());
1855 // timing-mode snoop responses require a new packet, unless we
1856 // already made a copy...
1857 PacketPtr pkt = req_pkt;
1858 if (!already_copied)
1859 // do not clear flags, and allocate space for data if the
1860 // packet needs it (the only packets that carry data are read
1861 // responses)
1862 pkt = new Packet(req_pkt, false, req_pkt->isRead());
1863
1864 assert(req_pkt->req->isUncacheable() || req_pkt->isInvalidate() ||
1865 pkt->hasSharers());
1866 pkt->makeTimingResponse();
1867 if (pkt->isRead()) {
1868 pkt->setDataFromBlock(blk_data, blkSize);
1869 }
1870 if (pkt->cmd == MemCmd::ReadResp && pending_inval) {
1871 // Assume we defer a response to a read from a far-away cache
1872 // A, then later defer a ReadExcl from a cache B on the same
1873 // bus as us. We'll assert cacheResponding in both cases, but
1874 // in the latter case cacheResponding will keep the
1875 // invalidation from reaching cache A. This special response
1876 // tells cache A that it gets the block to satisfy its read,
1877 // but must immediately invalidate it.
1878 pkt->cmd = MemCmd::ReadRespWithInvalidate;
1879 }
1880 // Here we consider forward_time, paying for just forward latency and
1881 // also charging the delay provided by the xbar.
1882 // forward_time is used as send_time in next allocateWriteBuffer().
1883 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
1884 // Here we reset the timing of the packet.
1885 pkt->headerDelay = pkt->payloadDelay = 0;
1886 DPRINTF(CacheVerbose,
1887 "%s created response: %s addr %#llx size %d tick: %lu\n",
1888 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize(),
1889 forward_time);
1890 memSidePort->schedTimingSnoopResp(pkt, forward_time, true);
1891}
1892
1893uint32_t
1894Cache::handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing,
1895 bool is_deferred, bool pending_inval)
1896{
1897 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d\n", __func__,
1898 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
1899 // deferred snoops can only happen in timing mode
1900 assert(!(is_deferred && !is_timing));
1901 // pending_inval only makes sense on deferred snoops
1902 assert(!(pending_inval && !is_deferred));
1903 assert(pkt->isRequest());
1904
1905 // the packet may get modified if we or a forwarded snooper
1906 // responds in atomic mode, so remember a few things about the
1907 // original packet up front
1908 bool invalidate = pkt->isInvalidate();
1909 bool M5_VAR_USED needs_writable = pkt->needsWritable();
1910
1911 // at the moment we could get an uncacheable write which does not
1912 // have the invalidate flag, and we need a suitable way of dealing
1913 // with this case
1914 panic_if(invalidate && pkt->req->isUncacheable(),
1915 "%s got an invalidating uncacheable snoop request %s to %#llx",
1916 name(), pkt->cmdString(), pkt->getAddr());
1917
1918 uint32_t snoop_delay = 0;
1919
1920 if (forwardSnoops) {
1921 // first propagate snoop upward to see if anyone above us wants to
1922 // handle it. save & restore packet src since it will get
1923 // rewritten to be relative to cpu-side bus (if any)
1924 bool alreadyResponded = pkt->cacheResponding();
1925 if (is_timing) {
1926 // copy the packet so that we can clear any flags before
1927 // forwarding it upwards, we also allocate data (passing
1928 // the pointer along in case of static data), in case
1929 // there is a snoop hit in upper levels
1930 Packet snoopPkt(pkt, true, true);
1931 snoopPkt.setExpressSnoop();
1932 // the snoop packet does not need to wait any additional
1933 // time
1934 snoopPkt.headerDelay = snoopPkt.payloadDelay = 0;
1935 cpuSidePort->sendTimingSnoopReq(&snoopPkt);
1936
1937 // add the header delay (including crossbar and snoop
1938 // delays) of the upward snoop to the snoop delay for this
1939 // cache
1940 snoop_delay += snoopPkt.headerDelay;
1941
1942 if (snoopPkt.cacheResponding()) {
1943 // cache-to-cache response from some upper cache
1944 assert(!alreadyResponded);
1945 pkt->setCacheResponding();
1946 }
1947 // upstream cache has the block, or has an outstanding
1948 // MSHR, pass the flag on
1949 if (snoopPkt.hasSharers()) {
1950 pkt->setHasSharers();
1951 }
1952 // If this request is a prefetch or clean evict and an upper level
1953 // signals block present, make sure to propagate the block
1954 // presence to the requester.
1955 if (snoopPkt.isBlockCached()) {
1956 pkt->setBlockCached();
1957 }
1958 } else {
1959 cpuSidePort->sendAtomicSnoop(pkt);
1960 if (!alreadyResponded && pkt->cacheResponding()) {
1961 // cache-to-cache response from some upper cache:
1962 // forward response to original requester
1963 assert(pkt->isResponse());
1964 }
1965 }
1966 }
1967
1968 if (!blk || !blk->isValid()) {
1969 if (is_deferred) {
1970 // we no longer have the block, and will not respond, but a
1971 // packet was allocated in MSHR::handleSnoop and we have
1972 // to delete it
1973 assert(pkt->needsResponse());
1974
1975 // we have passed the block to a cache upstream, that
1976 // cache should be responding
1977 assert(pkt->cacheResponding());
1978
1979 delete pkt;
1980 }
1981
1982 DPRINTF(CacheVerbose, "%s snoop miss for %s addr %#llx size %d\n",
1983 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize());
1984 return snoop_delay;
1985 } else {
1986 DPRINTF(Cache, "%s snoop hit for %s addr %#llx size %d, "
1987 "old state is %s\n", __func__, pkt->cmdString(),
1988 pkt->getAddr(), pkt->getSize(), blk->print());
1989 }
1990
1991 chatty_assert(!(isReadOnly && blk->isDirty()),
1992 "Should never have a dirty block in a read-only cache %s\n",
1993 name());
1994
1995 // We may end up modifying both the block state and the packet (if
1996 // we respond in atomic mode), so just figure out what to do now
1997 // and then do it later. If we find dirty data while snooping for
1998 // an invalidate, we don't need to send a response. The
1999 // invalidation itself is taken care of below.
2000 bool respond = blk->isDirty() && pkt->needsResponse() &&
2001 pkt->cmd != MemCmd::InvalidateReq;
2002 bool have_writable = blk->isWritable();
2003
2004 // Invalidate any prefetch's from below that would strip write permissions
2005 // MemCmd::HardPFReq is only observed by upstream caches. After missing
2006 // above and in it's own cache, a new MemCmd::ReadReq is created that
2007 // downstream caches observe.
2008 if (pkt->mustCheckAbove()) {
2009 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s "
2010 "from lower cache\n", pkt->getAddr(), pkt->cmdString());
2011 pkt->setBlockCached();
2012 return snoop_delay;
2013 }
2014
2015 if (pkt->isRead() && !invalidate) {
2016 // reading without requiring the line in a writable state
2017 assert(!needs_writable);
2018 pkt->setHasSharers();
2019
2020 // if the requesting packet is uncacheable, retain the line in
2021 // the current state, otherwhise unset the writable flag,
2022 // which means we go from Modified to Owned (and will respond
2023 // below), remain in Owned (and will respond below), from
2024 // Exclusive to Shared, or remain in Shared
2025 if (!pkt->req->isUncacheable())
2026 blk->status &= ~BlkWritable;
2027 }
2028
2029 if (respond) {
2030 // prevent anyone else from responding, cache as well as
2031 // memory, and also prevent any memory from even seeing the
2032 // request
2033 pkt->setCacheResponding();
2034 if (have_writable) {
2035 // inform the cache hierarchy that this cache had the line
2036 // in the Modified state so that we avoid unnecessary
2037 // invalidations (see Packet::setResponderHadWritable)
2038 pkt->setResponderHadWritable();
2039
2040 // in the case of an uncacheable request there is no point
2041 // in setting the responderHadWritable flag, but since the
2042 // recipient does not care there is no harm in doing so
2043 } else {
2044 // if the packet has needsWritable set we invalidate our
2045 // copy below and all other copies will be invalidates
2046 // through express snoops, and if needsWritable is not set
2047 // we already called setHasSharers above
2048 }
2049
2050 // if we are returning a writable and dirty (Modified) line,
2051 // we should be invalidating the line
2052 panic_if(!invalidate && !pkt->hasSharers(),
2053 "%s is passing a Modified line through %s to %#llx, "
2054 "but keeping the block",
2055 name(), pkt->cmdString(), pkt->getAddr());
2056
2057 if (is_timing) {
2058 doTimingSupplyResponse(pkt, blk->data, is_deferred, pending_inval);
2059 } else {
2060 pkt->makeAtomicResponse();
2061 // packets such as upgrades do not actually have any data
2062 // payload
2063 if (pkt->hasData())
2064 pkt->setDataFromBlock(blk->data, blkSize);
2065 }
2066 }
2067
2068 if (!respond && is_deferred) {
2069 assert(pkt->needsResponse());
2070
2071 // if we copied the deferred packet with the intention to
2072 // respond, but are not responding, then a cache above us must
2073 // be, and we can use this as the indication of whether this
2074 // is a packet where we created a copy of the request or not
2075 if (!pkt->cacheResponding()) {
2076 delete pkt->req;
2077 }
2078
2079 delete pkt;
2080 }
2081
2082 // Do this last in case it deallocates block data or something
2083 // like that
2084 if (invalidate) {
2085 invalidateBlock(blk);
2086 }
2087
2088 DPRINTF(Cache, "new state is %s\n", blk->print());
2089
2090 return snoop_delay;
2091}
2092
2093
2094void
2095Cache::recvTimingSnoopReq(PacketPtr pkt)
2096{
2097 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d\n", __func__,
2098 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
2099
2100 // Snoops shouldn't happen when bypassing caches
2101 assert(!system->bypassCaches());
2102
2103 // no need to snoop requests that are not in range
2104 if (!inRange(pkt->getAddr())) {
2105 return;
2106 }
2107
2108 bool is_secure = pkt->isSecure();
2109 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure);
2110
2111 Addr blk_addr = blockAlign(pkt->getAddr());
2112 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure);
2113
2114 // Update the latency cost of the snoop so that the crossbar can
2115 // account for it. Do not overwrite what other neighbouring caches
2116 // have already done, rather take the maximum. The update is
2117 // tentative, for cases where we return before an upward snoop
2118 // happens below.
2119 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay,
2120 lookupLatency * clockPeriod());
2121
2122 // Inform request(Prefetch, CleanEvict or Writeback) from below of
2123 // MSHR hit, set setBlockCached.
2124 if (mshr && pkt->mustCheckAbove()) {
2125 DPRINTF(Cache, "Setting block cached for %s from"
2126 "lower cache on mshr hit %#x\n",
2127 pkt->cmdString(), pkt->getAddr());
2128 pkt->setBlockCached();
2129 return;
2130 }
2131
2132 // Let the MSHR itself track the snoop and decide whether we want
2133 // to go ahead and do the regular cache snoop
2134 if (mshr && mshr->handleSnoop(pkt, order++)) {
2135 DPRINTF(Cache, "Deferring snoop on in-service MSHR to blk %#llx (%s)."
2136 "mshrs: %s\n", blk_addr, is_secure ? "s" : "ns",
2137 mshr->print());
2138
2139 if (mshr->getNumTargets() > numTarget)
2140 warn("allocating bonus target for snoop"); //handle later
2141 return;
2142 }
2143
2144 //We also need to check the writeback buffers and handle those
2145 WriteQueueEntry *wb_entry = writeBuffer.findMatch(blk_addr, is_secure);
2146 if (wb_entry) {
2147 DPRINTF(Cache, "Snoop hit in writeback to addr %#llx (%s)\n",
2148 pkt->getAddr(), is_secure ? "s" : "ns");
2149 // Expect to see only Writebacks and/or CleanEvicts here, both of
2150 // which should not be generated for uncacheable data.
2151 assert(!wb_entry->isUncacheable());
2152 // There should only be a single request responsible for generating
2153 // Writebacks/CleanEvicts.
2154 assert(wb_entry->getNumTargets() == 1);
2155 PacketPtr wb_pkt = wb_entry->getTarget()->pkt;
2156 assert(wb_pkt->isEviction());
2157
2158 if (pkt->isEviction()) {
2159 // if the block is found in the write queue, set the BLOCK_CACHED
2160 // flag for Writeback/CleanEvict snoop. On return the snoop will
2161 // propagate the BLOCK_CACHED flag in Writeback packets and prevent
2162 // any CleanEvicts from travelling down the memory hierarchy.
2163 pkt->setBlockCached();
2164 DPRINTF(Cache, "Squashing %s from lower cache on writequeue hit"
2165 " %#x\n", pkt->cmdString(), pkt->getAddr());
2166 return;
2167 }
2168
2169 // conceptually writebacks are no different to other blocks in
2170 // this cache, so the behaviour is modelled after handleSnoop,
2171 // the difference being that instead of querying the block
2172 // state to determine if it is dirty and writable, we use the
2173 // command and fields of the writeback packet
2174 bool respond = wb_pkt->cmd == MemCmd::WritebackDirty &&
2175 pkt->needsResponse() && pkt->cmd != MemCmd::InvalidateReq;
2176 bool have_writable = !wb_pkt->hasSharers();
2177 bool invalidate = pkt->isInvalidate();
2178
2179 if (!pkt->req->isUncacheable() && pkt->isRead() && !invalidate) {
2180 assert(!pkt->needsWritable());
2181 pkt->setHasSharers();
2182 wb_pkt->setHasSharers();
2183 }
2184
2185 if (respond) {
2186 pkt->setCacheResponding();
2187
2188 if (have_writable) {
2189 pkt->setResponderHadWritable();
2190 }
2191
2192 doTimingSupplyResponse(pkt, wb_pkt->getConstPtr<uint8_t>(),
2193 false, false);
2194 }
2195
2196 if (invalidate) {
2197 // Invalidation trumps our writeback... discard here
2198 // Note: markInService will remove entry from writeback buffer.
2199 markInService(wb_entry);
2200 delete wb_pkt;
2201 }
2202 }
2203
2204 // If this was a shared writeback, there may still be
2205 // other shared copies above that require invalidation.
2206 // We could be more selective and return here if the
2207 // request is non-exclusive or if the writeback is
2208 // exclusive.
2209 uint32_t snoop_delay = handleSnoop(pkt, blk, true, false, false);
2210
2211 // Override what we did when we first saw the snoop, as we now
2212 // also have the cost of the upwards snoops to account for
2213 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay, snoop_delay +
2214 lookupLatency * clockPeriod());
2215}
2216
2217bool
2218Cache::CpuSidePort::recvTimingSnoopResp(PacketPtr pkt)
2219{
2220 // Express snoop responses from master to slave, e.g., from L1 to L2
2221 cache->recvTimingSnoopResp(pkt);
2222 return true;
2223}
2224
2225Tick
2226Cache::recvAtomicSnoop(PacketPtr pkt)
2227{
2228 // Snoops shouldn't happen when bypassing caches
2229 assert(!system->bypassCaches());
2230
2231 // no need to snoop requests that are not in range.
2232 if (!inRange(pkt->getAddr())) {
2233 return 0;
2234 }
2235
2236 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
2237 uint32_t snoop_delay = handleSnoop(pkt, blk, false, false, false);
2238 return snoop_delay + lookupLatency * clockPeriod();
2239}
2240
2241
2242QueueEntry*
2243Cache::getNextQueueEntry()
2244{
2245 // Check both MSHR queue and write buffer for potential requests,
2246 // note that null does not mean there is no request, it could
2247 // simply be that it is not ready
2248 MSHR *miss_mshr = mshrQueue.getNext();
2249 WriteQueueEntry *wq_entry = writeBuffer.getNext();
2250
2251 // If we got a write buffer request ready, first priority is a
2252 // full write buffer, otherwise we favour the miss requests
2253 if (wq_entry && (writeBuffer.isFull() || !miss_mshr)) {
2254 // need to search MSHR queue for conflicting earlier miss.
2255 MSHR *conflict_mshr =
2256 mshrQueue.findPending(wq_entry->blkAddr,
2257 wq_entry->isSecure);
2258
2259 if (conflict_mshr && conflict_mshr->order < wq_entry->order) {
2260 // Service misses in order until conflict is cleared.
2261 return conflict_mshr;
2262
2263 // @todo Note that we ignore the ready time of the conflict here
2264 }
2265
2266 // No conflicts; issue write
2267 return wq_entry;
2268 } else if (miss_mshr) {
2269 // need to check for conflicting earlier writeback
2270 WriteQueueEntry *conflict_mshr =
2271 writeBuffer.findPending(miss_mshr->blkAddr,
2272 miss_mshr->isSecure);
2273 if (conflict_mshr) {
2274 // not sure why we don't check order here... it was in the
2275 // original code but commented out.
2276
2277 // The only way this happens is if we are
2278 // doing a write and we didn't have permissions
2279 // then subsequently saw a writeback (owned got evicted)
2280 // We need to make sure to perform the writeback first
2281 // To preserve the dirty data, then we can issue the write
2282
2283 // should we return wq_entry here instead? I.e. do we
2284 // have to flush writes in order? I don't think so... not
2285 // for Alpha anyway. Maybe for x86?
2286 return conflict_mshr;
2287
2288 // @todo Note that we ignore the ready time of the conflict here
2289 }
2290
2291 // No conflicts; issue read
2292 return miss_mshr;
2293 }
2294
2295 // fall through... no pending requests. Try a prefetch.
2296 assert(!miss_mshr && !wq_entry);
2297 if (prefetcher && mshrQueue.canPrefetch()) {
2298 // If we have a miss queue slot, we can try a prefetch
2299 PacketPtr pkt = prefetcher->getPacket();
2300 if (pkt) {
2301 Addr pf_addr = blockAlign(pkt->getAddr());
2302 if (!tags->findBlock(pf_addr, pkt->isSecure()) &&
2303 !mshrQueue.findMatch(pf_addr, pkt->isSecure()) &&
2304 !writeBuffer.findMatch(pf_addr, pkt->isSecure())) {
2305 // Update statistic on number of prefetches issued
2306 // (hwpf_mshr_misses)
2307 assert(pkt->req->masterId() < system->maxMasters());
2308 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++;
2309
2310 // allocate an MSHR and return it, note
2311 // that we send the packet straight away, so do not
2312 // schedule the send
2313 return allocateMissBuffer(pkt, curTick(), false);
2314 } else {
2315 // free the request and packet
2316 delete pkt->req;
2317 delete pkt;
2318 }
2319 }
2320 }
2321
2322 return nullptr;
2323}
2324
2325bool
2326Cache::isCachedAbove(PacketPtr pkt, bool is_timing) const
2327{
2328 if (!forwardSnoops)
2329 return false;
2330 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and
2331 // Writeback snoops into upper level caches to check for copies of the
2332 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict
2333 // packet, the cache can inform the crossbar below of presence or absence
2334 // of the block.
2335 if (is_timing) {
2336 Packet snoop_pkt(pkt, true, false);
2337 snoop_pkt.setExpressSnoop();
2338 // Assert that packet is either Writeback or CleanEvict and not a
2339 // prefetch request because prefetch requests need an MSHR and may
2340 // generate a snoop response.
2341 assert(pkt->isEviction());
2342 snoop_pkt.senderState = nullptr;
2343 cpuSidePort->sendTimingSnoopReq(&snoop_pkt);
2344 // Writeback/CleanEvict snoops do not generate a snoop response.
2345 assert(!(snoop_pkt.cacheResponding()));
2346 return snoop_pkt.isBlockCached();
2347 } else {
2348 cpuSidePort->sendAtomicSnoop(pkt);
2349 return pkt->isBlockCached();
2350 }
2351}
2352
2353Tick
2354Cache::nextQueueReadyTime() const
2355{
2356 Tick nextReady = std::min(mshrQueue.nextReadyTime(),
2357 writeBuffer.nextReadyTime());
2358
2359 // Don't signal prefetch ready time if no MSHRs available
2360 // Will signal once enoguh MSHRs are deallocated
2361 if (prefetcher && mshrQueue.canPrefetch()) {
2362 nextReady = std::min(nextReady,
2363 prefetcher->nextPrefetchReadyTime());
2364 }
2365
2366 return nextReady;
2367}
2368
2369bool
2370Cache::sendMSHRQueuePacket(MSHR* mshr)
2371{
2372 assert(mshr);
2373
2374 // use request from 1st target
2375 PacketPtr tgt_pkt = mshr->getTarget()->pkt;
2376
2377 DPRINTF(Cache, "%s MSHR %s for addr %#llx size %d\n", __func__,
2378 tgt_pkt->cmdString(), tgt_pkt->getAddr(),
2379 tgt_pkt->getSize());
2380
2381 CacheBlk *blk = tags->findBlock(mshr->blkAddr, mshr->isSecure);
2382
2383 if (tgt_pkt->cmd == MemCmd::HardPFReq && forwardSnoops) {
2384 // we should never have hardware prefetches to allocated
2385 // blocks
2386 assert(blk == nullptr);
2387
2388 // We need to check the caches above us to verify that
2389 // they don't have a copy of this block in the dirty state
2390 // at the moment. Without this check we could get a stale
2391 // copy from memory that might get used in place of the
2392 // dirty one.
2393 Packet snoop_pkt(tgt_pkt, true, false);
2394 snoop_pkt.setExpressSnoop();
2395 // We are sending this packet upwards, but if it hits we will
2396 // get a snoop response that we end up treating just like a
2397 // normal response, hence it needs the MSHR as its sender
2398 // state
2399 snoop_pkt.senderState = mshr;
2400 cpuSidePort->sendTimingSnoopReq(&snoop_pkt);
2401
2402 // Check to see if the prefetch was squashed by an upper cache (to
2403 // prevent us from grabbing the line) or if a Check to see if a
2404 // writeback arrived between the time the prefetch was placed in
2405 // the MSHRs and when it was selected to be sent or if the
2406 // prefetch was squashed by an upper cache.
2407
2408 // It is important to check cacheResponding before
2409 // prefetchSquashed. If another cache has committed to
2410 // responding, it will be sending a dirty response which will
2411 // arrive at the MSHR allocated for this request. Checking the
2412 // prefetchSquash first may result in the MSHR being
2413 // prematurely deallocated.
2414 if (snoop_pkt.cacheResponding()) {
2415 auto M5_VAR_USED r = outstandingSnoop.insert(snoop_pkt.req);
2416 assert(r.second);
2417
2418 // if we are getting a snoop response with no sharers it
2419 // will be allocated as Modified
2420 bool pending_modified_resp = !snoop_pkt.hasSharers();
2421 markInService(mshr, pending_modified_resp);
2422
2423 DPRINTF(Cache, "Upward snoop of prefetch for addr"
2424 " %#x (%s) hit\n",
2425 tgt_pkt->getAddr(), tgt_pkt->isSecure()? "s": "ns");
2426 return false;
2427 }
2428
2429 if (snoop_pkt.isBlockCached()) {
2430 DPRINTF(Cache, "Block present, prefetch squashed by cache. "
2431 "Deallocating mshr target %#x.\n",
2432 mshr->blkAddr);
2433
2434 // Deallocate the mshr target
2435 if (mshrQueue.forceDeallocateTarget(mshr)) {
2436 // Clear block if this deallocation resulted freed an
2437 // mshr when all had previously been utilized
2438 clearBlocked(Blocked_NoMSHRs);
2439 }
2440 return false;
2441 }
2442 }
2443
2444 // either a prefetch that is not present upstream, or a normal
2445 // MSHR request, proceed to get the packet to send downstream
2446 PacketPtr pkt = createMissPacket(tgt_pkt, blk, mshr->needsWritable());
2447
2448 mshr->isForward = (pkt == nullptr);
2449
2450 if (mshr->isForward) {
2451 // not a cache block request, but a response is expected
2452 // make copy of current packet to forward, keep current
2453 // copy for response handling
2454 pkt = new Packet(tgt_pkt, false, true);
2455 assert(!pkt->isWrite());
2456 }
2457
2458 // play it safe and append (rather than set) the sender state,
2459 // as forwarded packets may already have existing state
2460 pkt->pushSenderState(mshr);
2461
2462 if (!memSidePort->sendTimingReq(pkt)) {
2463 // we are awaiting a retry, but we
2464 // delete the packet and will be creating a new packet
2465 // when we get the opportunity
2466 delete pkt;
2467
2468 // note that we have now masked any requestBus and
2469 // schedSendEvent (we will wait for a retry before
2470 // doing anything), and this is so even if we do not
2471 // care about this packet and might override it before
2472 // it gets retried
2473 return true;
2474 } else {
2475 // As part of the call to sendTimingReq the packet is
2476 // forwarded to all neighbouring caches (and any caches
2477 // above them) as a snoop. Thus at this point we know if
2478 // any of the neighbouring caches are responding, and if
2479 // so, we know it is dirty, and we can determine if it is
2480 // being passed as Modified, making our MSHR the ordering
2481 // point
2482 bool pending_modified_resp = !pkt->hasSharers() &&
2483 pkt->cacheResponding();
2484 markInService(mshr, pending_modified_resp);
2485 return false;
2486 }
2487}
2488
2489bool
2490Cache::sendWriteQueuePacket(WriteQueueEntry* wq_entry)
2491{
2492 assert(wq_entry);
2493
2494 // always a single target for write queue entries
2495 PacketPtr tgt_pkt = wq_entry->getTarget()->pkt;
2496
2497 DPRINTF(Cache, "%s write %s for addr %#llx size %d\n", __func__,
2498 tgt_pkt->cmdString(), tgt_pkt->getAddr(),
2499 tgt_pkt->getSize());
2500
2501 // forward as is, both for evictions and uncacheable writes
2502 if (!memSidePort->sendTimingReq(tgt_pkt)) {
2503 // note that we have now masked any requestBus and
2504 // schedSendEvent (we will wait for a retry before
2505 // doing anything), and this is so even if we do not
2506 // care about this packet and might override it before
2507 // it gets retried
2508 return true;
2509 } else {
2510 markInService(wq_entry);
2511 return false;
2512 }
2513}
2514
2515void
2516Cache::serialize(CheckpointOut &cp) const
2517{
2518 bool dirty(isDirty());
2519
2520 if (dirty) {
2521 warn("*** The cache still contains dirty data. ***\n");
2522 warn(" Make sure to drain the system using the correct flags.\n");
2523 warn(" This checkpoint will not restore correctly and dirty data "
2524 " in the cache will be lost!\n");
2525 }
2526
2527 // Since we don't checkpoint the data in the cache, any dirty data
2528 // will be lost when restoring from a checkpoint of a system that
2529 // wasn't drained properly. Flag the checkpoint as invalid if the
2530 // cache contains dirty data.
2531 bool bad_checkpoint(dirty);
2532 SERIALIZE_SCALAR(bad_checkpoint);
2533}
2534
2535void
2536Cache::unserialize(CheckpointIn &cp)
2537{
2538 bool bad_checkpoint;
2539 UNSERIALIZE_SCALAR(bad_checkpoint);
2540 if (bad_checkpoint) {
2541 fatal("Restoring from checkpoints with dirty caches is not supported "
2542 "in the classic memory system. Please remove any caches or "
2543 " drain them properly before taking checkpoints.\n");
2544 }
2545}
2546
2547///////////////
2548//
2549// CpuSidePort
2550//
2551///////////////
2552
2553AddrRangeList
2554Cache::CpuSidePort::getAddrRanges() const
2555{
2556 return cache->getAddrRanges();
2557}
2558
2559bool
2560Cache::CpuSidePort::recvTimingReq(PacketPtr pkt)
2561{
2562 assert(!cache->system->bypassCaches());
2563
2564 bool success = false;
2565
2566 // always let express snoop packets through if even if blocked
2567 if (pkt->isExpressSnoop()) {
2568 // do not change the current retry state
2569 bool M5_VAR_USED bypass_success = cache->recvTimingReq(pkt);
2570 assert(bypass_success);
2571 return true;
2572 } else if (blocked || mustSendRetry) {
2573 // either already committed to send a retry, or blocked
2574 success = false;
2575 } else {
2576 // pass it on to the cache, and let the cache decide if we
2577 // have to retry or not
2578 success = cache->recvTimingReq(pkt);
2579 }
2580
2581 // remember if we have to retry
2582 mustSendRetry = !success;
2583 return success;
2584}
2585
2586Tick
2587Cache::CpuSidePort::recvAtomic(PacketPtr pkt)
2588{
2589 return cache->recvAtomic(pkt);
2590}
2591
2592void
2593Cache::CpuSidePort::recvFunctional(PacketPtr pkt)
2594{
2595 // functional request
2596 cache->functionalAccess(pkt, true);
2597}
2598
2599Cache::
2600CpuSidePort::CpuSidePort(const std::string &_name, Cache *_cache,
2601 const std::string &_label)
2602 : BaseCache::CacheSlavePort(_name, _cache, _label), cache(_cache)
2603{
2604}
2605
2606Cache*
2607CacheParams::create()
2608{
2609 assert(tags);
2610
2611 return new Cache(this);
2612}
2613///////////////
2614//
2615// MemSidePort
2616//
2617///////////////
2618
2619bool
2620Cache::MemSidePort::recvTimingResp(PacketPtr pkt)
2621{
2622 cache->recvTimingResp(pkt);
2623 return true;
2624}
2625
2626// Express snooping requests to memside port
2627void
2628Cache::MemSidePort::recvTimingSnoopReq(PacketPtr pkt)
2629{
2630 // handle snooping requests
2631 cache->recvTimingSnoopReq(pkt);
2632}
2633
2634Tick
2635Cache::MemSidePort::recvAtomicSnoop(PacketPtr pkt)
2636{
2637 return cache->recvAtomicSnoop(pkt);
2638}
2639
2640void
2641Cache::MemSidePort::recvFunctionalSnoop(PacketPtr pkt)
2642{
2643 // functional snoop (note that in contrast to atomic we don't have
2644 // a specific functionalSnoop method, as they have the same
2645 // behaviour regardless)
2646 cache->functionalAccess(pkt, false);
2647}
2648
2649void
2650Cache::CacheReqPacketQueue::sendDeferredPacket()
2651{
2652 // sanity check
2653 assert(!waitingOnRetry);
2654
2655 // there should never be any deferred request packets in the
2656 // queue, instead we resly on the cache to provide the packets
2657 // from the MSHR queue or write queue
2658 assert(deferredPacketReadyTime() == MaxTick);
2659
2660 // check for request packets (requests & writebacks)
2661 QueueEntry* entry = cache.getNextQueueEntry();
2662
2663 if (!entry) {
2664 // can happen if e.g. we attempt a writeback and fail, but
2665 // before the retry, the writeback is eliminated because
2666 // we snoop another cache's ReadEx.
2667 } else {
2668 // let our snoop responses go first if there are responses to
2669 // the same addresses
2670 if (checkConflictingSnoop(entry->blkAddr)) {
2671 return;
2672 }
2673 waitingOnRetry = entry->sendPacket(cache);
2674 }
2675
2676 // if we succeeded and are not waiting for a retry, schedule the
2677 // next send considering when the next queue is ready, note that
2678 // snoop responses have their own packet queue and thus schedule
2679 // their own events
2680 if (!waitingOnRetry) {
2681 schedSendEvent(cache.nextQueueReadyTime());
2682 }
2683}
2684
2685Cache::
2686MemSidePort::MemSidePort(const std::string &_name, Cache *_cache,
2687 const std::string &_label)
2688 : BaseCache::CacheMasterPort(_name, _cache, _reqQueue, _snoopRespQueue),
2689 _reqQueue(*_cache, *this, _snoopRespQueue, _label),
2690 _snoopRespQueue(*_cache, *this, _label), cache(_cache)
2691{
2692}
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