cache.cc (12334:e0ab29a34764) | cache.cc (12343:51ae6d08466f) |
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1/* 2 * Copyright (c) 2010-2016 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 2528 unchanged lines hidden (view full) --- 2537 2538AddrRangeList 2539Cache::CpuSidePort::getAddrRanges() const 2540{ 2541 return cache->getAddrRanges(); 2542} 2543 2544bool | 1/* 2 * Copyright (c) 2010-2016 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 2528 unchanged lines hidden (view full) --- 2537 2538AddrRangeList 2539Cache::CpuSidePort::getAddrRanges() const 2540{ 2541 return cache->getAddrRanges(); 2542} 2543 2544bool |
2545Cache::CpuSidePort::recvTimingReq(PacketPtr pkt) | 2545Cache::CpuSidePort::tryTiming(PacketPtr pkt) |
2546{ 2547 assert(!cache->system->bypassCaches()); 2548 | 2546{ 2547 assert(!cache->system->bypassCaches()); 2548 |
2549 bool success = false; | 2549 // always let express snoop packets through if even if blocked 2550 if (pkt->isExpressSnoop()) { 2551 return true; 2552 } else if (isBlocked() || mustSendRetry) { 2553 // either already committed to send a retry, or blocked 2554 mustSendRetry = true; 2555 return false; 2556 } 2557 mustSendRetry = false; 2558 return true; 2559} |
2550 | 2560 |
2561bool 2562Cache::CpuSidePort::recvTimingReq(PacketPtr pkt) 2563{ 2564 assert(!cache->system->bypassCaches()); 2565 |
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2551 // always let express snoop packets through if even if blocked 2552 if (pkt->isExpressSnoop()) { | 2566 // always let express snoop packets through if even if blocked 2567 if (pkt->isExpressSnoop()) { |
2553 // do not change the current retry state | |
2554 bool M5_VAR_USED bypass_success = cache->recvTimingReq(pkt); 2555 assert(bypass_success); 2556 return true; | 2568 bool M5_VAR_USED bypass_success = cache->recvTimingReq(pkt); 2569 assert(bypass_success); 2570 return true; |
2557 } else if (blocked || mustSendRetry) { 2558 // either already committed to send a retry, or blocked 2559 success = false; 2560 } else { 2561 // pass it on to the cache, and let the cache decide if we 2562 // have to retry or not 2563 success = cache->recvTimingReq(pkt); | |
2564 } 2565 | 2571 } 2572 |
2566 // remember if we have to retry 2567 mustSendRetry = !success; 2568 return success; | 2573 return tryTiming(pkt) && cache->recvTimingReq(pkt); |
2569} 2570 2571Tick 2572Cache::CpuSidePort::recvAtomic(PacketPtr pkt) 2573{ 2574 return cache->recvAtomic(pkt); 2575} 2576 --- 101 unchanged lines hidden --- | 2574} 2575 2576Tick 2577Cache::CpuSidePort::recvAtomic(PacketPtr pkt) 2578{ 2579 return cache->recvAtomic(pkt); 2580} 2581 --- 101 unchanged lines hidden --- |