cache.cc (11453:dd9763792521) | cache.cc (11483:d4c2e56d18b2) |
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1/* 2 * Copyright (c) 2010-2016 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 426 unchanged lines hidden (view full) --- 435 return true; 436 } 437 // We didn't find the block here, propagate the CleanEvict further 438 // down the memory hierarchy. Returning false will treat the CleanEvict 439 // like a Writeback which could not find a replaceable block so has to 440 // go to next level. 441 return false; 442 } else if ((blk != NULL) && | 1/* 2 * Copyright (c) 2010-2016 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 426 unchanged lines hidden (view full) --- 435 return true; 436 } 437 // We didn't find the block here, propagate the CleanEvict further 438 // down the memory hierarchy. Returning false will treat the CleanEvict 439 // like a Writeback which could not find a replaceable block so has to 440 // go to next level. 441 return false; 442 } else if ((blk != NULL) && |
443 (pkt->needsWritable() ? blk->isWritable() : blk->isReadable())) { | 443 (pkt->needsWritable() ? blk->isWritable() : 444 blk->isReadable())) { |
444 // OK to satisfy access 445 incHitCount(pkt); 446 satisfyCpuSideRequest(pkt, blk); 447 return true; 448 } 449 450 // Can't satisfy access normally... either no block (blk == NULL) 451 // or have block but need writable --- 252 unchanged lines hidden (view full) --- 704 if (satisfied) { 705 // should never be satisfying an uncacheable access as we 706 // flush and invalidate any existing block as part of the 707 // lookup 708 assert(!pkt->req->isUncacheable()); 709 710 // hit (for all other request types) 711 | 445 // OK to satisfy access 446 incHitCount(pkt); 447 satisfyCpuSideRequest(pkt, blk); 448 return true; 449 } 450 451 // Can't satisfy access normally... either no block (blk == NULL) 452 // or have block but need writable --- 252 unchanged lines hidden (view full) --- 705 if (satisfied) { 706 // should never be satisfying an uncacheable access as we 707 // flush and invalidate any existing block as part of the 708 // lookup 709 assert(!pkt->req->isUncacheable()); 710 711 // hit (for all other request types) 712 |
712 if (prefetcher && (prefetchOnAccess || (blk && blk->wasPrefetched()))) { | 713 if (prefetcher && (prefetchOnAccess || 714 (blk && blk->wasPrefetched()))) { |
713 if (blk) 714 blk->status &= ~BlkHWPrefetched; 715 716 // Don't notify on SWPrefetch 717 if (!pkt->cmd.isSWPrefetch()) 718 next_pf_time = prefetcher->notify(pkt); 719 } 720 --- 82 unchanged lines hidden (view full) --- 803 // Coalesce unless it was a software prefetch (see above). 804 if (pkt) { 805 assert(!pkt->isWriteback()); 806 // CleanEvicts corresponding to blocks which have 807 // outstanding requests in MSHRs are simply sunk here 808 if (pkt->cmd == MemCmd::CleanEvict) { 809 pendingDelete.reset(pkt); 810 } else { | 715 if (blk) 716 blk->status &= ~BlkHWPrefetched; 717 718 // Don't notify on SWPrefetch 719 if (!pkt->cmd.isSWPrefetch()) 720 next_pf_time = prefetcher->notify(pkt); 721 } 722 --- 82 unchanged lines hidden (view full) --- 805 // Coalesce unless it was a software prefetch (see above). 806 if (pkt) { 807 assert(!pkt->isWriteback()); 808 // CleanEvicts corresponding to blocks which have 809 // outstanding requests in MSHRs are simply sunk here 810 if (pkt->cmd == MemCmd::CleanEvict) { 811 pendingDelete.reset(pkt); 812 } else { |
811 DPRINTF(Cache, "%s coalescing MSHR for %s addr %#llx size %d\n", 812 __func__, pkt->cmdString(), pkt->getAddr(), 813 pkt->getSize()); | 813 DPRINTF(Cache, "%s coalescing MSHR for %s addr %#llx " 814 "size %d\n", __func__, pkt->cmdString(), 815 pkt->getAddr(), pkt->getSize()); |
814 815 assert(pkt->req->masterId() < system->maxMasters()); 816 mshr_hits[pkt->cmdToIndex()][pkt->req->masterId()]++; 817 // We use forward_time here because it is the same 818 // considering new targets. We have multiple 819 // requests for the same address here. It 820 // specifies the latency to allocate an internal 821 // buffer and to schedule an event to the queued --- 6 unchanged lines hidden (view full) --- 828 setBlocked(Blocked_NoTargets); 829 // need to be careful with this... if this mshr isn't 830 // ready yet (i.e. time > curTick()), we don't want to 831 // move it ahead of mshrs that are ready 832 // mshrQueue.moveToFront(mshr); 833 } 834 } 835 // We should call the prefetcher reguardless if the request is | 816 817 assert(pkt->req->masterId() < system->maxMasters()); 818 mshr_hits[pkt->cmdToIndex()][pkt->req->masterId()]++; 819 // We use forward_time here because it is the same 820 // considering new targets. We have multiple 821 // requests for the same address here. It 822 // specifies the latency to allocate an internal 823 // buffer and to schedule an event to the queued --- 6 unchanged lines hidden (view full) --- 830 setBlocked(Blocked_NoTargets); 831 // need to be careful with this... if this mshr isn't 832 // ready yet (i.e. time > curTick()), we don't want to 833 // move it ahead of mshrs that are ready 834 // mshrQueue.moveToFront(mshr); 835 } 836 } 837 // We should call the prefetcher reguardless if the request is |
836 // satisfied or not, reguardless if the request is in the MSHR or 837 // not. The request could be a ReadReq hit, but still not | 838 // satisfied or not, reguardless if the request is in the MSHR 839 // or not. The request could be a ReadReq hit, but still not |
838 // satisfied (potentially because of a prior write to the same 839 // cache line. So, even when not satisfied, tehre is an MSHR | 840 // satisfied (potentially because of a prior write to the same 841 // cache line. So, even when not satisfied, tehre is an MSHR |
840 // already allocated for this, we need to let the prefetcher know 841 // about the request | 842 // already allocated for this, we need to let the prefetcher 843 // know about the request |
842 if (prefetcher) { 843 // Don't notify on SWPrefetch 844 if (!pkt->cmd.isSWPrefetch()) 845 next_pf_time = prefetcher->notify(pkt); 846 } 847 } 848 } else { 849 // no MSHR --- 199 unchanged lines hidden (view full) --- 1049 CacheBlk::State old_state = blk ? blk->status : 0; 1050#endif 1051 1052 lat += ticksToCycles(memSidePort->sendAtomic(bus_pkt)); 1053 1054 bool is_invalidate = bus_pkt->isInvalidate(); 1055 1056 // We are now dealing with the response handling | 844 if (prefetcher) { 845 // Don't notify on SWPrefetch 846 if (!pkt->cmd.isSWPrefetch()) 847 next_pf_time = prefetcher->notify(pkt); 848 } 849 } 850 } else { 851 // no MSHR --- 199 unchanged lines hidden (view full) --- 1051 CacheBlk::State old_state = blk ? blk->status : 0; 1052#endif 1053 1054 lat += ticksToCycles(memSidePort->sendAtomic(bus_pkt)); 1055 1056 bool is_invalidate = bus_pkt->isInvalidate(); 1057 1058 // We are now dealing with the response handling |
1057 DPRINTF(Cache, "Receive response: %s for addr %#llx (%s) in state %i\n", 1058 bus_pkt->cmdString(), bus_pkt->getAddr(), | 1059 DPRINTF(Cache, "Receive response: %s for addr %#llx (%s) in " 1060 "state %i\n", bus_pkt->cmdString(), bus_pkt->getAddr(), |
1059 bus_pkt->isSecure() ? "s" : "ns", 1060 old_state); 1061 1062 // If packet was a forward, the response (if any) is already 1063 // in place in the bus_pkt == pkt structure, so we don't need 1064 // to do anything. Otherwise, use the separate bus_pkt to 1065 // generate response to pkt and then delete it. 1066 if (!is_forward) { --- 264 unchanged lines hidden (view full) --- 1331 case MSHR::Target::FromCPU: 1332 Tick completion_time; 1333 // Here we charge on completion_time the delay of the xbar if the 1334 // packet comes from it, charged on headerDelay. 1335 completion_time = pkt->headerDelay; 1336 1337 // Software prefetch handling for cache closest to core 1338 if (tgt_pkt->cmd.isSWPrefetch()) { | 1061 bus_pkt->isSecure() ? "s" : "ns", 1062 old_state); 1063 1064 // If packet was a forward, the response (if any) is already 1065 // in place in the bus_pkt == pkt structure, so we don't need 1066 // to do anything. Otherwise, use the separate bus_pkt to 1067 // generate response to pkt and then delete it. 1068 if (!is_forward) { --- 264 unchanged lines hidden (view full) --- 1333 case MSHR::Target::FromCPU: 1334 Tick completion_time; 1335 // Here we charge on completion_time the delay of the xbar if the 1336 // packet comes from it, charged on headerDelay. 1337 completion_time = pkt->headerDelay; 1338 1339 // Software prefetch handling for cache closest to core 1340 if (tgt_pkt->cmd.isSWPrefetch()) { |
1339 // a software prefetch would have already been ack'd immediately 1340 // with dummy data so the core would be able to retire it. 1341 // this request completes right here, so we deallocate it. | 1341 // a software prefetch would have already been ack'd 1342 // immediately with dummy data so the core would be able to 1343 // retire it. This request completes right here, so we 1344 // deallocate it. |
1342 delete tgt_pkt->req; 1343 delete tgt_pkt; 1344 break; // skip response 1345 } 1346 1347 // unlike the other packet flows, where data is found in other 1348 // caches or memory and brought back, write-line requests always 1349 // have the data right away, so the above check for "is fill?" --- 318 unchanged lines hidden (view full) --- 1668 // must be an outstanding upgrade request 1669 // on a block we're about to replace... 1670 assert(!blk->isWritable() || blk->isDirty()); 1671 assert(repl_mshr->needsWritable()); 1672 // too hard to replace block with transient state 1673 // allocation failed, block not inserted 1674 return NULL; 1675 } else { | 1345 delete tgt_pkt->req; 1346 delete tgt_pkt; 1347 break; // skip response 1348 } 1349 1350 // unlike the other packet flows, where data is found in other 1351 // caches or memory and brought back, write-line requests always 1352 // have the data right away, so the above check for "is fill?" --- 318 unchanged lines hidden (view full) --- 1671 // must be an outstanding upgrade request 1672 // on a block we're about to replace... 1673 assert(!blk->isWritable() || blk->isDirty()); 1674 assert(repl_mshr->needsWritable()); 1675 // too hard to replace block with transient state 1676 // allocation failed, block not inserted 1677 return NULL; 1678 } else { |
1676 DPRINTF(Cache, "replacement: replacing %#llx (%s) with %#llx (%s): %s\n", 1677 repl_addr, blk->isSecure() ? "s" : "ns", | 1679 DPRINTF(Cache, "replacement: replacing %#llx (%s) with %#llx " 1680 "(%s): %s\n", repl_addr, blk->isSecure() ? "s" : "ns", |
1678 addr, is_secure ? "s" : "ns", 1679 blk->isDirty() ? "writeback" : "clean"); 1680 1681 if (blk->wasPrefetched()) { 1682 unusedPrefetches++; 1683 } 1684 // Will send up Writeback/CleanEvict snoops via isCachedAbove 1685 // when pushing this writeback list into the write buffer. --- 287 unchanged lines hidden (view full) --- 1973 pkt->cmd != MemCmd::InvalidateReq; 1974 bool have_writable = blk->isWritable(); 1975 1976 // Invalidate any prefetch's from below that would strip write permissions 1977 // MemCmd::HardPFReq is only observed by upstream caches. After missing 1978 // above and in it's own cache, a new MemCmd::ReadReq is created that 1979 // downstream caches observe. 1980 if (pkt->mustCheckAbove()) { | 1681 addr, is_secure ? "s" : "ns", 1682 blk->isDirty() ? "writeback" : "clean"); 1683 1684 if (blk->wasPrefetched()) { 1685 unusedPrefetches++; 1686 } 1687 // Will send up Writeback/CleanEvict snoops via isCachedAbove 1688 // when pushing this writeback list into the write buffer. --- 287 unchanged lines hidden (view full) --- 1976 pkt->cmd != MemCmd::InvalidateReq; 1977 bool have_writable = blk->isWritable(); 1978 1979 // Invalidate any prefetch's from below that would strip write permissions 1980 // MemCmd::HardPFReq is only observed by upstream caches. After missing 1981 // above and in it's own cache, a new MemCmd::ReadReq is created that 1982 // downstream caches observe. 1983 if (pkt->mustCheckAbove()) { |
1981 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s from" 1982 " lower cache\n", pkt->getAddr(), pkt->cmdString()); | 1984 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s " 1985 "from lower cache\n", pkt->getAddr(), pkt->cmdString()); |
1983 pkt->setBlockCached(); 1984 return snoop_delay; 1985 } 1986 1987 if (pkt->isRead() && !invalidate) { 1988 // reading without requiring the line in a writable state 1989 assert(!needs_writable); 1990 pkt->setHasSharers(); --- 491 unchanged lines hidden (view full) --- 2482void 2483Cache::serialize(CheckpointOut &cp) const 2484{ 2485 bool dirty(isDirty()); 2486 2487 if (dirty) { 2488 warn("*** The cache still contains dirty data. ***\n"); 2489 warn(" Make sure to drain the system using the correct flags.\n"); | 1986 pkt->setBlockCached(); 1987 return snoop_delay; 1988 } 1989 1990 if (pkt->isRead() && !invalidate) { 1991 // reading without requiring the line in a writable state 1992 assert(!needs_writable); 1993 pkt->setHasSharers(); --- 491 unchanged lines hidden (view full) --- 2485void 2486Cache::serialize(CheckpointOut &cp) const 2487{ 2488 bool dirty(isDirty()); 2489 2490 if (dirty) { 2491 warn("*** The cache still contains dirty data. ***\n"); 2492 warn(" Make sure to drain the system using the correct flags.\n"); |
2490 warn(" This checkpoint will not restore correctly and dirty data in " 2491 "the cache will be lost!\n"); | 2493 warn(" This checkpoint will not restore correctly and dirty data " 2494 " in the cache will be lost!\n"); |
2492 } 2493 2494 // Since we don't checkpoint the data in the cache, any dirty data 2495 // will be lost when restoring from a checkpoint of a system that 2496 // wasn't drained properly. Flag the checkpoint as invalid if the 2497 // cache contains dirty data. 2498 bool bad_checkpoint(dirty); 2499 SERIALIZE_SCALAR(bad_checkpoint); --- 160 unchanged lines hidden --- | 2495 } 2496 2497 // Since we don't checkpoint the data in the cache, any dirty data 2498 // will be lost when restoring from a checkpoint of a system that 2499 // wasn't drained properly. Flag the checkpoint as invalid if the 2500 // cache contains dirty data. 2501 bool bad_checkpoint(dirty); 2502 SERIALIZE_SCALAR(bad_checkpoint); --- 160 unchanged lines hidden --- |