1/*
2 * Copyright (c) 2010-2015 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Erik Hallnor
42 * Dave Greene
43 * Nathan Binkert
44 * Steve Reinhardt
45 * Ron Dreslinski
46 * Andreas Sandberg
47 */
48
49/**
50 * @file
51 * Cache definitions.
52 */
53
54#include "mem/cache/cache.hh"
55
56#include "base/misc.hh"
57#include "base/types.hh"
58#include "debug/Cache.hh"
59#include "debug/CachePort.hh"
60#include "debug/CacheTags.hh"
61#include "mem/cache/blk.hh"
62#include "mem/cache/mshr.hh"
63#include "mem/cache/prefetch/base.hh"
64#include "sim/sim_exit.hh"
65
66Cache::Cache(const CacheParams *p)
67 : BaseCache(p, p->system->cacheLineSize()),
68 tags(p->tags),
69 prefetcher(p->prefetcher),
70 doFastWrites(true),
71 prefetchOnAccess(p->prefetch_on_access),
72 clusivity(p->clusivity),
73 writebackClean(p->writeback_clean),
74 tempBlockWriteback(nullptr),
75 writebackTempBlockAtomicEvent(this, false,
76 EventBase::Delayed_Writeback_Pri)
77{
78 tempBlock = new CacheBlk();
79 tempBlock->data = new uint8_t[blkSize];
80
81 cpuSidePort = new CpuSidePort(p->name + ".cpu_side", this,
82 "CpuSidePort");
83 memSidePort = new MemSidePort(p->name + ".mem_side", this,
84 "MemSidePort");
85
86 tags->setCache(this);
87 if (prefetcher)
88 prefetcher->setCache(this);
89}
90
91Cache::~Cache()
92{
93 delete [] tempBlock->data;
94 delete tempBlock;
95
96 delete cpuSidePort;
97 delete memSidePort;
98}
99
100void
101Cache::regStats()
102{
103 BaseCache::regStats();
104}
105
106void
107Cache::cmpAndSwap(CacheBlk *blk, PacketPtr pkt)
108{
109 assert(pkt->isRequest());
110
111 uint64_t overwrite_val;
112 bool overwrite_mem;
113 uint64_t condition_val64;
114 uint32_t condition_val32;
115
116 int offset = tags->extractBlkOffset(pkt->getAddr());
117 uint8_t *blk_data = blk->data + offset;
118
119 assert(sizeof(uint64_t) >= pkt->getSize());
120
121 overwrite_mem = true;
122 // keep a copy of our possible write value, and copy what is at the
123 // memory address into the packet
124 pkt->writeData((uint8_t *)&overwrite_val);
125 pkt->setData(blk_data);
126
127 if (pkt->req->isCondSwap()) {
128 if (pkt->getSize() == sizeof(uint64_t)) {
129 condition_val64 = pkt->req->getExtraData();
130 overwrite_mem = !std::memcmp(&condition_val64, blk_data,
131 sizeof(uint64_t));
132 } else if (pkt->getSize() == sizeof(uint32_t)) {
133 condition_val32 = (uint32_t)pkt->req->getExtraData();
134 overwrite_mem = !std::memcmp(&condition_val32, blk_data,
135 sizeof(uint32_t));
136 } else
137 panic("Invalid size for conditional read/write\n");
138 }
139
140 if (overwrite_mem) {
141 std::memcpy(blk_data, &overwrite_val, pkt->getSize());
142 blk->status |= BlkDirty;
143 }
144}
145
146
147void
148Cache::satisfyCpuSideRequest(PacketPtr pkt, CacheBlk *blk,
149 bool deferred_response, bool pending_downgrade)
150{
151 assert(pkt->isRequest());
152
153 assert(blk && blk->isValid());
154 // Occasionally this is not true... if we are a lower-level cache
155 // satisfying a string of Read and ReadEx requests from
156 // upper-level caches, a Read will mark the block as shared but we
157 // can satisfy a following ReadEx anyway since we can rely on the
158 // Read requester(s) to have buffered the ReadEx snoop and to
159 // invalidate their blocks after receiving them.
160 // assert(!pkt->needsWritable() || blk->isWritable());
161 assert(pkt->getOffset(blkSize) + pkt->getSize() <= blkSize);
162
163 // Check RMW operations first since both isRead() and
164 // isWrite() will be true for them
165 if (pkt->cmd == MemCmd::SwapReq) {
166 cmpAndSwap(blk, pkt);
167 } else if (pkt->isWrite()) {
168 // we have the block in a writable state and can go ahead,
169 // note that the line may be also be considered writable in
170 // downstream caches along the path to memory, but always
171 // Exclusive, and never Modified
172 assert(blk->isWritable());
173 // Write or WriteLine at the first cache with block in writable state
174 if (blk->checkWrite(pkt)) {
175 pkt->writeDataToBlock(blk->data, blkSize);
176 }
177 // Always mark the line as dirty (and thus transition to the
178 // Modified state) even if we are a failed StoreCond so we
179 // supply data to any snoops that have appended themselves to
180 // this cache before knowing the store will fail.
181 blk->status |= BlkDirty;
182 DPRINTF(Cache, "%s for %s addr %#llx size %d (write)\n", __func__,
183 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
184 } else if (pkt->isRead()) {
185 if (pkt->isLLSC()) {
186 blk->trackLoadLocked(pkt);
187 }
188
189 // all read responses have a data payload
190 assert(pkt->hasRespData());
191 pkt->setDataFromBlock(blk->data, blkSize);
192
193 // determine if this read is from a (coherent) cache, or not
194 // by looking at the command type; we could potentially add a
195 // packet attribute such as 'FromCache' to make this check a
196 // bit cleaner
197 if (pkt->cmd == MemCmd::ReadExReq ||
198 pkt->cmd == MemCmd::ReadSharedReq ||
199 pkt->cmd == MemCmd::ReadCleanReq ||
200 pkt->cmd == MemCmd::SCUpgradeFailReq) {
201 assert(pkt->getSize() == blkSize);
202 // special handling for coherent block requests from
203 // upper-level caches
204 if (pkt->needsWritable()) {
205 // sanity check
206 assert(pkt->cmd == MemCmd::ReadExReq ||
207 pkt->cmd == MemCmd::SCUpgradeFailReq);
208
209 // if we have a dirty copy, make sure the recipient
210 // keeps it marked dirty (in the modified state)
211 if (blk->isDirty()) {
212 pkt->setCacheResponding();
213 }
214 // on ReadExReq we give up our copy unconditionally,
215 // even if this cache is mostly inclusive, we may want
216 // to revisit this
217 invalidateBlock(blk);
218 } else if (blk->isWritable() && !pending_downgrade &&
219 !pkt->hasSharers() &&
220 pkt->cmd != MemCmd::ReadCleanReq) {
221 // we can give the requester a writable copy on a read
222 // request if:
223 // - we have a writable copy at this level (& below)
224 // - we don't have a pending snoop from below
225 // signaling another read request
226 // - no other cache above has a copy (otherwise it
227 // would have set hasSharers flag when
228 // snooping the packet)
229 // - the read has explicitly asked for a clean
230 // copy of the line
231 if (blk->isDirty()) {
232 // special considerations if we're owner:
233 if (!deferred_response) {
234 // respond with the line in Modified state
235 // (cacheResponding set, hasSharers not set)
236 pkt->setCacheResponding();
237
238 if (clusivity == Enums::mostly_excl) {
239 // if this cache is mostly exclusive with
240 // respect to the cache above, drop the
241 // block, no need to first unset the dirty
242 // bit
243 invalidateBlock(blk);
244 } else {
245 // if this cache is mostly inclusive, we
246 // keep the block in the Exclusive state,
247 // and pass it upwards as Modified
248 // (writable and dirty), hence we have
249 // multiple caches, all on the same path
250 // towards memory, all considering the
251 // same block writable, but only one
252 // considering it Modified
253
254 // we get away with multiple caches (on
255 // the same path to memory) considering
256 // the block writeable as we always enter
257 // the cache hierarchy through a cache,
258 // and first snoop upwards in all other
259 // branches
260 blk->status &= ~BlkDirty;
261 }
262 } else {
263 // if we're responding after our own miss,
264 // there's a window where the recipient didn't
265 // know it was getting ownership and may not
266 // have responded to snoops correctly, so we
267 // have to respond with a shared line
268 pkt->setHasSharers();
269 }
270 }
271 } else {
272 // otherwise only respond with a shared copy
273 pkt->setHasSharers();
274 }
275 }
276 } else {
277 // Upgrade or Invalidate
278 assert(pkt->isUpgrade() || pkt->isInvalidate());
279
280 // for invalidations we could be looking at the temp block
281 // (for upgrades we always allocate)
282 invalidateBlock(blk);
283 DPRINTF(Cache, "%s for %s addr %#llx size %d (invalidation)\n",
284 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize());
285 }
286}
287
288
289/////////////////////////////////////////////////////
290//
291// MSHR helper functions
292//
293/////////////////////////////////////////////////////
294
295
296void
297Cache::markInService(MSHR *mshr, bool pending_modified_resp)
298{
299 markInServiceInternal(mshr, pending_modified_resp);
300}
301
302/////////////////////////////////////////////////////
303//
304// Access path: requests coming in from the CPU side
305//
306/////////////////////////////////////////////////////
307
308bool
309Cache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat,
310 PacketList &writebacks)
311{
312 // sanity check
313 assert(pkt->isRequest());
314
315 chatty_assert(!(isReadOnly && pkt->isWrite()),
316 "Should never see a write in a read-only cache %s\n",
317 name());
318
319 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__,
320 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
321
322 if (pkt->req->isUncacheable()) {
323 DPRINTF(Cache, "%s%s addr %#llx uncacheable\n", pkt->cmdString(),
324 pkt->req->isInstFetch() ? " (ifetch)" : "",
325 pkt->getAddr());
326
327 // flush and invalidate any existing block
328 CacheBlk *old_blk(tags->findBlock(pkt->getAddr(), pkt->isSecure()));
329 if (old_blk && old_blk->isValid()) {
330 if (old_blk->isDirty() || writebackClean)
331 writebacks.push_back(writebackBlk(old_blk));
332 else
333 writebacks.push_back(cleanEvictBlk(old_blk));
334 tags->invalidate(old_blk);
335 old_blk->invalidate();
336 }
337
338 blk = NULL;
339 // lookupLatency is the latency in case the request is uncacheable.
340 lat = lookupLatency;
341 return false;
342 }
343
344 ContextID id = pkt->req->hasContextId() ?
345 pkt->req->contextId() : InvalidContextID;
346 // Here lat is the value passed as parameter to accessBlock() function
347 // that can modify its value.
348 blk = tags->accessBlock(pkt->getAddr(), pkt->isSecure(), lat, id);
349
350 DPRINTF(Cache, "%s%s addr %#llx size %d (%s) %s\n", pkt->cmdString(),
351 pkt->req->isInstFetch() ? " (ifetch)" : "",
352 pkt->getAddr(), pkt->getSize(), pkt->isSecure() ? "s" : "ns",
353 blk ? "hit " + blk->print() : "miss");
354
355
356 if (pkt->isEviction()) {
357 // We check for presence of block in above caches before issuing
358 // Writeback or CleanEvict to write buffer. Therefore the only
359 // possible cases can be of a CleanEvict packet coming from above
360 // encountering a Writeback generated in this cache peer cache and
361 // waiting in the write buffer. Cases of upper level peer caches
362 // generating CleanEvict and Writeback or simply CleanEvict and
363 // CleanEvict almost simultaneously will be caught by snoops sent out
364 // by crossbar.
365 std::vector<MSHR *> outgoing;
366 if (writeBuffer.findMatches(pkt->getAddr(), pkt->isSecure(),
367 outgoing)) {
368 assert(outgoing.size() == 1);
369 MSHR *wb_entry = outgoing[0];
370 assert(wb_entry->getNumTargets() == 1);
371 PacketPtr wbPkt = wb_entry->getTarget()->pkt;
372 assert(wbPkt->isWriteback());
373
374 if (pkt->isCleanEviction()) {
375 // The CleanEvict and WritebackClean snoops into other
376 // peer caches of the same level while traversing the
377 // crossbar. If a copy of the block is found, the
378 // packet is deleted in the crossbar. Hence, none of
379 // the other upper level caches connected to this
380 // cache have the block, so we can clear the
381 // BLOCK_CACHED flag in the Writeback if set and
382 // discard the CleanEvict by returning true.
383 wbPkt->clearBlockCached();
384 return true;
385 } else {
386 assert(pkt->cmd == MemCmd::WritebackDirty);
387 // Dirty writeback from above trumps our clean
388 // writeback... discard here
389 // Note: markInService will remove entry from writeback buffer.
390 markInService(wb_entry, false);
391 delete wbPkt;
392 }
393 }
394 }
395
396 // Writeback handling is special case. We can write the block into
397 // the cache without having a writeable copy (or any copy at all).
398 if (pkt->isWriteback()) {
399 assert(blkSize == pkt->getSize());
400
401 // we could get a clean writeback while we are having
402 // outstanding accesses to a block, do the simple thing for
403 // now and drop the clean writeback so that we do not upset
404 // any ordering/decisions about ownership already taken
405 if (pkt->cmd == MemCmd::WritebackClean &&
406 mshrQueue.findMatch(pkt->getAddr(), pkt->isSecure())) {
407 DPRINTF(Cache, "Clean writeback %#llx to block with MSHR, "
408 "dropping\n", pkt->getAddr());
409 return true;
410 }
411
412 if (blk == NULL) {
413 // need to do a replacement
414 blk = allocateBlock(pkt->getAddr(), pkt->isSecure(), writebacks);
415 if (blk == NULL) {
416 // no replaceable block available: give up, fwd to next level.
417 incMissCount(pkt);
418 return false;
419 }
420 tags->insertBlock(pkt, blk);
421
422 blk->status = (BlkValid | BlkReadable);
423 if (pkt->isSecure()) {
424 blk->status |= BlkSecure;
425 }
426 }
427 // only mark the block dirty if we got a writeback command,
428 // and leave it as is for a clean writeback
429 if (pkt->cmd == MemCmd::WritebackDirty) {
430 blk->status |= BlkDirty;
431 }
432 // if the packet does not have sharers, it is passing
433 // writable, and we got the writeback in Modified or Exclusive
434 // state, if not we are in the Owned or Shared state
435 if (!pkt->hasSharers()) {
436 blk->status |= BlkWritable;
437 }
438 // nothing else to do; writeback doesn't expect response
439 assert(!pkt->needsResponse());
440 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize);
441 DPRINTF(Cache, "%s new state is %s\n", __func__, blk->print());
442 incHitCount(pkt);
443 return true;
444 } else if (pkt->cmd == MemCmd::CleanEvict) {
445 if (blk != NULL) {
446 // Found the block in the tags, need to stop CleanEvict from
447 // propagating further down the hierarchy. Returning true will
448 // treat the CleanEvict like a satisfied write request and delete
449 // it.
450 return true;
451 }
452 // We didn't find the block here, propagate the CleanEvict further
453 // down the memory hierarchy. Returning false will treat the CleanEvict
454 // like a Writeback which could not find a replaceable block so has to
455 // go to next level.
456 return false;
457 } else if ((blk != NULL) &&
458 (pkt->needsWritable() ? blk->isWritable() : blk->isReadable())) {
459 // OK to satisfy access
460 incHitCount(pkt);
461 satisfyCpuSideRequest(pkt, blk);
462 return true;
463 }
464
465 // Can't satisfy access normally... either no block (blk == NULL)
466 // or have block but need writable
467
468 incMissCount(pkt);
469
470 if (blk == NULL && pkt->isLLSC() && pkt->isWrite()) {
471 // complete miss on store conditional... just give up now
472 pkt->req->setExtraData(0);
473 return true;
474 }
475
476 return false;
477}
478
479void
480Cache::doWritebacks(PacketList& writebacks, Tick forward_time)
481{
482 while (!writebacks.empty()) {
483 PacketPtr wbPkt = writebacks.front();
484 // We use forwardLatency here because we are copying writebacks to
485 // write buffer. Call isCachedAbove for both Writebacks and
486 // CleanEvicts. If isCachedAbove returns true we set BLOCK_CACHED flag
487 // in Writebacks and discard CleanEvicts.
488 if (isCachedAbove(wbPkt)) {
489 if (wbPkt->cmd == MemCmd::CleanEvict) {
490 // Delete CleanEvict because cached copies exist above. The
491 // packet destructor will delete the request object because
492 // this is a non-snoop request packet which does not require a
493 // response.
494 delete wbPkt;
495 } else if (wbPkt->cmd == MemCmd::WritebackClean) {
496 // clean writeback, do not send since the block is
497 // still cached above
498 assert(writebackClean);
499 delete wbPkt;
500 } else {
501 assert(wbPkt->cmd == MemCmd::WritebackDirty);
502 // Set BLOCK_CACHED flag in Writeback and send below, so that
503 // the Writeback does not reset the bit corresponding to this
504 // address in the snoop filter below.
505 wbPkt->setBlockCached();
506 allocateWriteBuffer(wbPkt, forward_time);
507 }
508 } else {
509 // If the block is not cached above, send packet below. Both
510 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
511 // reset the bit corresponding to this address in the snoop filter
512 // below.
513 allocateWriteBuffer(wbPkt, forward_time);
514 }
515 writebacks.pop_front();
516 }
517}
518
519void
520Cache::doWritebacksAtomic(PacketList& writebacks)
521{
522 while (!writebacks.empty()) {
523 PacketPtr wbPkt = writebacks.front();
524 // Call isCachedAbove for both Writebacks and CleanEvicts. If
525 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks
526 // and discard CleanEvicts.
527 if (isCachedAbove(wbPkt, false)) {
528 if (wbPkt->cmd == MemCmd::WritebackDirty) {
529 // Set BLOCK_CACHED flag in Writeback and send below,
530 // so that the Writeback does not reset the bit
531 // corresponding to this address in the snoop filter
532 // below. We can discard CleanEvicts because cached
533 // copies exist above. Atomic mode isCachedAbove
534 // modifies packet to set BLOCK_CACHED flag
535 memSidePort->sendAtomic(wbPkt);
536 }
537 } else {
538 // If the block is not cached above, send packet below. Both
539 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will
540 // reset the bit corresponding to this address in the snoop filter
541 // below.
542 memSidePort->sendAtomic(wbPkt);
543 }
544 writebacks.pop_front();
545 // In case of CleanEvicts, the packet destructor will delete the
546 // request object because this is a non-snoop request packet which
547 // does not require a response.
548 delete wbPkt;
549 }
550}
551
552
553void
554Cache::recvTimingSnoopResp(PacketPtr pkt)
555{
556 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__,
557 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
558
559 assert(pkt->isResponse());
560 assert(!system->bypassCaches());
561
562 // determine if the response is from a snoop request we created
563 // (in which case it should be in the outstandingSnoop), or if we
564 // merely forwarded someone else's snoop request
565 const bool forwardAsSnoop = outstandingSnoop.find(pkt->req) ==
566 outstandingSnoop.end();
567
568 if (!forwardAsSnoop) {
569 // the packet came from this cache, so sink it here and do not
570 // forward it
571 assert(pkt->cmd == MemCmd::HardPFResp);
572
573 outstandingSnoop.erase(pkt->req);
574
575 DPRINTF(Cache, "Got prefetch response from above for addr "
576 "%#llx (%s)\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
577 recvTimingResp(pkt);
578 return;
579 }
580
581 // forwardLatency is set here because there is a response from an
582 // upper level cache.
583 // To pay the delay that occurs if the packet comes from the bus,
584 // we charge also headerDelay.
585 Tick snoop_resp_time = clockEdge(forwardLatency) + pkt->headerDelay;
586 // Reset the timing of the packet.
587 pkt->headerDelay = pkt->payloadDelay = 0;
588 memSidePort->schedTimingSnoopResp(pkt, snoop_resp_time);
589}
590
591void
592Cache::promoteWholeLineWrites(PacketPtr pkt)
593{
594 // Cache line clearing instructions
595 if (doFastWrites && (pkt->cmd == MemCmd::WriteReq) &&
596 (pkt->getSize() == blkSize) && (pkt->getOffset(blkSize) == 0)) {
597 pkt->cmd = MemCmd::WriteLineReq;
598 DPRINTF(Cache, "packet promoted from Write to WriteLineReq\n");
599 }
600}
601
602bool
603Cache::recvTimingReq(PacketPtr pkt)
604{
605 DPRINTF(CacheTags, "%s tags: %s\n", __func__, tags->print());
606
607 assert(pkt->isRequest());
608
609 // Just forward the packet if caches are disabled.
610 if (system->bypassCaches()) {
611 // @todo This should really enqueue the packet rather
612 bool M5_VAR_USED success = memSidePort->sendTimingReq(pkt);
613 assert(success);
614 return true;
615 }
616
617 promoteWholeLineWrites(pkt);
618
619 if (pkt->cacheResponding()) {
620 // a cache above us (but not where the packet came from) is
621 // responding to the request, in other words it has the line
622 // in Modified or Owned state
623 DPRINTF(Cache, "Cache above responding to %#llx (%s): "
624 "not responding\n",
625 pkt->getAddr(), pkt->isSecure() ? "s" : "ns");
626
627 // if the packet needs the block to be writable, and the cache
628 // that has promised to respond (setting the cache responding
629 // flag) is not providing writable (it is in Owned rather than
630 // the Modified state), we know that there may be other Shared
631 // copies in the system; go out and invalidate them all
632 if (pkt->needsWritable() && !pkt->responderHadWritable()) {
633 // an upstream cache that had the line in Owned state
634 // (dirty, but not writable), is responding and thus
635 // transferring the dirty line from one branch of the
636 // cache hierarchy to another
637
638 // send out an express snoop and invalidate all other
639 // copies (snooping a packet that needs writable is the
640 // same as an invalidation), thus turning the Owned line
641 // into a Modified line, note that we don't invalidate the
642 // block in the current cache or any other cache on the
643 // path to memory
644
645 // create a downstream express snoop with cleared packet
646 // flags, there is no need to allocate any data as the
647 // packet is merely used to co-ordinate state transitions
648 Packet *snoop_pkt = new Packet(pkt, true, false);
649
650 // also reset the bus time that the original packet has
651 // not yet paid for
652 snoop_pkt->headerDelay = snoop_pkt->payloadDelay = 0;
653
654 // make this an instantaneous express snoop, and let the
655 // other caches in the system know that the another cache
656 // is responding, because we have found the authorative
657 // copy (Modified or Owned) that will supply the right
658 // data
659 snoop_pkt->setExpressSnoop();
660 snoop_pkt->setCacheResponding();
661
662 // this express snoop travels towards the memory, and at
663 // every crossbar it is snooped upwards thus reaching
664 // every cache in the system
665 bool M5_VAR_USED success = memSidePort->sendTimingReq(snoop_pkt);
666 // express snoops always succeed
667 assert(success);
668
669 // main memory will delete the snoop packet
670 }
671
672 // queue for deletion, as opposed to immediate deletion, as
673 // the sending cache is still relying on the packet
674 pendingDelete.reset(pkt);
675
676 // no need to take any action in this particular cache as an
677 // upstream cache has already committed to responding, and
678 // either the packet does not need writable (and we can let
679 // the cache that set the cache responding flag pass on the
680 // line without any need for intervention), or if the packet
681 // needs writable it is provided, or we have already sent out
682 // any express snoops in the section above
683 return true;
684 }
685
686 // anything that is merely forwarded pays for the forward latency and
687 // the delay provided by the crossbar
688 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
689
690 // We use lookupLatency here because it is used to specify the latency
691 // to access.
692 Cycles lat = lookupLatency;
693 CacheBlk *blk = NULL;
694 bool satisfied = false;
695 {
696 PacketList writebacks;
697 // Note that lat is passed by reference here. The function
698 // access() calls accessBlock() which can modify lat value.
699 satisfied = access(pkt, blk, lat, writebacks);
700
701 // copy writebacks to write buffer here to ensure they logically
702 // proceed anything happening below
703 doWritebacks(writebacks, forward_time);
704 }
705
706 // Here we charge the headerDelay that takes into account the latencies
707 // of the bus, if the packet comes from it.
708 // The latency charged it is just lat that is the value of lookupLatency
709 // modified by access() function, or if not just lookupLatency.
710 // In case of a hit we are neglecting response latency.
711 // In case of a miss we are neglecting forward latency.
712 Tick request_time = clockEdge(lat) + pkt->headerDelay;
713 // Here we reset the timing of the packet.
714 pkt->headerDelay = pkt->payloadDelay = 0;
715
716 // track time of availability of next prefetch, if any
717 Tick next_pf_time = MaxTick;
718
719 bool needsResponse = pkt->needsResponse();
720
721 if (satisfied) {
722 // should never be satisfying an uncacheable access as we
723 // flush and invalidate any existing block as part of the
724 // lookup
725 assert(!pkt->req->isUncacheable());
726
727 // hit (for all other request types)
728
729 if (prefetcher && (prefetchOnAccess || (blk && blk->wasPrefetched()))) {
730 if (blk)
731 blk->status &= ~BlkHWPrefetched;
732
733 // Don't notify on SWPrefetch
734 if (!pkt->cmd.isSWPrefetch())
735 next_pf_time = prefetcher->notify(pkt);
736 }
737
738 if (needsResponse) {
739 pkt->makeTimingResponse();
740 // @todo: Make someone pay for this
741 pkt->headerDelay = pkt->payloadDelay = 0;
742
743 // In this case we are considering request_time that takes
744 // into account the delay of the xbar, if any, and just
745 // lat, neglecting responseLatency, modelling hit latency
746 // just as lookupLatency or or the value of lat overriden
747 // by access(), that calls accessBlock() function.
748 cpuSidePort->schedTimingResp(pkt, request_time, true);
749 } else {
750 DPRINTF(Cache, "%s satisfied %s addr %#llx, no response needed\n",
751 __func__, pkt->cmdString(), pkt->getAddr(),
752 pkt->getSize());
753
754 // queue the packet for deletion, as the sending cache is
755 // still relying on it; if the block is found in access(),
756 // CleanEvict and Writeback messages will be deleted
757 // here as well
758 pendingDelete.reset(pkt);
759 }
760 } else {
761 // miss
762
763 Addr blk_addr = blockAlign(pkt->getAddr());
764
765 // ignore any existing MSHR if we are dealing with an
766 // uncacheable request
767 MSHR *mshr = pkt->req->isUncacheable() ? nullptr :
768 mshrQueue.findMatch(blk_addr, pkt->isSecure());
769
770 // Software prefetch handling:
771 // To keep the core from waiting on data it won't look at
772 // anyway, send back a response with dummy data. Miss handling
773 // will continue asynchronously. Unfortunately, the core will
774 // insist upon freeing original Packet/Request, so we have to
775 // create a new pair with a different lifecycle. Note that this
776 // processing happens before any MSHR munging on the behalf of
777 // this request because this new Request will be the one stored
778 // into the MSHRs, not the original.
779 if (pkt->cmd.isSWPrefetch()) {
780 assert(needsResponse);
781 assert(pkt->req->hasPaddr());
782 assert(!pkt->req->isUncacheable());
783
784 // There's no reason to add a prefetch as an additional target
785 // to an existing MSHR. If an outstanding request is already
786 // in progress, there is nothing for the prefetch to do.
787 // If this is the case, we don't even create a request at all.
788 PacketPtr pf = nullptr;
789
790 if (!mshr) {
791 // copy the request and create a new SoftPFReq packet
792 RequestPtr req = new Request(pkt->req->getPaddr(),
793 pkt->req->getSize(),
794 pkt->req->getFlags(),
795 pkt->req->masterId());
796 pf = new Packet(req, pkt->cmd);
797 pf->allocate();
798 assert(pf->getAddr() == pkt->getAddr());
799 assert(pf->getSize() == pkt->getSize());
800 }
801
802 pkt->makeTimingResponse();
803
804 // request_time is used here, taking into account lat and the delay
805 // charged if the packet comes from the xbar.
806 cpuSidePort->schedTimingResp(pkt, request_time, true);
807
808 // If an outstanding request is in progress (we found an
809 // MSHR) this is set to null
810 pkt = pf;
811 }
812
813 if (mshr) {
814 /// MSHR hit
815 /// @note writebacks will be checked in getNextMSHR()
816 /// for any conflicting requests to the same block
817
818 //@todo remove hw_pf here
819
820 // Coalesce unless it was a software prefetch (see above).
821 if (pkt) {
822 assert(!pkt->isWriteback());
823 // CleanEvicts corresponding to blocks which have
824 // outstanding requests in MSHRs are simply sunk here
825 if (pkt->cmd == MemCmd::CleanEvict) {
826 pendingDelete.reset(pkt);
827 } else {
828 DPRINTF(Cache, "%s coalescing MSHR for %s addr %#llx size %d\n",
829 __func__, pkt->cmdString(), pkt->getAddr(),
830 pkt->getSize());
831
832 assert(pkt->req->masterId() < system->maxMasters());
833 mshr_hits[pkt->cmdToIndex()][pkt->req->masterId()]++;
834 // We use forward_time here because it is the same
835 // considering new targets. We have multiple
836 // requests for the same address here. It
837 // specifies the latency to allocate an internal
838 // buffer and to schedule an event to the queued
839 // port and also takes into account the additional
840 // delay of the xbar.
841 mshr->allocateTarget(pkt, forward_time, order++,
842 allocOnFill(pkt->cmd));
843 if (mshr->getNumTargets() == numTarget) {
844 noTargetMSHR = mshr;
845 setBlocked(Blocked_NoTargets);
846 // need to be careful with this... if this mshr isn't
847 // ready yet (i.e. time > curTick()), we don't want to
848 // move it ahead of mshrs that are ready
849 // mshrQueue.moveToFront(mshr);
850 }
851 }
852 // We should call the prefetcher reguardless if the request is
853 // satisfied or not, reguardless if the request is in the MSHR or
854 // not. The request could be a ReadReq hit, but still not
855 // satisfied (potentially because of a prior write to the same
856 // cache line. So, even when not satisfied, tehre is an MSHR
857 // already allocated for this, we need to let the prefetcher know
858 // about the request
859 if (prefetcher) {
860 // Don't notify on SWPrefetch
861 if (!pkt->cmd.isSWPrefetch())
862 next_pf_time = prefetcher->notify(pkt);
863 }
864 }
865 } else {
866 // no MSHR
867 assert(pkt->req->masterId() < system->maxMasters());
868 if (pkt->req->isUncacheable()) {
869 mshr_uncacheable[pkt->cmdToIndex()][pkt->req->masterId()]++;
870 } else {
871 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++;
872 }
873
874 if (pkt->isEviction() ||
875 (pkt->req->isUncacheable() && pkt->isWrite())) {
876 // We use forward_time here because there is an
877 // uncached memory write, forwarded to WriteBuffer.
878 allocateWriteBuffer(pkt, forward_time);
879 } else {
880 if (blk && blk->isValid()) {
881 // should have flushed and have no valid block
882 assert(!pkt->req->isUncacheable());
883
884 // If we have a write miss to a valid block, we
885 // need to mark the block non-readable. Otherwise
886 // if we allow reads while there's an outstanding
887 // write miss, the read could return stale data
888 // out of the cache block... a more aggressive
889 // system could detect the overlap (if any) and
890 // forward data out of the MSHRs, but we don't do
891 // that yet. Note that we do need to leave the
892 // block valid so that it stays in the cache, in
893 // case we get an upgrade response (and hence no
894 // new data) when the write miss completes.
895 // As long as CPUs do proper store/load forwarding
896 // internally, and have a sufficiently weak memory
897 // model, this is probably unnecessary, but at some
898 // point it must have seemed like we needed it...
899 assert(pkt->needsWritable());
900 assert(!blk->isWritable());
901 blk->status &= ~BlkReadable;
902 }
903 // Here we are using forward_time, modelling the latency of
904 // a miss (outbound) just as forwardLatency, neglecting the
905 // lookupLatency component.
906 allocateMissBuffer(pkt, forward_time);
907 }
908
909 if (prefetcher) {
910 // Don't notify on SWPrefetch
911 if (!pkt->cmd.isSWPrefetch())
912 next_pf_time = prefetcher->notify(pkt);
913 }
914 }
915 }
916
917 if (next_pf_time != MaxTick)
918 schedMemSideSendEvent(next_pf_time);
919
920 return true;
921}
922
923
924// See comment in cache.hh.
925PacketPtr
926Cache::getBusPacket(PacketPtr cpu_pkt, CacheBlk *blk,
927 bool needsWritable) const
928{
929 bool blkValid = blk && blk->isValid();
930
931 if (cpu_pkt->req->isUncacheable()) {
932 // note that at the point we see the uncacheable request we
933 // flush any block, but there could be an outstanding MSHR,
934 // and the cache could have filled again before we actually
935 // send out the forwarded uncacheable request (blk could thus
936 // be non-null)
937 return NULL;
938 }
939
940 if (!blkValid &&
941 (cpu_pkt->isUpgrade() ||
942 cpu_pkt->isEviction())) {
943 // Writebacks that weren't allocated in access() and upgrades
944 // from upper-level caches that missed completely just go
945 // through.
946 return NULL;
947 }
948
949 assert(cpu_pkt->needsResponse());
950
951 MemCmd cmd;
952 // @TODO make useUpgrades a parameter.
953 // Note that ownership protocols require upgrade, otherwise a
954 // write miss on a shared owned block will generate a ReadExcl,
955 // which will clobber the owned copy.
956 const bool useUpgrades = true;
957 if (blkValid && useUpgrades) {
958 // only reason to be here is that blk is read only and we need
959 // it to be writable
960 assert(needsWritable);
961 assert(!blk->isWritable());
962 cmd = cpu_pkt->isLLSC() ? MemCmd::SCUpgradeReq : MemCmd::UpgradeReq;
963 } else if (cpu_pkt->cmd == MemCmd::SCUpgradeFailReq ||
964 cpu_pkt->cmd == MemCmd::StoreCondFailReq) {
965 // Even though this SC will fail, we still need to send out the
966 // request and get the data to supply it to other snoopers in the case
967 // where the determination the StoreCond fails is delayed due to
968 // all caches not being on the same local bus.
969 cmd = MemCmd::SCUpgradeFailReq;
970 } else if (cpu_pkt->cmd == MemCmd::WriteLineReq) {
971 // forward as invalidate to all other caches, this gives us
972 // the line in Exclusive state, and invalidates all other
973 // copies
974 cmd = MemCmd::InvalidateReq;
975 } else {
976 // block is invalid
977 cmd = needsWritable ? MemCmd::ReadExReq :
978 (isReadOnly ? MemCmd::ReadCleanReq : MemCmd::ReadSharedReq);
979 }
980 PacketPtr pkt = new Packet(cpu_pkt->req, cmd, blkSize);
981
982 // if there are upstream caches that have already marked the
983 // packet as having sharers (not passing writable), pass that info
984 // downstream
985 if (cpu_pkt->hasSharers()) {
986 // note that cpu_pkt may have spent a considerable time in the
987 // MSHR queue and that the information could possibly be out
988 // of date, however, there is no harm in conservatively
989 // assuming the block has sharers
990 pkt->setHasSharers();
991 DPRINTF(Cache, "%s passing hasSharers from %s to %s addr %#llx "
992 "size %d\n",
993 __func__, cpu_pkt->cmdString(), pkt->cmdString(),
994 pkt->getAddr(), pkt->getSize());
995 }
996
997 // the packet should be block aligned
998 assert(pkt->getAddr() == blockAlign(pkt->getAddr()));
999
1000 pkt->allocate();
1001 DPRINTF(Cache, "%s created %s from %s for addr %#llx size %d\n",
1002 __func__, pkt->cmdString(), cpu_pkt->cmdString(), pkt->getAddr(),
1003 pkt->getSize());
1004 return pkt;
1005}
1006
1007
1008Tick
1009Cache::recvAtomic(PacketPtr pkt)
1010{
1011 // We are in atomic mode so we pay just for lookupLatency here.
1012 Cycles lat = lookupLatency;
1013 // @TODO: make this a parameter
1014 bool last_level_cache = false;
1015
1016 // Forward the request if the system is in cache bypass mode.
1017 if (system->bypassCaches())
1018 return ticksToCycles(memSidePort->sendAtomic(pkt));
1019
1020 promoteWholeLineWrites(pkt);
1021
1022 if (pkt->cacheResponding()) {
1023 // have to invalidate ourselves and any lower caches even if
1024 // upper cache will be responding
1025 if (pkt->isInvalidate()) {
1026 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
1027 if (blk && blk->isValid()) {
1028 tags->invalidate(blk);
1029 blk->invalidate();
1030 DPRINTF(Cache, "Other cache responding to %s on %#llx (%s):"
1031 " invalidating\n",
1032 pkt->cmdString(), pkt->getAddr(),
1033 pkt->isSecure() ? "s" : "ns");
1034 }
1035 if (!last_level_cache) {
1036 DPRINTF(Cache, "Other cache responding to %s on %#llx (%s):"
1037 " forwarding\n",
1038 pkt->cmdString(), pkt->getAddr(),
1039 pkt->isSecure() ? "s" : "ns");
1040 lat += ticksToCycles(memSidePort->sendAtomic(pkt));
1041 }
1042 } else {
1043 DPRINTF(Cache, "Other cache responding to %s on %#llx: "
1044 "not responding\n",
1045 pkt->cmdString(), pkt->getAddr());
1046 }
1047
1048 return lat * clockPeriod();
1049 }
1050
1051 // should assert here that there are no outstanding MSHRs or
1052 // writebacks... that would mean that someone used an atomic
1053 // access in timing mode
1054
1055 CacheBlk *blk = NULL;
1056 PacketList writebacks;
1057 bool satisfied = access(pkt, blk, lat, writebacks);
1058
1059 // handle writebacks resulting from the access here to ensure they
1060 // logically proceed anything happening below
1061 doWritebacksAtomic(writebacks);
1062
1063 if (!satisfied) {
1064 // MISS
1065
1066 PacketPtr bus_pkt = getBusPacket(pkt, blk, pkt->needsWritable());
1067
1068 bool is_forward = (bus_pkt == NULL);
1069
1070 if (is_forward) {
1071 // just forwarding the same request to the next level
1072 // no local cache operation involved
1073 bus_pkt = pkt;
1074 }
1075
1076 DPRINTF(Cache, "Sending an atomic %s for %#llx (%s)\n",
1077 bus_pkt->cmdString(), bus_pkt->getAddr(),
1078 bus_pkt->isSecure() ? "s" : "ns");
1079
1080#if TRACING_ON
1081 CacheBlk::State old_state = blk ? blk->status : 0;
1082#endif
1083
1084 lat += ticksToCycles(memSidePort->sendAtomic(bus_pkt));
1085
1086 // We are now dealing with the response handling
1087 DPRINTF(Cache, "Receive response: %s for addr %#llx (%s) in state %i\n",
1088 bus_pkt->cmdString(), bus_pkt->getAddr(),
1089 bus_pkt->isSecure() ? "s" : "ns",
1090 old_state);
1091
1092 // If packet was a forward, the response (if any) is already
1093 // in place in the bus_pkt == pkt structure, so we don't need
1094 // to do anything. Otherwise, use the separate bus_pkt to
1095 // generate response to pkt and then delete it.
1096 if (!is_forward) {
1097 if (pkt->needsResponse()) {
1098 assert(bus_pkt->isResponse());
1099 if (bus_pkt->isError()) {
1100 pkt->makeAtomicResponse();
1101 pkt->copyError(bus_pkt);
1102 } else if (pkt->cmd == MemCmd::InvalidateReq) {
1103 if (blk) {
1104 // invalidate response to a cache that received
1105 // an invalidate request
1106 satisfyCpuSideRequest(pkt, blk);
1107 }
1108 } else if (pkt->cmd == MemCmd::WriteLineReq) {
1109 // note the use of pkt, not bus_pkt here.
1110
1111 // write-line request to the cache that promoted
1112 // the write to a whole line
1113 blk = handleFill(pkt, blk, writebacks,
1114 allocOnFill(pkt->cmd));
1115 satisfyCpuSideRequest(pkt, blk);
1116 } else if (bus_pkt->isRead() ||
1117 bus_pkt->cmd == MemCmd::UpgradeResp) {
1118 // we're updating cache state to allow us to
1119 // satisfy the upstream request from the cache
1120 blk = handleFill(bus_pkt, blk, writebacks,
1121 allocOnFill(pkt->cmd));
1122 satisfyCpuSideRequest(pkt, blk);
1123 } else {
1124 // we're satisfying the upstream request without
1125 // modifying cache state, e.g., a write-through
1126 pkt->makeAtomicResponse();
1127 }
1128 }
1129 delete bus_pkt;
1130 }
1131 }
1132
1133 // Note that we don't invoke the prefetcher at all in atomic mode.
1134 // It's not clear how to do it properly, particularly for
1135 // prefetchers that aggressively generate prefetch candidates and
1136 // rely on bandwidth contention to throttle them; these will tend
1137 // to pollute the cache in atomic mode since there is no bandwidth
1138 // contention. If we ever do want to enable prefetching in atomic
1139 // mode, though, this is the place to do it... see timingAccess()
1140 // for an example (though we'd want to issue the prefetch(es)
1141 // immediately rather than calling requestMemSideBus() as we do
1142 // there).
1143
1144 // do any writebacks resulting from the response handling
1145 doWritebacksAtomic(writebacks);
1146
1147 // if we used temp block, check to see if its valid and if so
1148 // clear it out, but only do so after the call to recvAtomic is
1149 // finished so that any downstream observers (such as a snoop
1150 // filter), first see the fill, and only then see the eviction
1151 if (blk == tempBlock && tempBlock->isValid()) {
1152 // the atomic CPU calls recvAtomic for fetch and load/store
1153 // sequentuially, and we may already have a tempBlock
1154 // writeback from the fetch that we have not yet sent
1155 if (tempBlockWriteback) {
1156 // if that is the case, write the prevoius one back, and
1157 // do not schedule any new event
1158 writebackTempBlockAtomic();
1159 } else {
1160 // the writeback/clean eviction happens after the call to
1161 // recvAtomic has finished (but before any successive
1162 // calls), so that the response handling from the fill is
1163 // allowed to happen first
1164 schedule(writebackTempBlockAtomicEvent, curTick());
1165 }
1166
1167 tempBlockWriteback = (blk->isDirty() || writebackClean) ?
1168 writebackBlk(blk) : cleanEvictBlk(blk);
1169 blk->invalidate();
1170 }
1171
1172 if (pkt->needsResponse()) {
1173 pkt->makeAtomicResponse();
1174 }
1175
1176 return lat * clockPeriod();
1177}
1178
1179
1180void
1181Cache::functionalAccess(PacketPtr pkt, bool fromCpuSide)
1182{
1183 if (system->bypassCaches()) {
1184 // Packets from the memory side are snoop request and
1185 // shouldn't happen in bypass mode.
1186 assert(fromCpuSide);
1187
1188 // The cache should be flushed if we are in cache bypass mode,
1189 // so we don't need to check if we need to update anything.
1190 memSidePort->sendFunctional(pkt);
1191 return;
1192 }
1193
1194 Addr blk_addr = blockAlign(pkt->getAddr());
1195 bool is_secure = pkt->isSecure();
1196 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure);
1197 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure);
1198
1199 pkt->pushLabel(name());
1200
1201 CacheBlkPrintWrapper cbpw(blk);
1202
1203 // Note that just because an L2/L3 has valid data doesn't mean an
1204 // L1 doesn't have a more up-to-date modified copy that still
1205 // needs to be found. As a result we always update the request if
1206 // we have it, but only declare it satisfied if we are the owner.
1207
1208 // see if we have data at all (owned or otherwise)
1209 bool have_data = blk && blk->isValid()
1210 && pkt->checkFunctional(&cbpw, blk_addr, is_secure, blkSize,
1211 blk->data);
1212
1213 // data we have is dirty if marked as such or if we have an
1214 // in-service MSHR that is pending a modified line
1215 bool have_dirty =
1216 have_data && (blk->isDirty() ||
1217 (mshr && mshr->inService && mshr->isPendingModified()));
1218
1219 bool done = have_dirty
1220 || cpuSidePort->checkFunctional(pkt)
1221 || mshrQueue.checkFunctional(pkt, blk_addr)
1222 || writeBuffer.checkFunctional(pkt, blk_addr)
1223 || memSidePort->checkFunctional(pkt);
1224
1225 DPRINTF(Cache, "functional %s %#llx (%s) %s%s%s\n",
1226 pkt->cmdString(), pkt->getAddr(), is_secure ? "s" : "ns",
1227 (blk && blk->isValid()) ? "valid " : "",
1228 have_data ? "data " : "", done ? "done " : "");
1229
1230 // We're leaving the cache, so pop cache->name() label
1231 pkt->popLabel();
1232
1233 if (done) {
1234 pkt->makeResponse();
1235 } else {
1236 // if it came as a request from the CPU side then make sure it
1237 // continues towards the memory side
1238 if (fromCpuSide) {
1239 memSidePort->sendFunctional(pkt);
1240 } else if (forwardSnoops && cpuSidePort->isSnooping()) {
1241 // if it came from the memory side, it must be a snoop request
1242 // and we should only forward it if we are forwarding snoops
1243 cpuSidePort->sendFunctionalSnoop(pkt);
1244 }
1245 }
1246}
1247
1248
1249/////////////////////////////////////////////////////
1250//
1251// Response handling: responses from the memory side
1252//
1253/////////////////////////////////////////////////////
1254
1255
1256void
1257Cache::recvTimingResp(PacketPtr pkt)
1258{
1259 assert(pkt->isResponse());
1260
1261 // all header delay should be paid for by the crossbar, unless
1262 // this is a prefetch response from above
1263 panic_if(pkt->headerDelay != 0 && pkt->cmd != MemCmd::HardPFResp,
1264 "%s saw a non-zero packet delay\n", name());
1265
1266 MSHR *mshr = dynamic_cast<MSHR*>(pkt->senderState);
1267 bool is_error = pkt->isError();
1268
1269 assert(mshr);
1270
1271 if (is_error) {
1272 DPRINTF(Cache, "Cache received packet with error for addr %#llx (%s), "
1273 "cmd: %s\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns",
1274 pkt->cmdString());
1275 }
1276
1277 DPRINTF(Cache, "Handling response %s for addr %#llx size %d (%s)\n",
1278 pkt->cmdString(), pkt->getAddr(), pkt->getSize(),
1279 pkt->isSecure() ? "s" : "ns");
1280
1281 MSHRQueue *mq = mshr->queue;
1282 bool wasFull = mq->isFull();
1283
1284 if (mshr == noTargetMSHR) {
1285 // we always clear at least one target
1286 clearBlocked(Blocked_NoTargets);
1287 noTargetMSHR = NULL;
1288 }
1289
1290 // Initial target is used just for stats
1291 MSHR::Target *initial_tgt = mshr->getTarget();
1292 int stats_cmd_idx = initial_tgt->pkt->cmdToIndex();
1293 Tick miss_latency = curTick() - initial_tgt->recvTime;
1294 PacketList writebacks;
1295 // We need forward_time here because we have a call of
1296 // allocateWriteBuffer() that need this parameter to specify the
1297 // time to request the bus. In this case we use forward latency
1298 // because there is a writeback. We pay also here for headerDelay
1299 // that is charged of bus latencies if the packet comes from the
1300 // bus.
1301 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
1302
1303 if (pkt->req->isUncacheable()) {
1304 assert(pkt->req->masterId() < system->maxMasters());
1305 mshr_uncacheable_lat[stats_cmd_idx][pkt->req->masterId()] +=
1306 miss_latency;
1307 } else {
1308 assert(pkt->req->masterId() < system->maxMasters());
1309 mshr_miss_latency[stats_cmd_idx][pkt->req->masterId()] +=
1310 miss_latency;
1311 }
1312
1313 // upgrade deferred targets if the response has no sharers, and is
1314 // thus passing writable
1315 if (!pkt->hasSharers()) {
1316 mshr->promoteWritable();
1317 }
1318
1319 bool is_fill = !mshr->isForward &&
1320 (pkt->isRead() || pkt->cmd == MemCmd::UpgradeResp);
1321
1322 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
1323
1324 if (is_fill && !is_error) {
1325 DPRINTF(Cache, "Block for addr %#llx being updated in Cache\n",
1326 pkt->getAddr());
1327
1328 blk = handleFill(pkt, blk, writebacks, mshr->allocOnFill);
1329 assert(blk != NULL);
1330 }
1331
1332 // allow invalidation responses originating from write-line
1333 // requests to be discarded
1334 bool is_invalidate = pkt->isInvalidate();
1335
1336 // First offset for critical word first calculations
1337 int initial_offset = initial_tgt->pkt->getOffset(blkSize);
1338
1339 while (mshr->hasTargets()) {
1340 MSHR::Target *target = mshr->getTarget();
1341 Packet *tgt_pkt = target->pkt;
1342
1343 switch (target->source) {
1344 case MSHR::Target::FromCPU:
1345 Tick completion_time;
1346 // Here we charge on completion_time the delay of the xbar if the
1347 // packet comes from it, charged on headerDelay.
1348 completion_time = pkt->headerDelay;
1349
1350 // Software prefetch handling for cache closest to core
1351 if (tgt_pkt->cmd.isSWPrefetch()) {
1352 // a software prefetch would have already been ack'd immediately
1353 // with dummy data so the core would be able to retire it.
1354 // this request completes right here, so we deallocate it.
1355 delete tgt_pkt->req;
1356 delete tgt_pkt;
1357 break; // skip response
1358 }
1359
1360 // unlike the other packet flows, where data is found in other
1361 // caches or memory and brought back, write-line requests always
1362 // have the data right away, so the above check for "is fill?"
1363 // cannot actually be determined until examining the stored MSHR
1364 // state. We "catch up" with that logic here, which is duplicated
1365 // from above.
1366 if (tgt_pkt->cmd == MemCmd::WriteLineReq) {
1367 assert(!is_error);
1368 // we got the block in a writable state, so promote
1369 // any deferred targets if possible
1370 mshr->promoteWritable();
1371 // NB: we use the original packet here and not the response!
1372 blk = handleFill(tgt_pkt, blk, writebacks, mshr->allocOnFill);
1373 assert(blk != NULL);
1374
1375 // treat as a fill, and discard the invalidation
1376 // response
1377 is_fill = true;
1378 is_invalidate = false;
1379 }
1380
1381 if (is_fill) {
1382 satisfyCpuSideRequest(tgt_pkt, blk,
1383 true, mshr->hasPostDowngrade());
1384
1385 // How many bytes past the first request is this one
1386 int transfer_offset =
1387 tgt_pkt->getOffset(blkSize) - initial_offset;
1388 if (transfer_offset < 0) {
1389 transfer_offset += blkSize;
1390 }
1391
1392 // If not critical word (offset) return payloadDelay.
1393 // responseLatency is the latency of the return path
1394 // from lower level caches/memory to an upper level cache or
1395 // the core.
1396 completion_time += clockEdge(responseLatency) +
1397 (transfer_offset ? pkt->payloadDelay : 0);
1398
1399 assert(!tgt_pkt->req->isUncacheable());
1400
1401 assert(tgt_pkt->req->masterId() < system->maxMasters());
1402 missLatency[tgt_pkt->cmdToIndex()][tgt_pkt->req->masterId()] +=
1403 completion_time - target->recvTime;
1404 } else if (pkt->cmd == MemCmd::UpgradeFailResp) {
1405 // failed StoreCond upgrade
1406 assert(tgt_pkt->cmd == MemCmd::StoreCondReq ||
1407 tgt_pkt->cmd == MemCmd::StoreCondFailReq ||
1408 tgt_pkt->cmd == MemCmd::SCUpgradeFailReq);
1409 // responseLatency is the latency of the return path
1410 // from lower level caches/memory to an upper level cache or
1411 // the core.
1412 completion_time += clockEdge(responseLatency) +
1413 pkt->payloadDelay;
1414 tgt_pkt->req->setExtraData(0);
1415 } else {
1416 // not a cache fill, just forwarding response
1417 // responseLatency is the latency of the return path
1418 // from lower level cahces/memory to the core.
1419 completion_time += clockEdge(responseLatency) +
1420 pkt->payloadDelay;
1421 if (pkt->isRead() && !is_error) {
1422 // sanity check
1423 assert(pkt->getAddr() == tgt_pkt->getAddr());
1424 assert(pkt->getSize() >= tgt_pkt->getSize());
1425
1426 tgt_pkt->setData(pkt->getConstPtr<uint8_t>());
1427 }
1428 }
1429 tgt_pkt->makeTimingResponse();
1430 // if this packet is an error copy that to the new packet
1431 if (is_error)
1432 tgt_pkt->copyError(pkt);
1433 if (tgt_pkt->cmd == MemCmd::ReadResp &&
1434 (is_invalidate || mshr->hasPostInvalidate())) {
1435 // If intermediate cache got ReadRespWithInvalidate,
1436 // propagate that. Response should not have
1437 // isInvalidate() set otherwise.
1438 tgt_pkt->cmd = MemCmd::ReadRespWithInvalidate;
1439 DPRINTF(Cache, "%s updated cmd to %s for addr %#llx\n",
1440 __func__, tgt_pkt->cmdString(), tgt_pkt->getAddr());
1441 }
1442 // Reset the bus additional time as it is now accounted for
1443 tgt_pkt->headerDelay = tgt_pkt->payloadDelay = 0;
1444 cpuSidePort->schedTimingResp(tgt_pkt, completion_time, true);
1445 break;
1446
1447 case MSHR::Target::FromPrefetcher:
1448 assert(tgt_pkt->cmd == MemCmd::HardPFReq);
1449 if (blk)
1450 blk->status |= BlkHWPrefetched;
1451 delete tgt_pkt->req;
1452 delete tgt_pkt;
1453 break;
1454
1455 case MSHR::Target::FromSnoop:
1456 // I don't believe that a snoop can be in an error state
1457 assert(!is_error);
1458 // response to snoop request
1459 DPRINTF(Cache, "processing deferred snoop...\n");
1460 assert(!(is_invalidate && !mshr->hasPostInvalidate()));
1461 handleSnoop(tgt_pkt, blk, true, true, mshr->hasPostInvalidate());
1462 break;
1463
1464 default:
1465 panic("Illegal target->source enum %d\n", target->source);
1466 }
1467
1468 mshr->popTarget();
1469 }
1470
1471 if (blk && blk->isValid()) {
1472 // an invalidate response stemming from a write line request
1473 // should not invalidate the block, so check if the
1474 // invalidation should be discarded
1475 if (is_invalidate || mshr->hasPostInvalidate()) {
1476 invalidateBlock(blk);
1477 } else if (mshr->hasPostDowngrade()) {
1478 blk->status &= ~BlkWritable;
1479 }
1480 }
1481
1482 if (mshr->promoteDeferredTargets()) {
1483 // avoid later read getting stale data while write miss is
1484 // outstanding.. see comment in timingAccess()
1485 if (blk) {
1486 blk->status &= ~BlkReadable;
1487 }
1488 mq = mshr->queue;
1489 mq->markPending(mshr);
1490 schedMemSideSendEvent(clockEdge() + pkt->payloadDelay);
1491 } else {
1492 mq->deallocate(mshr);
1493 if (wasFull && !mq->isFull()) {
1494 clearBlocked((BlockedCause)mq->index);
1495 }
1496
1497 // Request the bus for a prefetch if this deallocation freed enough
1498 // MSHRs for a prefetch to take place
1499 if (prefetcher && mq == &mshrQueue && mshrQueue.canPrefetch()) {
1500 Tick next_pf_time = std::max(prefetcher->nextPrefetchReadyTime(),
1501 clockEdge());
1502 if (next_pf_time != MaxTick)
1503 schedMemSideSendEvent(next_pf_time);
1504 }
1505 }
1506 // reset the xbar additional timinig as it is now accounted for
1507 pkt->headerDelay = pkt->payloadDelay = 0;
1508
1509 // copy writebacks to write buffer
1510 doWritebacks(writebacks, forward_time);
1511
1512 // if we used temp block, check to see if its valid and then clear it out
1513 if (blk == tempBlock && tempBlock->isValid()) {
1514 // We use forwardLatency here because we are copying
1515 // Writebacks/CleanEvicts to write buffer. It specifies the latency to
1516 // allocate an internal buffer and to schedule an event to the
1517 // queued port.
1518 if (blk->isDirty() || writebackClean) {
1519 PacketPtr wbPkt = writebackBlk(blk);
1520 allocateWriteBuffer(wbPkt, forward_time);
1521 // Set BLOCK_CACHED flag if cached above.
1522 if (isCachedAbove(wbPkt))
1523 wbPkt->setBlockCached();
1524 } else {
1525 PacketPtr wcPkt = cleanEvictBlk(blk);
1526 // Check to see if block is cached above. If not allocate
1527 // write buffer
1528 if (isCachedAbove(wcPkt))
1529 delete wcPkt;
1530 else
1531 allocateWriteBuffer(wcPkt, forward_time);
1532 }
1533 blk->invalidate();
1534 }
1535
1536 DPRINTF(Cache, "Leaving %s with %s for addr %#llx\n", __func__,
1537 pkt->cmdString(), pkt->getAddr());
1538 delete pkt;
1539}
1540
1541PacketPtr
1542Cache::writebackBlk(CacheBlk *blk)
1543{
1544 chatty_assert(!isReadOnly || writebackClean,
1545 "Writeback from read-only cache");
1546 assert(blk && blk->isValid() && (blk->isDirty() || writebackClean));
1547
1548 writebacks[Request::wbMasterId]++;
1549
1550 Request *req = new Request(tags->regenerateBlkAddr(blk->tag, blk->set),
1551 blkSize, 0, Request::wbMasterId);
1552 if (blk->isSecure())
1553 req->setFlags(Request::SECURE);
1554
1555 req->taskId(blk->task_id);
1556 blk->task_id= ContextSwitchTaskId::Unknown;
1557 blk->tickInserted = curTick();
1558
1559 PacketPtr pkt =
1560 new Packet(req, blk->isDirty() ?
1561 MemCmd::WritebackDirty : MemCmd::WritebackClean);
1562
1563 DPRINTF(Cache, "Create Writeback %#llx writable: %d, dirty: %d\n",
1564 pkt->getAddr(), blk->isWritable(), blk->isDirty());
1565
1566 if (blk->isWritable()) {
1567 // not asserting shared means we pass the block in modified
1568 // state, mark our own block non-writeable
1569 blk->status &= ~BlkWritable;
1570 } else {
1571 // we are in the Owned state, tell the receiver
1572 pkt->setHasSharers();
1573 }
1574
1575 // make sure the block is not marked dirty
1576 blk->status &= ~BlkDirty;
1577
1578 pkt->allocate();
1579 std::memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize);
1580
1581 return pkt;
1582}
1583
1584PacketPtr
1585Cache::cleanEvictBlk(CacheBlk *blk)
1586{
1587 assert(!writebackClean);
1588 assert(blk && blk->isValid() && !blk->isDirty());
1589 // Creating a zero sized write, a message to the snoop filter
1590 Request *req =
1591 new Request(tags->regenerateBlkAddr(blk->tag, blk->set), blkSize, 0,
1592 Request::wbMasterId);
1593 if (blk->isSecure())
1594 req->setFlags(Request::SECURE);
1595
1596 req->taskId(blk->task_id);
1597 blk->task_id = ContextSwitchTaskId::Unknown;
1598 blk->tickInserted = curTick();
1599
1600 PacketPtr pkt = new Packet(req, MemCmd::CleanEvict);
1601 pkt->allocate();
1602 DPRINTF(Cache, "%s%s %x Create CleanEvict\n", pkt->cmdString(),
1603 pkt->req->isInstFetch() ? " (ifetch)" : "",
1604 pkt->getAddr());
1605
1606 return pkt;
1607}
1608
1609void
1610Cache::memWriteback()
1611{
1612 CacheBlkVisitorWrapper visitor(*this, &Cache::writebackVisitor);
1613 tags->forEachBlk(visitor);
1614}
1615
1616void
1617Cache::memInvalidate()
1618{
1619 CacheBlkVisitorWrapper visitor(*this, &Cache::invalidateVisitor);
1620 tags->forEachBlk(visitor);
1621}
1622
1623bool
1624Cache::isDirty() const
1625{
1626 CacheBlkIsDirtyVisitor visitor;
1627 tags->forEachBlk(visitor);
1628
1629 return visitor.isDirty();
1630}
1631
1632bool
1633Cache::writebackVisitor(CacheBlk &blk)
1634{
1635 if (blk.isDirty()) {
1636 assert(blk.isValid());
1637
1638 Request request(tags->regenerateBlkAddr(blk.tag, blk.set),
1639 blkSize, 0, Request::funcMasterId);
1640 request.taskId(blk.task_id);
1641
1642 Packet packet(&request, MemCmd::WriteReq);
1643 packet.dataStatic(blk.data);
1644
1645 memSidePort->sendFunctional(&packet);
1646
1647 blk.status &= ~BlkDirty;
1648 }
1649
1650 return true;
1651}
1652
1653bool
1654Cache::invalidateVisitor(CacheBlk &blk)
1655{
1656
1657 if (blk.isDirty())
1658 warn_once("Invalidating dirty cache lines. Expect things to break.\n");
1659
1660 if (blk.isValid()) {
1661 assert(!blk.isDirty());
1662 tags->invalidate(&blk);
1663 blk.invalidate();
1664 }
1665
1666 return true;
1667}
1668
1669CacheBlk*
1670Cache::allocateBlock(Addr addr, bool is_secure, PacketList &writebacks)
1671{
1672 CacheBlk *blk = tags->findVictim(addr);
1673
1674 // It is valid to return NULL if there is no victim
1675 if (!blk)
1676 return nullptr;
1677
1678 if (blk->isValid()) {
1679 Addr repl_addr = tags->regenerateBlkAddr(blk->tag, blk->set);
1680 MSHR *repl_mshr = mshrQueue.findMatch(repl_addr, blk->isSecure());
1681 if (repl_mshr) {
1682 // must be an outstanding upgrade request
1683 // on a block we're about to replace...
1684 assert(!blk->isWritable() || blk->isDirty());
1685 assert(repl_mshr->needsWritable());
1686 // too hard to replace block with transient state
1687 // allocation failed, block not inserted
1688 return NULL;
1689 } else {
1690 DPRINTF(Cache, "replacement: replacing %#llx (%s) with %#llx (%s): %s\n",
1691 repl_addr, blk->isSecure() ? "s" : "ns",
1692 addr, is_secure ? "s" : "ns",
1693 blk->isDirty() ? "writeback" : "clean");
1694
1695 // Will send up Writeback/CleanEvict snoops via isCachedAbove
1696 // when pushing this writeback list into the write buffer.
1697 if (blk->isDirty() || writebackClean) {
1698 // Save writeback packet for handling by caller
1699 writebacks.push_back(writebackBlk(blk));
1700 } else {
1701 writebacks.push_back(cleanEvictBlk(blk));
1702 }
1703 }
1704 }
1705
1706 return blk;
1707}
1708
1709void
1710Cache::invalidateBlock(CacheBlk *blk)
1711{
1712 if (blk != tempBlock)
1713 tags->invalidate(blk);
1714 blk->invalidate();
1715}
1716
1717// Note that the reason we return a list of writebacks rather than
1718// inserting them directly in the write buffer is that this function
1719// is called by both atomic and timing-mode accesses, and in atomic
1720// mode we don't mess with the write buffer (we just perform the
1721// writebacks atomically once the original request is complete).
1722CacheBlk*
1723Cache::handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks,
1724 bool allocate)
1725{
1726 assert(pkt->isResponse() || pkt->cmd == MemCmd::WriteLineReq);
1727 Addr addr = pkt->getAddr();
1728 bool is_secure = pkt->isSecure();
1729#if TRACING_ON
1730 CacheBlk::State old_state = blk ? blk->status : 0;
1731#endif
1732
1733 // When handling a fill, discard any CleanEvicts for the
1734 // same address in write buffer.
1735 Addr M5_VAR_USED blk_addr = blockAlign(pkt->getAddr());
1736 std::vector<MSHR *> M5_VAR_USED wbs;
1737 assert (!writeBuffer.findMatches(blk_addr, is_secure, wbs));
1738
1739 if (blk == NULL) {
1740 // better have read new data...
1741 assert(pkt->hasData());
1742
1743 // only read responses and write-line requests have data;
1744 // note that we don't write the data here for write-line - that
1745 // happens in the subsequent satisfyCpuSideRequest.
1746 assert(pkt->isRead() || pkt->cmd == MemCmd::WriteLineReq);
1747
1748 // need to do a replacement if allocating, otherwise we stick
1749 // with the temporary storage
1750 blk = allocate ? allocateBlock(addr, is_secure, writebacks) : NULL;
1751
1752 if (blk == NULL) {
1753 // No replaceable block or a mostly exclusive
1754 // cache... just use temporary storage to complete the
1755 // current request and then get rid of it
1756 assert(!tempBlock->isValid());
1757 blk = tempBlock;
1758 tempBlock->set = tags->extractSet(addr);
1759 tempBlock->tag = tags->extractTag(addr);
1760 // @todo: set security state as well...
1761 DPRINTF(Cache, "using temp block for %#llx (%s)\n", addr,
1762 is_secure ? "s" : "ns");
1763 } else {
1764 tags->insertBlock(pkt, blk);
1765 }
1766
1767 // we should never be overwriting a valid block
1768 assert(!blk->isValid());
1769 } else {
1770 // existing block... probably an upgrade
1771 assert(blk->tag == tags->extractTag(addr));
1772 // either we're getting new data or the block should already be valid
1773 assert(pkt->hasData() || blk->isValid());
1774 // don't clear block status... if block is already dirty we
1775 // don't want to lose that
1776 }
1777
1778 if (is_secure)
1779 blk->status |= BlkSecure;
1780 blk->status |= BlkValid | BlkReadable;
1781
1782 // sanity check for whole-line writes, which should always be
1783 // marked as writable as part of the fill, and then later marked
1784 // dirty as part of satisfyCpuSideRequest
1785 if (pkt->cmd == MemCmd::WriteLineReq) {
1786 assert(!pkt->hasSharers());
1787 // at the moment other caches do not respond to the
1788 // invalidation requests corresponding to a whole-line write
1789 assert(!pkt->cacheResponding());
1790 }
1791
1792 // here we deal with setting the appropriate state of the line,
1793 // and we start by looking at the hasSharers flag, and ignore the
1794 // cacheResponding flag (normally signalling dirty data) if the
1795 // packet has sharers, thus the line is never allocated as Owned
1796 // (dirty but not writable), and always ends up being either
1797 // Shared, Exclusive or Modified, see Packet::setCacheResponding
1798 // for more details
1799 if (!pkt->hasSharers()) {
1800 // we could get a writable line from memory (rather than a
1801 // cache) even in a read-only cache, note that we set this bit
1802 // even for a read-only cache, possibly revisit this decision
1803 blk->status |= BlkWritable;
1804
1805 // check if we got this via cache-to-cache transfer (i.e., from a
1806 // cache that had the block in Modified or Owned state)
1807 if (pkt->cacheResponding()) {
1808 // we got the block in Modified state, and invalidated the
1809 // owners copy
1810 blk->status |= BlkDirty;
1811
1812 chatty_assert(!isReadOnly, "Should never see dirty snoop response "
1813 "in read-only cache %s\n", name());
1814 }
1815 }
1816
1817 DPRINTF(Cache, "Block addr %#llx (%s) moving from state %x to %s\n",
1818 addr, is_secure ? "s" : "ns", old_state, blk->print());
1819
1820 // if we got new data, copy it in (checking for a read response
1821 // and a response that has data is the same in the end)
1822 if (pkt->isRead()) {
1823 // sanity checks
1824 assert(pkt->hasData());
1825 assert(pkt->getSize() == blkSize);
1826
1827 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize);
1828 }
1829 // We pay for fillLatency here.
1830 blk->whenReady = clockEdge() + fillLatency * clockPeriod() +
1831 pkt->payloadDelay;
1832
1833 return blk;
1834}
1835
1836
1837/////////////////////////////////////////////////////
1838//
1839// Snoop path: requests coming in from the memory side
1840//
1841/////////////////////////////////////////////////////
1842
1843void
1844Cache::doTimingSupplyResponse(PacketPtr req_pkt, const uint8_t *blk_data,
1845 bool already_copied, bool pending_inval)
1846{
1847 // sanity check
1848 assert(req_pkt->isRequest());
1849 assert(req_pkt->needsResponse());
1850
1851 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__,
1852 req_pkt->cmdString(), req_pkt->getAddr(), req_pkt->getSize());
1853 // timing-mode snoop responses require a new packet, unless we
1854 // already made a copy...
1855 PacketPtr pkt = req_pkt;
1856 if (!already_copied)
1857 // do not clear flags, and allocate space for data if the
1858 // packet needs it (the only packets that carry data are read
1859 // responses)
1860 pkt = new Packet(req_pkt, false, req_pkt->isRead());
1861
1862 assert(req_pkt->req->isUncacheable() || req_pkt->isInvalidate() ||
1863 pkt->hasSharers());
1864 pkt->makeTimingResponse();
1865 if (pkt->isRead()) {
1866 pkt->setDataFromBlock(blk_data, blkSize);
1867 }
1868 if (pkt->cmd == MemCmd::ReadResp && pending_inval) {
1869 // Assume we defer a response to a read from a far-away cache
1870 // A, then later defer a ReadExcl from a cache B on the same
1871 // bus as us. We'll assert cacheResponding in both cases, but
1872 // in the latter case cacheResponding will keep the
1873 // invalidation from reaching cache A. This special response
1874 // tells cache A that it gets the block to satisfy its read,
1875 // but must immediately invalidate it.
1876 pkt->cmd = MemCmd::ReadRespWithInvalidate;
1877 }
1878 // Here we consider forward_time, paying for just forward latency and
1879 // also charging the delay provided by the xbar.
1880 // forward_time is used as send_time in next allocateWriteBuffer().
1881 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay;
1882 // Here we reset the timing of the packet.
1883 pkt->headerDelay = pkt->payloadDelay = 0;
1884 DPRINTF(Cache, "%s created response: %s addr %#llx size %d tick: %lu\n",
1885 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize(),
1886 forward_time);
1887 memSidePort->schedTimingSnoopResp(pkt, forward_time, true);
1888}
1889
1890uint32_t
1891Cache::handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing,
1892 bool is_deferred, bool pending_inval)
1893{
1894 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__,
1895 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
1896 // deferred snoops can only happen in timing mode
1897 assert(!(is_deferred && !is_timing));
1898 // pending_inval only makes sense on deferred snoops
1899 assert(!(pending_inval && !is_deferred));
1900 assert(pkt->isRequest());
1901
1902 // the packet may get modified if we or a forwarded snooper
1903 // responds in atomic mode, so remember a few things about the
1904 // original packet up front
1905 bool invalidate = pkt->isInvalidate();
1906 bool M5_VAR_USED needs_writable = pkt->needsWritable();
1907
1908 // at the moment we could get an uncacheable write which does not
1909 // have the invalidate flag, and we need a suitable way of dealing
1910 // with this case
1911 panic_if(invalidate && pkt->req->isUncacheable(),
1912 "%s got an invalidating uncacheable snoop request %s to %#llx",
1913 name(), pkt->cmdString(), pkt->getAddr());
1914
1915 uint32_t snoop_delay = 0;
1916
1917 if (forwardSnoops) {
1918 // first propagate snoop upward to see if anyone above us wants to
1919 // handle it. save & restore packet src since it will get
1920 // rewritten to be relative to cpu-side bus (if any)
1921 bool alreadyResponded = pkt->cacheResponding();
1922 if (is_timing) {
1923 // copy the packet so that we can clear any flags before
1924 // forwarding it upwards, we also allocate data (passing
1925 // the pointer along in case of static data), in case
1926 // there is a snoop hit in upper levels
1927 Packet snoopPkt(pkt, true, true);
1928 snoopPkt.setExpressSnoop();
1929 // the snoop packet does not need to wait any additional
1930 // time
1931 snoopPkt.headerDelay = snoopPkt.payloadDelay = 0;
1932 cpuSidePort->sendTimingSnoopReq(&snoopPkt);
1933
1934 // add the header delay (including crossbar and snoop
1935 // delays) of the upward snoop to the snoop delay for this
1936 // cache
1937 snoop_delay += snoopPkt.headerDelay;
1938
1939 if (snoopPkt.cacheResponding()) {
1940 // cache-to-cache response from some upper cache
1941 assert(!alreadyResponded);
1942 pkt->setCacheResponding();
1943 }
1944 // upstream cache has the block, or has an outstanding
1945 // MSHR, pass the flag on
1946 if (snoopPkt.hasSharers()) {
1947 pkt->setHasSharers();
1948 }
1949 // If this request is a prefetch or clean evict and an upper level
1950 // signals block present, make sure to propagate the block
1951 // presence to the requester.
1952 if (snoopPkt.isBlockCached()) {
1953 pkt->setBlockCached();
1954 }
1955 } else {
1956 cpuSidePort->sendAtomicSnoop(pkt);
1957 if (!alreadyResponded && pkt->cacheResponding()) {
1958 // cache-to-cache response from some upper cache:
1959 // forward response to original requester
1960 assert(pkt->isResponse());
1961 }
1962 }
1963 }
1964
1965 if (!blk || !blk->isValid()) {
1966 DPRINTF(Cache, "%s snoop miss for %s addr %#llx size %d\n",
1967 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize());
1968 return snoop_delay;
1969 } else {
1970 DPRINTF(Cache, "%s snoop hit for %s for addr %#llx size %d, "
1971 "old state is %s\n", __func__, pkt->cmdString(),
1972 pkt->getAddr(), pkt->getSize(), blk->print());
1973 }
1974
1975 chatty_assert(!(isReadOnly && blk->isDirty()),
1976 "Should never have a dirty block in a read-only cache %s\n",
1977 name());
1978
1979 // We may end up modifying both the block state and the packet (if
1980 // we respond in atomic mode), so just figure out what to do now
1981 // and then do it later. If we find dirty data while snooping for
1982 // an invalidate, we don't need to send a response. The
1983 // invalidation itself is taken care of below.
1984 bool respond = blk->isDirty() && pkt->needsResponse() &&
1985 pkt->cmd != MemCmd::InvalidateReq;
1986 bool have_writable = blk->isWritable();
1987
1988 // Invalidate any prefetch's from below that would strip write permissions
1989 // MemCmd::HardPFReq is only observed by upstream caches. After missing
1990 // above and in it's own cache, a new MemCmd::ReadReq is created that
1991 // downstream caches observe.
1992 if (pkt->mustCheckAbove()) {
1993 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s from"
1994 " lower cache\n", pkt->getAddr(), pkt->cmdString());
1995 pkt->setBlockCached();
1996 return snoop_delay;
1997 }
1998
1999 if (pkt->isRead() && !invalidate) {
2000 // reading without requiring the line in a writable state
2001 assert(!needs_writable);
2002 pkt->setHasSharers();
2003
2004 // if the requesting packet is uncacheable, retain the line in
2005 // the current state, otherwhise unset the writable flag,
2006 // which means we go from Modified to Owned (and will respond
2007 // below), remain in Owned (and will respond below), from
2008 // Exclusive to Shared, or remain in Shared
2009 if (!pkt->req->isUncacheable())
2010 blk->status &= ~BlkWritable;
2011 }
2012
2013 if (respond) {
2014 // prevent anyone else from responding, cache as well as
2015 // memory, and also prevent any memory from even seeing the
2016 // request
2017 pkt->setCacheResponding();
2018 if (have_writable) {
2019 // inform the cache hierarchy that this cache had the line
2020 // in the Modified state so that we avoid unnecessary
2021 // invalidations (see Packet::setResponderHadWritable)
2022 pkt->setResponderHadWritable();
2023
2024 // in the case of an uncacheable request there is no point
2025 // in setting the responderHadWritable flag, but since the
2026 // recipient does not care there is no harm in doing so
2027 } else {
2028 // if the packet has needsWritable set we invalidate our
2029 // copy below and all other copies will be invalidates
2030 // through express snoops, and if needsWritable is not set
2031 // we already called setHasSharers above
2032 }
2033
2034 // if we are returning a writable and dirty (Modified) line,
2035 // we should be invalidating the line
2036 panic_if(!invalidate && !pkt->hasSharers(),
2037 "%s is passing a Modified line through %s to %#llx, "
2038 "but keeping the block",
2039 name(), pkt->cmdString(), pkt->getAddr());
2040
2041 if (is_timing) {
2042 doTimingSupplyResponse(pkt, blk->data, is_deferred, pending_inval);
2043 } else {
2044 pkt->makeAtomicResponse();
2045 // packets such as upgrades do not actually have any data
2046 // payload
2047 if (pkt->hasData())
2048 pkt->setDataFromBlock(blk->data, blkSize);
2049 }
2050 }
2051
2052 if (!respond && is_timing && is_deferred) {
2053 // if it's a deferred timing snoop to which we are not
2054 // responding, then we've made a copy of both the request and
2055 // the packet, delete them here
2056 assert(pkt->needsResponse());
2057 delete pkt->req;
2058 delete pkt;
2059 }
2060
2061 // Do this last in case it deallocates block data or something
2062 // like that
2063 if (invalidate) {
2064 invalidateBlock(blk);
2065 }
2066
2067 DPRINTF(Cache, "new state is %s\n", blk->print());
2068
2069 return snoop_delay;
2070}
2071
2072
2073void
2074Cache::recvTimingSnoopReq(PacketPtr pkt)
2075{
2076 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__,
2077 pkt->cmdString(), pkt->getAddr(), pkt->getSize());
2078
2079 // Snoops shouldn't happen when bypassing caches
2080 assert(!system->bypassCaches());
2081
2082 // no need to snoop requests that are not in range
2083 if (!inRange(pkt->getAddr())) {
2084 return;
2085 }
2086
2087 bool is_secure = pkt->isSecure();
2088 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure);
2089
2090 Addr blk_addr = blockAlign(pkt->getAddr());
2091 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure);
2092
2093 // Update the latency cost of the snoop so that the crossbar can
2094 // account for it. Do not overwrite what other neighbouring caches
2095 // have already done, rather take the maximum. The update is
2096 // tentative, for cases where we return before an upward snoop
2097 // happens below.
2098 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay,
2099 lookupLatency * clockPeriod());
2100
2101 // Inform request(Prefetch, CleanEvict or Writeback) from below of
2102 // MSHR hit, set setBlockCached.
2103 if (mshr && pkt->mustCheckAbove()) {
2104 DPRINTF(Cache, "Setting block cached for %s from"
2105 "lower cache on mshr hit %#x\n",
2106 pkt->cmdString(), pkt->getAddr());
2107 pkt->setBlockCached();
2108 return;
2109 }
2110
2111 // Let the MSHR itself track the snoop and decide whether we want
2112 // to go ahead and do the regular cache snoop
2113 if (mshr && mshr->handleSnoop(pkt, order++)) {
2114 DPRINTF(Cache, "Deferring snoop on in-service MSHR to blk %#llx (%s)."
2115 "mshrs: %s\n", blk_addr, is_secure ? "s" : "ns",
2116 mshr->print());
2117
2118 if (mshr->getNumTargets() > numTarget)
2119 warn("allocating bonus target for snoop"); //handle later
2120 return;
2121 }
2122
2123 //We also need to check the writeback buffers and handle those
2124 std::vector<MSHR *> writebacks;
2125 if (writeBuffer.findMatches(blk_addr, is_secure, writebacks)) {
2126 DPRINTF(Cache, "Snoop hit in writeback to addr %#llx (%s)\n",
2127 pkt->getAddr(), is_secure ? "s" : "ns");
2128
2129 // Look through writebacks for any cachable writes.
2130 // We should only ever find a single match
2131 assert(writebacks.size() == 1);
2132 MSHR *wb_entry = writebacks[0];
2133 // Expect to see only Writebacks and/or CleanEvicts here, both of
2134 // which should not be generated for uncacheable data.
2135 assert(!wb_entry->isUncacheable());
2136 // There should only be a single request responsible for generating
2137 // Writebacks/CleanEvicts.
2138 assert(wb_entry->getNumTargets() == 1);
2139 PacketPtr wb_pkt = wb_entry->getTarget()->pkt;
2140 assert(wb_pkt->isEviction());
2141
2142 if (pkt->isEviction()) {
2143 // if the block is found in the write queue, set the BLOCK_CACHED
2144 // flag for Writeback/CleanEvict snoop. On return the snoop will
2145 // propagate the BLOCK_CACHED flag in Writeback packets and prevent
2146 // any CleanEvicts from travelling down the memory hierarchy.
2147 pkt->setBlockCached();
2148 DPRINTF(Cache, "Squashing %s from lower cache on writequeue hit"
2149 " %#x\n", pkt->cmdString(), pkt->getAddr());
2150 return;
2151 }
2152
2153 if (wb_pkt->cmd == MemCmd::WritebackDirty) {
2154 // we have dirty data, and so will proceed to respond
2155 pkt->setCacheResponding();
2156 if (!pkt->needsWritable()) {
2157 // the packet should end up in the Shared state (non
2158 // writable) on the completion of the fill
2159 pkt->setHasSharers();
2160 // similarly, the writeback is no longer passing
2161 // writeable (the receiving cache should consider the
2162 // block Owned rather than Modified)
2163 wb_pkt->setHasSharers();
2164 } else {
2165 // we need to invalidate our copy. we do that
2166 // below.
2167 assert(pkt->isInvalidate());
2168 }
2169 doTimingSupplyResponse(pkt, wb_pkt->getConstPtr<uint8_t>(),
2170 false, false);
2171 } else {
2172 // on hitting a clean writeback we play it safe and do not
2173 // provide a response, the block may be dirty somewhere
2174 // else
2175 assert(wb_pkt->isCleanEviction());
2176 // The cache technically holds the block until the
2177 // corresponding message reaches the crossbar
2178 // below. Therefore when a snoop encounters a CleanEvict
2179 // or WritebackClean message we must call
2180 // setHasSharers (just like when it encounters a
2181 // Writeback) to avoid the snoop filter prematurely
2182 // clearing the holder bit in the crossbar below
2183 if (!pkt->needsWritable()) {
2184 pkt->setHasSharers();
2185 // the writeback is no longer passing writeable (the
2186 // receiving cache should consider the block Owned
2187 // rather than Modified)
2188 wb_pkt->setHasSharers();
2189 } else {
2190 assert(pkt->isInvalidate());
2191 }
2192 }
2193
2194 if (pkt->isInvalidate()) {
2195 // Invalidation trumps our writeback... discard here
2196 // Note: markInService will remove entry from writeback buffer.
2197 markInService(wb_entry, false);
2198 delete wb_pkt;
2199 }
2200 }
2201
2202 // If this was a shared writeback, there may still be
2203 // other shared copies above that require invalidation.
2204 // We could be more selective and return here if the
2205 // request is non-exclusive or if the writeback is
2206 // exclusive.
2207 uint32_t snoop_delay = handleSnoop(pkt, blk, true, false, false);
2208
2209 // Override what we did when we first saw the snoop, as we now
2210 // also have the cost of the upwards snoops to account for
2211 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay, snoop_delay +
2212 lookupLatency * clockPeriod());
2213}
2214
2215bool
2216Cache::CpuSidePort::recvTimingSnoopResp(PacketPtr pkt)
2217{
2218 // Express snoop responses from master to slave, e.g., from L1 to L2
2219 cache->recvTimingSnoopResp(pkt);
2220 return true;
2221}
2222
2223Tick
2224Cache::recvAtomicSnoop(PacketPtr pkt)
2225{
2226 // Snoops shouldn't happen when bypassing caches
2227 assert(!system->bypassCaches());
2228
2229 // no need to snoop requests that are not in range.
2230 if (!inRange(pkt->getAddr())) {
2231 return 0;
2232 }
2233
2234 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure());
2235 uint32_t snoop_delay = handleSnoop(pkt, blk, false, false, false);
2236 return snoop_delay + lookupLatency * clockPeriod();
2237}
2238
2239
2240MSHR *
2241Cache::getNextMSHR()
2242{
2243 // Check both MSHR queue and write buffer for potential requests,
2244 // note that null does not mean there is no request, it could
2245 // simply be that it is not ready
2246 MSHR *miss_mshr = mshrQueue.getNextMSHR();
2247 MSHR *write_mshr = writeBuffer.getNextMSHR();
2248
2249 // If we got a write buffer request ready, first priority is a
2250 // full write buffer, otherwhise we favour the miss requests
2251 if (write_mshr &&
2252 ((writeBuffer.isFull() && writeBuffer.inServiceEntries == 0) ||
2253 !miss_mshr)) {
2254 // need to search MSHR queue for conflicting earlier miss.
2255 MSHR *conflict_mshr =
2256 mshrQueue.findPending(write_mshr->blkAddr,
2257 write_mshr->isSecure);
2258
2259 if (conflict_mshr && conflict_mshr->order < write_mshr->order) {
2260 // Service misses in order until conflict is cleared.
2261 return conflict_mshr;
2262
2263 // @todo Note that we ignore the ready time of the conflict here
2264 }
2265
2266 // No conflicts; issue write
2267 return write_mshr;
2268 } else if (miss_mshr) {
2269 // need to check for conflicting earlier writeback
2270 MSHR *conflict_mshr =
2271 writeBuffer.findPending(miss_mshr->blkAddr,
2272 miss_mshr->isSecure);
2273 if (conflict_mshr) {
2274 // not sure why we don't check order here... it was in the
2275 // original code but commented out.
2276
2277 // The only way this happens is if we are
2278 // doing a write and we didn't have permissions
2279 // then subsequently saw a writeback (owned got evicted)
2280 // We need to make sure to perform the writeback first
2281 // To preserve the dirty data, then we can issue the write
2282
2283 // should we return write_mshr here instead? I.e. do we
2284 // have to flush writes in order? I don't think so... not
2285 // for Alpha anyway. Maybe for x86?
2286 return conflict_mshr;
2287
2288 // @todo Note that we ignore the ready time of the conflict here
2289 }
2290
2291 // No conflicts; issue read
2292 return miss_mshr;
2293 }
2294
2295 // fall through... no pending requests. Try a prefetch.
2296 assert(!miss_mshr && !write_mshr);
2297 if (prefetcher && mshrQueue.canPrefetch()) {
2298 // If we have a miss queue slot, we can try a prefetch
2299 PacketPtr pkt = prefetcher->getPacket();
2300 if (pkt) {
2301 Addr pf_addr = blockAlign(pkt->getAddr());
2302 if (!tags->findBlock(pf_addr, pkt->isSecure()) &&
2303 !mshrQueue.findMatch(pf_addr, pkt->isSecure()) &&
2304 !writeBuffer.findMatch(pf_addr, pkt->isSecure())) {
2305 // Update statistic on number of prefetches issued
2306 // (hwpf_mshr_misses)
2307 assert(pkt->req->masterId() < system->maxMasters());
2308 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++;
2309
2310 // allocate an MSHR and return it, note
2311 // that we send the packet straight away, so do not
2312 // schedule the send
2313 return allocateMissBuffer(pkt, curTick(), false);
2314 } else {
2315 // free the request and packet
2316 delete pkt->req;
2317 delete pkt;
2318 }
2319 }
2320 }
2321
2322 return NULL;
2323}
2324
2325bool
2326Cache::isCachedAbove(PacketPtr pkt, bool is_timing) const
2327{
2328 if (!forwardSnoops)
2329 return false;
2330 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and
2331 // Writeback snoops into upper level caches to check for copies of the
2332 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict
2333 // packet, the cache can inform the crossbar below of presence or absence
2334 // of the block.
2335 if (is_timing) {
2336 Packet snoop_pkt(pkt, true, false);
2337 snoop_pkt.setExpressSnoop();
2338 // Assert that packet is either Writeback or CleanEvict and not a
2339 // prefetch request because prefetch requests need an MSHR and may
2340 // generate a snoop response.
2341 assert(pkt->isEviction());
2342 snoop_pkt.senderState = NULL;
2343 cpuSidePort->sendTimingSnoopReq(&snoop_pkt);
2344 // Writeback/CleanEvict snoops do not generate a snoop response.
2345 assert(!(snoop_pkt.cacheResponding()));
2346 return snoop_pkt.isBlockCached();
2347 } else {
2348 cpuSidePort->sendAtomicSnoop(pkt);
2349 return pkt->isBlockCached();
2350 }
2351}
2352
2353PacketPtr
2354Cache::getTimingPacket()
2355{
2356 MSHR *mshr = getNextMSHR();
2357
2358 if (mshr == NULL) {
2359 return NULL;
2360 }
2361
2362 // use request from 1st target
2363 PacketPtr tgt_pkt = mshr->getTarget()->pkt;
2364 PacketPtr pkt = NULL;
2365
2366 DPRINTF(CachePort, "%s %s for addr %#llx size %d\n", __func__,
2367 tgt_pkt->cmdString(), tgt_pkt->getAddr(), tgt_pkt->getSize());
2368
2369 CacheBlk *blk = tags->findBlock(mshr->blkAddr, mshr->isSecure);
2370
2371 if (tgt_pkt->cmd == MemCmd::HardPFReq && forwardSnoops) {
2372 // We need to check the caches above us to verify that
2373 // they don't have a copy of this block in the dirty state
2374 // at the moment. Without this check we could get a stale
2375 // copy from memory that might get used in place of the
2376 // dirty one.
2377 Packet snoop_pkt(tgt_pkt, true, false);
2378 snoop_pkt.setExpressSnoop();
2379 // We are sending this packet upwards, but if it hits we will
2380 // get a snoop response that we end up treating just like a
2381 // normal response, hence it needs the MSHR as its sender
2382 // state
2383 snoop_pkt.senderState = mshr;
2384 cpuSidePort->sendTimingSnoopReq(&snoop_pkt);
2385
2386 // Check to see if the prefetch was squashed by an upper cache (to
2387 // prevent us from grabbing the line) or if a Check to see if a
2388 // writeback arrived between the time the prefetch was placed in
2389 // the MSHRs and when it was selected to be sent or if the
2390 // prefetch was squashed by an upper cache.
2391
2392 // It is important to check cacheResponding before
2393 // prefetchSquashed. If another cache has committed to
2394 // responding, it will be sending a dirty response which will
2395 // arrive at the MSHR allocated for this request. Checking the
2396 // prefetchSquash first may result in the MSHR being
2397 // prematurely deallocated.
2398 if (snoop_pkt.cacheResponding()) {
2399 auto M5_VAR_USED r = outstandingSnoop.insert(snoop_pkt.req);
2400 assert(r.second);
2401
2402 // if we are getting a snoop response with no sharers it
2403 // will be allocated as Modified
2404 bool pending_modified_resp = !snoop_pkt.hasSharers();
2405 markInService(mshr, pending_modified_resp);
2406
2407 DPRINTF(Cache, "Upward snoop of prefetch for addr"
2408 " %#x (%s) hit\n",
2409 tgt_pkt->getAddr(), tgt_pkt->isSecure()? "s": "ns");
2410 return NULL;
2411 }
2412
2413 if (snoop_pkt.isBlockCached() || blk != NULL) {
2414 DPRINTF(Cache, "Block present, prefetch squashed by cache. "
2415 "Deallocating mshr target %#x.\n",
2416 mshr->blkAddr);
2417 // Deallocate the mshr target
2418 if (mshr->queue->forceDeallocateTarget(mshr)) {
2419 // Clear block if this deallocation resulted freed an
2420 // mshr when all had previously been utilized
2421 clearBlocked((BlockedCause)(mshr->queue->index));
2422 }
2423 return NULL;
2424 }
2425 }
2426
2427 if (mshr->isForwardNoResponse()) {
2428 // no response expected, just forward packet as it is
2429 assert(tags->findBlock(mshr->blkAddr, mshr->isSecure) == NULL);
2430 pkt = tgt_pkt;
2431 } else {
2432 pkt = getBusPacket(tgt_pkt, blk, mshr->needsWritable());
2433
2434 mshr->isForward = (pkt == NULL);
2435
2436 if (mshr->isForward) {
2437 // not a cache block request, but a response is expected
2438 // make copy of current packet to forward, keep current
2439 // copy for response handling
2440 pkt = new Packet(tgt_pkt, false, true);
2441 if (pkt->isWrite()) {
2442 pkt->setData(tgt_pkt->getConstPtr<uint8_t>());
2443 }
2444 }
2445 }
2446
2447 assert(pkt != NULL);
2448 // play it safe and append (rather than set) the sender state, as
2449 // forwarded packets may already have existing state
2450 pkt->pushSenderState(mshr);
2451 return pkt;
2452}
2453
2454
2455Tick
2456Cache::nextMSHRReadyTime() const
2457{
2458 Tick nextReady = std::min(mshrQueue.nextMSHRReadyTime(),
2459 writeBuffer.nextMSHRReadyTime());
2460
2461 // Don't signal prefetch ready time if no MSHRs available
2462 // Will signal once enoguh MSHRs are deallocated
2463 if (prefetcher && mshrQueue.canPrefetch()) {
2464 nextReady = std::min(nextReady,
2465 prefetcher->nextPrefetchReadyTime());
2466 }
2467
2468 return nextReady;
2469}
2470
2471void
2472Cache::serialize(CheckpointOut &cp) const
2473{
2474 bool dirty(isDirty());
2475
2476 if (dirty) {
2477 warn("*** The cache still contains dirty data. ***\n");
2478 warn(" Make sure to drain the system using the correct flags.\n");
2479 warn(" This checkpoint will not restore correctly and dirty data in "
2480 "the cache will be lost!\n");
2481 }
2482
2483 // Since we don't checkpoint the data in the cache, any dirty data
2484 // will be lost when restoring from a checkpoint of a system that
2485 // wasn't drained properly. Flag the checkpoint as invalid if the
2486 // cache contains dirty data.
2487 bool bad_checkpoint(dirty);
2488 SERIALIZE_SCALAR(bad_checkpoint);
2489}
2490
2491void
2492Cache::unserialize(CheckpointIn &cp)
2493{
2494 bool bad_checkpoint;
2495 UNSERIALIZE_SCALAR(bad_checkpoint);
2496 if (bad_checkpoint) {
2497 fatal("Restoring from checkpoints with dirty caches is not supported "
2498 "in the classic memory system. Please remove any caches or "
2499 " drain them properly before taking checkpoints.\n");
2500 }
2501}
2502
2503///////////////
2504//
2505// CpuSidePort
2506//
2507///////////////
2508
2509AddrRangeList
2510Cache::CpuSidePort::getAddrRanges() const
2511{
2512 return cache->getAddrRanges();
2513}
2514
2515bool
2516Cache::CpuSidePort::recvTimingReq(PacketPtr pkt)
2517{
2518 assert(!cache->system->bypassCaches());
2519
2520 bool success = false;
2521
2522 // always let packets through if an upstream cache has committed
2523 // to responding, even if blocked (we should technically look at
2524 // the isExpressSnoop flag, but it is set by the cache itself, and
2525 // consequently we have to rely on the cacheResponding flag)
2526 if (pkt->cacheResponding()) {
2527 // do not change the current retry state
2528 bool M5_VAR_USED bypass_success = cache->recvTimingReq(pkt);
2529 assert(bypass_success);
2530 return true;
2531 } else if (blocked || mustSendRetry) {
2532 // either already committed to send a retry, or blocked
2533 success = false;
2534 } else {
2535 // pass it on to the cache, and let the cache decide if we
2536 // have to retry or not
2537 success = cache->recvTimingReq(pkt);
2538 }
2539
2540 // remember if we have to retry
2541 mustSendRetry = !success;
2542 return success;
2543}
2544
2545Tick
2546Cache::CpuSidePort::recvAtomic(PacketPtr pkt)
2547{
2548 return cache->recvAtomic(pkt);
2549}
2550
2551void
2552Cache::CpuSidePort::recvFunctional(PacketPtr pkt)
2553{
2554 // functional request
2555 cache->functionalAccess(pkt, true);
2556}
2557
2558Cache::
2559CpuSidePort::CpuSidePort(const std::string &_name, Cache *_cache,
2560 const std::string &_label)
2561 : BaseCache::CacheSlavePort(_name, _cache, _label), cache(_cache)
2562{
2563}
2564
2565Cache*
2566CacheParams::create()
2567{
2568 assert(tags);
2569
2570 return new Cache(this);
2571}
2572///////////////
2573//
2574// MemSidePort
2575//
2576///////////////
2577
2578bool
2579Cache::MemSidePort::recvTimingResp(PacketPtr pkt)
2580{
2581 cache->recvTimingResp(pkt);
2582 return true;
2583}
2584
2585// Express snooping requests to memside port
2586void
2587Cache::MemSidePort::recvTimingSnoopReq(PacketPtr pkt)
2588{
2589 // handle snooping requests
2590 cache->recvTimingSnoopReq(pkt);
2591}
2592
2593Tick
2594Cache::MemSidePort::recvAtomicSnoop(PacketPtr pkt)
2595{
2596 return cache->recvAtomicSnoop(pkt);
2597}
2598
2599void
2600Cache::MemSidePort::recvFunctionalSnoop(PacketPtr pkt)
2601{
2602 // functional snoop (note that in contrast to atomic we don't have
2603 // a specific functionalSnoop method, as they have the same
2604 // behaviour regardless)
2605 cache->functionalAccess(pkt, false);
2606}
2607
2608void
2609Cache::CacheReqPacketQueue::sendDeferredPacket()
2610{
2611 // sanity check
2612 assert(!waitingOnRetry);
2613
2614 // there should never be any deferred request packets in the
2615 // queue, instead we resly on the cache to provide the packets
2616 // from the MSHR queue or write queue
2617 assert(deferredPacketReadyTime() == MaxTick);
2618
2619 // check for request packets (requests & writebacks)
2620 PacketPtr pkt = cache.getTimingPacket();
2621 if (pkt == NULL) {
2622 // can happen if e.g. we attempt a writeback and fail, but
2623 // before the retry, the writeback is eliminated because
2624 // we snoop another cache's ReadEx.
2625 } else {
2626 MSHR *mshr = dynamic_cast<MSHR*>(pkt->senderState);
2627 // in most cases getTimingPacket allocates a new packet, and
2628 // we must delete it unless it is successfully sent
2629 bool delete_pkt = !mshr->isForwardNoResponse();
2630
2631 // let our snoop responses go first if there are responses to
2632 // the same addresses we are about to writeback, note that
2633 // this creates a dependency between requests and snoop
2634 // responses, but that should not be a problem since there is
2635 // a chain already and the key is that the snoop responses can
2636 // sink unconditionally
2637 if (snoopRespQueue.hasAddr(pkt->getAddr())) {
2638 DPRINTF(CachePort, "Waiting for snoop response to be sent\n");
2639 Tick when = snoopRespQueue.deferredPacketReadyTime();
2640 schedSendEvent(when);
2641
2642 if (delete_pkt)
2643 delete pkt;
2644
2645 return;
2646 }
2647
2648
2649 waitingOnRetry = !masterPort.sendTimingReq(pkt);
2650
2651 if (waitingOnRetry) {
2652 DPRINTF(CachePort, "now waiting on a retry\n");
2653 if (delete_pkt) {
2654 // we are awaiting a retry, but we
2655 // delete the packet and will be creating a new packet
2656 // when we get the opportunity
2657 delete pkt;
2658 }
2659 // note that we have now masked any requestBus and
2660 // schedSendEvent (we will wait for a retry before
2661 // doing anything), and this is so even if we do not
2662 // care about this packet and might override it before
2663 // it gets retried
2664 } else {
2665 // As part of the call to sendTimingReq the packet is
2666 // forwarded to all neighbouring caches (and any caches
2667 // above them) as a snoop. Thus at this point we know if
2668 // any of the neighbouring caches are responding, and if
2669 // so, we know it is dirty, and we can determine if it is
2670 // being passed as Modified, making our MSHR the ordering
2671 // point
2672 bool pending_modified_resp = !pkt->hasSharers() &&
2673 pkt->cacheResponding();
2674
2675 cache.markInService(mshr, pending_modified_resp);
2676 }
2677 }
2678
2679 // if we succeeded and are not waiting for a retry, schedule the
2680 // next send considering when the next MSHR is ready, note that
2681 // snoop responses have their own packet queue and thus schedule
2682 // their own events
2683 if (!waitingOnRetry) {
2684 schedSendEvent(cache.nextMSHRReadyTime());
2685 }
2686}
2687
2688Cache::
2689MemSidePort::MemSidePort(const std::string &_name, Cache *_cache,
2690 const std::string &_label)
2691 : BaseCache::CacheMasterPort(_name, _cache, _reqQueue, _snoopRespQueue),
2692 _reqQueue(*_cache, *this, _snoopRespQueue, _label),
2693 _snoopRespQueue(*_cache, *this, _label), cache(_cache)
2694{
2695}