1/*
2 * Copyright (c) 2010-2018 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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680/////////////////////////////////////////////////////
681//
682// Response handling: responses from the memory side
683//
684/////////////////////////////////////////////////////
685
686
687void
688Cache::serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt, CacheBlk *blk)
689{
690 MSHR::Target *initial_tgt = mshr->getTarget();
691 // First offset for critical word first calculations
692 const int initial_offset = initial_tgt->pkt->getOffset(blkSize);
693
694 const bool is_error = pkt->isError();
695 // allow invalidation responses originating from write-line
696 // requests to be discarded

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