base.hh (9529:28d6d9663a7e) | base.hh (10020:2f33cb012383) |
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1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 554 unchanged lines hidden (view full) --- 563 virtual bool inCache(Addr addr) const = 0; 564 565 virtual bool inMissQueue(Addr addr) const = 0; 566 567 void incMissCount(PacketPtr pkt) 568 { 569 assert(pkt->req->masterId() < system->maxMasters()); 570 misses[pkt->cmdToIndex()][pkt->req->masterId()]++; | 1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 554 unchanged lines hidden (view full) --- 563 virtual bool inCache(Addr addr) const = 0; 564 565 virtual bool inMissQueue(Addr addr) const = 0; 566 567 void incMissCount(PacketPtr pkt) 568 { 569 assert(pkt->req->masterId() < system->maxMasters()); 570 misses[pkt->cmdToIndex()][pkt->req->masterId()]++; |
571 | 571 pkt->req->incAccessDepth(); |
572 if (missCount) { 573 --missCount; 574 if (missCount == 0) 575 exitSimLoop("A cache reached the maximum miss count"); 576 } 577 } 578 void incHitCount(PacketPtr pkt) 579 { 580 assert(pkt->req->masterId() < system->maxMasters()); 581 hits[pkt->cmdToIndex()][pkt->req->masterId()]++; 582 583 } 584 585}; 586 587#endif //__BASE_CACHE_HH__ | 572 if (missCount) { 573 --missCount; 574 if (missCount == 0) 575 exitSimLoop("A cache reached the maximum miss count"); 576 } 577 } 578 void incHitCount(PacketPtr pkt) 579 { 580 assert(pkt->req->masterId() < system->maxMasters()); 581 hits[pkt->cmdToIndex()][pkt->req->masterId()]++; 582 583 } 584 585}; 586 587#endif //__BASE_CACHE_HH__ |