base.hh (9087:b5a084a6159b) base.hh (9163:3b5e13ac1940)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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129 * responses outstanding.
130 */
131 void requestBus(RequestCause cause, Tick time)
132 {
133 DPRINTF(CachePort, "Asserting bus request for cause %d\n", cause);
134 queue.schedSendEvent(time);
135 }
136
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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129 * responses outstanding.
130 */
131 void requestBus(RequestCause cause, Tick time)
132 {
133 DPRINTF(CachePort, "Asserting bus request for cause %d\n", cause);
134 queue.schedSendEvent(time);
135 }
136
137 /**
138 * Schedule the transmissions of a response packet at a given
139 * point in time.
140 *
141 * @param pkt response packet
142 * @param when time to send the response
143 */
144 void respond(PacketPtr pkt, Tick time) {
145 queue.schedSendTiming(pkt, time, true);
146 }
147
148 protected:
149
150 CacheMasterPort(const std::string &_name, BaseCache *_cache,
151 MasterPacketQueue &_queue) :
152 QueuedMasterPort(_name, _cache, _queue)
153 { }
154
155 /**

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174 public:
175
176 /** Do not accept any new requests. */
177 void setBlocked();
178
179 /** Return to normal operation and accept new requests. */
180 void clearBlocked();
181
137 protected:
138
139 CacheMasterPort(const std::string &_name, BaseCache *_cache,
140 MasterPacketQueue &_queue) :
141 QueuedMasterPort(_name, _cache, _queue)
142 { }
143
144 /**

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163 public:
164
165 /** Do not accept any new requests. */
166 void setBlocked();
167
168 /** Return to normal operation and accept new requests. */
169 void clearBlocked();
170
182 /**
183 * Schedule the transmissions of a response packet at a given
184 * point in time.
185 *
186 * @param pkt response packet
187 * @param when time to send the response
188 */
189 void respond(PacketPtr pkt, Tick time) {
190 queue.schedSendTiming(pkt, time);
191 }
192
193 protected:
194
195 CacheSlavePort(const std::string &_name, BaseCache *_cache,
196 const std::string &_label);
197
198 /** A normal packet queue used to store responses. */
199 SlavePacketQueue queue;
200

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172
173 CacheSlavePort(const std::string &_name, BaseCache *_cache,
174 const std::string &_label);
175
176 /** A normal packet queue used to store responses. */
177 SlavePacketQueue queue;
178

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