base.hh (6227:a17798f2a52c) base.hh (6666:3199397fd905)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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374 */
375 unsigned
376 getBlockSize() const
377 {
378 return blkSize;
379 }
380
381
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 365 unchanged lines hidden (view full) ---

374 */
375 unsigned
376 getBlockSize() const
377 {
378 return blkSize;
379 }
380
381
382 Addr blockAlign(Addr addr) const { return (addr & ~(blkSize - 1)); }
382 Addr blockAlign(Addr addr) const { return (addr & ~(Addr(blkSize - 1))); }
383
384
385 const Range<Addr> &getAddrRange() const { return addrRange; }
386
387 MSHR *allocateMissBuffer(PacketPtr pkt, Tick time, bool requestBus)
388 {
389 assert(!pkt->req->isUncacheable());
390 return allocateBufferInternal(&mshrQueue,

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384
385 const Range<Addr> &getAddrRange() const { return addrRange; }
386
387 MSHR *allocateMissBuffer(PacketPtr pkt, Tick time, bool requestBus)
388 {
389 assert(!pkt->req->isUncacheable());
390 return allocateBufferInternal(&mshrQueue,

--- 107 unchanged lines hidden ---