base.hh (5338:e75d02a09806) base.hh (5715:e8c1d4e669a7)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 467 unchanged lines hidden (view full) ---

476 virtual unsigned int drain(Event *de);
477
478 virtual bool inCache(Addr addr) = 0;
479
480 virtual bool inMissQueue(Addr addr) = 0;
481
482 void incMissCount(PacketPtr pkt)
483 {
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 467 unchanged lines hidden (view full) ---

476 virtual unsigned int drain(Event *de);
477
478 virtual bool inCache(Addr addr) = 0;
479
480 virtual bool inMissQueue(Addr addr) = 0;
481
482 void incMissCount(PacketPtr pkt)
483 {
484 misses[pkt->cmdToIndex()][0/*pkt->req->getThreadNum()*/]++;
484 misses[pkt->cmdToIndex()][0/*pkt->req->threadId()*/]++;
485
486 if (missCount) {
487 --missCount;
488 if (missCount == 0)
489 exitSimLoop("A cache reached the maximum miss count");
490 }
491 }
492
493};
494
495#endif //__BASE_CACHE_HH__
485
486 if (missCount) {
487 --missCount;
488 if (missCount == 0)
489 exitSimLoop("A cache reached the maximum miss count");
490 }
491 }
492
493};
494
495#endif //__BASE_CACHE_HH__